Patent Assignment Details
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| Reel/Frame: | 063443/0272 | |
| Pages: | 12 |
| | Recorded: | 04/26/2023 | | |
| Attorney Dkt #: | 236110/MJC/FMO |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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NONE
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Issue Dt:
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Application #:
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18127329
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Filing Dt:
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03/28/2023
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Publication #:
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Pub Dt:
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07/20/2023
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Title:
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DRAM ASSIST ERROR CORRECTION MECHANISM FOR DDR SDRAM INTERFACE
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Assignee
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| 129, SAMSUNG-RO, YEONGTONG-GU |
| SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF 16677 |
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Correspondence name and address
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LEWIS ROCA ROTHGERBER CHRISTIE LLP
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PO BOX 29001
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GLENDALE, CA 91209
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05/22/2024 05:25 AM
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