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Reel/Frame:064803/0109   Pages: 19
Recorded: 09/01/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE CORRECT THE SPELLING OF ASSIGNEE'S NAME FROM "STATS CHIPPAC PTE. LTE," TO "STATS CHIPPAC PTE. LTD." PREVIOUSLY RECORDED AT REEL: 038401 FRAME: 0532. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 66
1
Patent #:
6737295
Issue Dt:
05/18/2004
Application #:
10081491
Filing Dt:
02/22/2002
Publication #:
US20020151189
Pub Dt:
10/17/2002
Title:
CHIP SCALE PACKAGE WITH FLIP CHIP INTERCONNECT
2
Patent #:
8536688
Issue Dt:
09/17/2013
Application #:
11007896
Filing Dt:
12/08/2004
Publication #:
US20050263861
Pub Dt:
12/01/2005
Title:
INTEGRATED CIRCUIT LEADFRAME AND FABRICATION METHOD THEREFOR
3
Patent #:
8536689
Issue Dt:
09/17/2013
Application #:
11163035
Filing Dt:
10/03/2005
Publication #:
US20070075404
Pub Dt:
04/05/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-SURFACE DIE ATTACH PAD
4
Patent #:
8546929
Issue Dt:
10/01/2013
Application #:
11379336
Filing Dt:
04/19/2006
Publication #:
US20070246813
Pub Dt:
10/25/2007
Title:
EMBEDDED INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM
5
Patent #:
9000579
Issue Dt:
04/07/2015
Application #:
11694912
Filing Dt:
03/30/2007
Publication #:
US20080237873
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH BONDING IN VIA
6
Patent #:
7494847
Issue Dt:
02/24/2009
Application #:
11880893
Filing Dt:
07/23/2007
Publication #:
US20080020512
Pub Dt:
01/24/2008
Title:
METHOD FOR MAKING A SEMICONDUCTOR MULTI-PACKAGE MODULE HAVING INVERTED WIRE BOND CARRIER SECOND PACKAGE
7
Patent #:
8536692
Issue Dt:
09/17/2013
Application #:
11954601
Filing Dt:
12/12/2007
Publication #:
US20090152700
Pub Dt:
06/18/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOUNTABLE INTEGRATED CIRCUIT DIE
8
Patent #:
8569872
Issue Dt:
10/29/2013
Application #:
12166169
Filing Dt:
07/01/2008
Publication #:
US20100001384
Pub Dt:
01/07/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR SINGLE AXIS PARTIAL SAW ISOLATION
9
Patent #:
8531043
Issue Dt:
09/10/2013
Application #:
12236445
Filing Dt:
09/23/2008
Publication #:
US20100072634
Pub Dt:
03/25/2010
Title:
PLANAR ENCAPSULATION AND MOLD CAVITY PACKAGE IN PACKAGE SYSTEM
10
Patent #:
8576026
Issue Dt:
11/05/2013
Application #:
12331492
Filing Dt:
12/10/2008
Publication #:
US20090167455
Pub Dt:
07/02/2009
Title:
Semiconductor Device Having Balanced Band-Pass Filter Implemented with LC Resonator
11
Patent #:
8546189
Issue Dt:
10/01/2013
Application #:
12410213
Filing Dt:
03/24/2009
Publication #:
US20100072599
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A WAFER LEVEL PACKAGE WITH TOP AND BOTTOM SOLDER BUMP INTERCONNECTION
12
Patent #:
8518822
Issue Dt:
08/27/2013
Application #:
12411390
Filing Dt:
03/25/2009
Publication #:
US20100244218
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH MULTI-STACKED FLIP CHIPS AND METHOD OF MANUFACTURE THEREOF
13
Patent #:
8531015
Issue Dt:
09/10/2013
Application #:
12412279
Filing Dt:
03/26/2009
Publication #:
US20100244241
Pub Dt:
09/30/2010
Title:
Semiconductor Device and Method of Forming a Thin Wafer Without a Carrier
14
Patent #:
8518749
Issue Dt:
08/27/2013
Application #:
12489177
Filing Dt:
06/22/2009
Publication #:
US20100320588
Pub Dt:
12/23/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED HEAT SPREADER FRAME WITH EMBEDDED SEMICONDUCTOR DIE
15
Patent #:
8536690
Issue Dt:
09/17/2013
Application #:
12564852
Filing Dt:
09/22/2009
Publication #:
US20110068448
Pub Dt:
03/24/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CAP LAYER AND METHOD OF MANUFACTURE THEREOF
16
Patent #:
8564382
Issue Dt:
10/22/2013
Application #:
12579286
Filing Dt:
10/14/2009
Publication #:
US20100039185
Pub Dt:
02/18/2010
Title:
MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
17
Patent #:
8531012
Issue Dt:
09/10/2013
Application #:
12605292
Filing Dt:
10/23/2009
Publication #:
US20110095403
Pub Dt:
04/28/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE DISPOSED IN A CAVITY OF AN INTERCONNECT STRUCTURE AND GROUNDED THROUGH THE DIE TSV
18
Patent #:
8575018
Issue Dt:
11/05/2013
Application #:
12628631
Filing Dt:
12/01/2009
Publication #:
US20120299176
Pub Dt:
11/29/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BUMP STRUCTURE WITH MULTI-LAYER UBM AROUND BUMP FORMATION AREA
19
Patent #:
8518752
Issue Dt:
08/27/2013
Application #:
12629881
Filing Dt:
12/02/2009
Publication #:
US20110127662
Pub Dt:
06/02/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKABLE PACKAGE AND METHOD OF MANUFACTURE THEREOF
20
Patent #:
8574960
Issue Dt:
11/05/2013
Application #:
12699482
Filing Dt:
02/03/2010
Publication #:
US20110187005
Pub Dt:
08/04/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CAVITY ADJACENT TO SENSITIVE REGION OF SEMICONDUCTOR DIE USING WAFER-LEVEL UNDERFILL MATERIAL
21
Patent #:
8541886
Issue Dt:
09/24/2013
Application #:
12720667
Filing Dt:
03/09/2010
Publication #:
US20110221072
Pub Dt:
09/15/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VIA AND METHOD OF MANUFACTURE THEREOF
22
Patent #:
8569869
Issue Dt:
10/29/2013
Application #:
12729841
Filing Dt:
03/23/2010
Publication #:
US20110233736
Pub Dt:
09/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
23
Patent #:
8525350
Issue Dt:
09/03/2013
Application #:
12731330
Filing Dt:
03/25/2010
Publication #:
US20100176510
Pub Dt:
07/15/2010
Title:
FUSIBLE I/O INTERCONNECTION SYSTEMS AND METHODS FOR FLIP-CHIP PACKAGING INVOLVING SUBSTRATE-MOUNTED STUD BUMPS
24
Patent #:
8574964
Issue Dt:
11/05/2013
Application #:
12760428
Filing Dt:
04/14/2010
Publication #:
US20110254146
Pub Dt:
10/20/2011
Title:
Semiconductor Device and Method of Forming Electrical Interconnection Between Semiconductor Die and Substrate with Continuous Body of Solder Tape
25
Patent #:
8524537
Issue Dt:
09/03/2013
Application #:
12771833
Filing Dt:
04/30/2010
Publication #:
US20110266656
Pub Dt:
11/03/2011
Title:
Semiconductor Device and Method of Forming Protective Coating Material Over Semiconductor Wafer to Reduce Lamination Tape Residue
26
Patent #:
8558392
Issue Dt:
10/15/2013
Application #:
12780268
Filing Dt:
05/14/2010
Publication #:
US20110278741
Pub Dt:
11/17/2011
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE AND MOUNTING SEMICONDUCTOR DIE IN RECESSED ENCAPSULANT
27
Patent #:
8541872
Issue Dt:
09/24/2013
Application #:
12791867
Filing Dt:
06/02/2010
Publication #:
US20110298119
Pub Dt:
12/08/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
28
Patent #:
8536718
Issue Dt:
09/17/2013
Application #:
12822405
Filing Dt:
06/24/2010
Publication #:
US20110316162
Pub Dt:
12/29/2011
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRENCHES AND METHOD OF MANUFACTURE THEREOF
29
Patent #:
8558277
Issue Dt:
10/15/2013
Application #:
12831047
Filing Dt:
07/06/2010
Publication #:
US20100270549
Pub Dt:
10/28/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING ELECTROSTATIC DISCHARGE PROTECTION FOR INTEGRATED PASSIVE DEVICES
30
Patent #:
8519518
Issue Dt:
08/27/2013
Application #:
12890409
Filing Dt:
09/24/2010
Publication #:
US20120074547
Pub Dt:
03/29/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF
31
Patent #:
8546193
Issue Dt:
10/01/2013
Application #:
12917629
Filing Dt:
11/02/2010
Publication #:
US20120104590
Pub Dt:
05/03/2012
Title:
Semiconductor Device and Method of Forming Penetrable Film Encapsulant Around Semiconductor Die and Interconnect Structure
32
Patent #:
8574959
Issue Dt:
11/05/2013
Application #:
12960178
Filing Dt:
12/03/2010
Publication #:
US20130277826
Pub Dt:
10/24/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BUMP-ON-LEAD INTERCONNECTION
33
Patent #:
8546957
Issue Dt:
10/01/2013
Application #:
12964577
Filing Dt:
12/09/2010
Publication #:
US20120146246
Pub Dt:
06/14/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIELECTRIC SUPPORT AND METHOD OF MANUFACTURE THEREOF
34
Patent #:
8525344
Issue Dt:
09/03/2013
Application #:
13034075
Filing Dt:
02/24/2011
Publication #:
US20120217643
Pub Dt:
08/30/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING BOND WIRES BETWEEN SEMICONDUCTOR DIE CONTACT PADS AND CONDUCTIVE TOV IN PERIPHERAL AREA AROUND SEMICONDUCTOR DIE
35
Patent #:
8535981
Issue Dt:
09/17/2013
Application #:
13045523
Filing Dt:
03/10/2011
Publication #:
US20120228753
Pub Dt:
09/13/2012
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH UNDERFILLING STRUCTURES AND METHOD OF MANUFACTURE THEREOF
36
Patent #:
8569882
Issue Dt:
10/29/2013
Application #:
13071397
Filing Dt:
03/24/2011
Publication #:
US20120241980
Pub Dt:
09/27/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COLLAPSED MULTI-INTEGRATION PACKAGE AND METHOD OF MANUFACTURE THEREOF
37
Patent #:
8558369
Issue Dt:
10/15/2013
Application #:
13071514
Filing Dt:
03/25/2011
Publication #:
US20120241968
Pub Dt:
09/27/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
38
Patent #:
8557638
Issue Dt:
10/15/2013
Application #:
13102041
Filing Dt:
05/05/2011
Publication #:
US20120280377
Pub Dt:
11/08/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PAD CONNECTION AND METHOD OF MANUFACTURE THEREOF
39
Patent #:
8530277
Issue Dt:
09/10/2013
Application #:
13162526
Filing Dt:
06/16/2011
Publication #:
US20120319284
Pub Dt:
12/20/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE ON PACKAGE SUPPORT AND METHOD OF MANUFACTURE THEREOF
40
Patent #:
8530280
Issue Dt:
09/10/2013
Application #:
13178347
Filing Dt:
07/07/2011
Publication #:
US20110260313
Pub Dt:
10/27/2011
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONTOURED ENCAPSULATION AND METHOD FOR MANUFACTURING THEREOF
41
Patent #:
8519517
Issue Dt:
08/27/2013
Application #:
13194874
Filing Dt:
07/29/2011
Publication #:
US20110285000
Pub Dt:
11/24/2011
Title:
SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF
42
Patent #:
8564125
Issue Dt:
10/22/2013
Application #:
13224718
Filing Dt:
09/02/2011
Publication #:
US20130056864
Pub Dt:
03/07/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED THERMAL HEAT SHIELD AND METHOD OF MANUFACTURE THEREOF
43
Patent #:
8563418
Issue Dt:
10/22/2013
Application #:
13268091
Filing Dt:
10/07/2011
Publication #:
US20120025373
Pub Dt:
02/02/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING VERTICALLY OFFSET BOND ON TRACE INTERCONNECTS ON DIFFERENT HEIGHT TRACES
44
Patent #:
8558389
Issue Dt:
10/15/2013
Application #:
13315033
Filing Dt:
12/08/2011
Publication #:
US20130147055
Pub Dt:
06/13/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING GUARD RING AROUND CONDUCTIVE TSV THROUGH SEMICONDUCTOR WAFER
45
Patent #:
8558366
Issue Dt:
10/15/2013
Application #:
13324380
Filing Dt:
12/13/2011
Publication #:
US20120086115
Pub Dt:
04/12/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERPOSER INTERCONNECTIONS AND METHOD OF MANUFACTURE THEREOF
46
Patent #:
8546194
Issue Dt:
10/01/2013
Application #:
13325903
Filing Dt:
12/14/2011
Publication #:
US20130157418
Pub Dt:
06/20/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
47
Patent #:
8525325
Issue Dt:
09/03/2013
Application #:
13326090
Filing Dt:
12/14/2011
Publication #:
US20130154080
Pub Dt:
06/20/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEADS AND METHOD OF MANUFACTURE THEREOF
48
Patent #:
8524538
Issue Dt:
09/03/2013
Application #:
13327091
Filing Dt:
12/15/2011
Publication #:
US20130154121
Pub Dt:
06/20/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FILM ASSISTANCE MOLD AND METHOD OF MANUFACTURE THEREOF
49
Patent #:
8546195
Issue Dt:
10/01/2013
Application #:
13335631
Filing Dt:
12/22/2011
Publication #:
US20120094444
Pub Dt:
04/19/2012
Title:
SEMICONDUCTOR PACKAGE HAVING SEMICONDUCTOR DIE WITH INTERNAL VERTICAL INTERCONNECT STRUCTURE AND METHOD THEREFOR
50
Patent #:
8581370
Issue Dt:
11/12/2013
Application #:
13349829
Filing Dt:
01/13/2012
Publication #:
US20120112326
Pub Dt:
05/10/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING PREFABRICATED EMI SHIELDING FRAME WITH CAVITIES CONTAINING PENETRABLE MATERIAL OVER SEMICONDUCTOR DIE
51
Patent #:
8524577
Issue Dt:
09/03/2013
Application #:
13366008
Filing Dt:
02/03/2012
Publication #:
US20130127018
Pub Dt:
05/23/2013
Title:
Semiconductor Device and Method of Forming Reconstituted Wafer with Larger Carrier to Achieve More EWLB Packages per Wafer with Encapsulant Deposited Under Temperature and Pressure
52
Patent #:
8569112
Issue Dt:
10/29/2013
Application #:
13425277
Filing Dt:
03/20/2012
Publication #:
US20130249065
Pub Dt:
09/26/2013
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND LEADFRAME ETCHING AND METHOD OF MANUFACTURE THEREOF
53
Patent #:
8525337
Issue Dt:
09/03/2013
Application #:
13441691
Filing Dt:
04/06/2012
Publication #:
US20120196406
Pub Dt:
08/02/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STUD BUMPS OVER EMBEDDED DIE
54
Patent #:
8558399
Issue Dt:
10/15/2013
Application #:
13443067
Filing Dt:
04/10/2012
Publication #:
US20120193805
Pub Dt:
08/02/2012
Title:
DUAL MOLDED MULTI-CHIP PACKAGE SYSTEM
55
Patent #:
8569895
Issue Dt:
10/29/2013
Application #:
13458289
Filing Dt:
04/27/2012
Publication #:
US20120211904
Pub Dt:
08/23/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING MOLD UNDERFILL USING DISPENSING NEEDLE HAVING SAME WIDTH AS SEMICONDUCTOR DIE
56
Patent #:
8558378
Issue Dt:
10/15/2013
Application #:
13464979
Filing Dt:
05/05/2012
Publication #:
US20120211887
Pub Dt:
08/23/2012
Title:
BUMP-ON-LEAD FLIP CHIP INTERCONNECTION
57
Patent #:
8559185
Issue Dt:
10/15/2013
Application #:
13477630
Filing Dt:
05/22/2012
Publication #:
US20120228767
Pub Dt:
09/13/2012
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKABLE DEVICES AND A METHOD OF MANUFACTURE THEREOF
58
Patent #:
8557639
Issue Dt:
10/15/2013
Application #:
13492646
Filing Dt:
06/08/2012
Publication #:
US20120241939
Pub Dt:
09/27/2012
Title:
APPARATUS FOR THERMALLY ENHANCED SEMICONDUCTOR PACKAGE
59
Patent #:
8575769
Issue Dt:
11/05/2013
Application #:
13492668
Filing Dt:
06/08/2012
Publication #:
US20120241940
Pub Dt:
09/27/2012
Title:
SEMICONDUCTOR DEVICE AND METHOD OF EMBEDDING THERMALLY CONDUCTIVE LAYER IN INTERCONNECT STRUCTURE FOR HEAT DISSIPATION
60
Patent #:
8569870
Issue Dt:
10/29/2013
Application #:
13531941
Filing Dt:
06/25/2012
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SHIELDING SPACER AND METHOD OF MANUFACTURE THEREOF
61
Patent #:
RE44562
Issue Dt:
10/29/2013
Application #:
13558953
Filing Dt:
07/26/2012
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
62
Patent #:
8519536
Issue Dt:
08/27/2013
Application #:
13691427
Filing Dt:
11/30/2012
Publication #:
US20130087913
Pub Dt:
04/11/2013
Title:
SEMICONDUCTOR DEVICE INCLUDING BUMP FORMED ON SUBSTRATE TO PREVENT EXTRIMELY-LOW DIELECTRIC CONSTANT (ELK) INTERLAYER DIELECTRIC LAYER (ILD) DELAMINATION DURING REFLOW PROCESS
63
Patent #:
8530274
Issue Dt:
09/10/2013
Application #:
13706818
Filing Dt:
12/06/2012
Publication #:
US20130093068
Pub Dt:
04/18/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AIR GAP ADJACENT TO STRESS SENSITIVE REGION OF THE DIE
64
Patent #:
RE44500
Issue Dt:
09/17/2013
Application #:
13752157
Filing Dt:
01/28/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING COMPOSITE BUMP-ON-LEAD INTERCONNECTION
65
Patent #:
RE44579
Issue Dt:
11/05/2013
Application #:
13756679
Filing Dt:
02/01/2013
Title:
SEMICONDUCTOR DEVICE AND METHOD OF SELF-CONFINEMENT OF CONDUCTIVE BUMP MATERIAL DURING REFLOW WITHOUT SOLDER MASK
66
Patent #:
RE44524
Issue Dt:
10/08/2013
Application #:
13756779
Filing Dt:
02/01/2013
Title:
Bump-On-Lead Flip Chip Interconnection
Assignor
1
STATS CHIPPAC LTD.
Exec Dt:
03/29/2016
Assignee
1
STATS CHIPPAC PTE. LTD.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
DARIA DELIZIO
1919 PENNSYLVANIA AVE., SUITE 800
WASHINGTON, DC 20006

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