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Reel/Frame:064838/0948   Pages: 13
Recorded: 08/30/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECT ERROR IN ASSIGNMENT NAME FROM STATS CHIPPAC PTE. LTE. TO STATS CHIPPAC PTE. LTD. (REEL: 038378 FRAME: 0328
Total properties: 84
1
Patent #:
7731078
Issue Dt:
06/08/2010
Application #:
11162617
Filing Dt:
09/16/2005
Publication #:
US20060102694
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS
2
Patent #:
7645640
Issue Dt:
01/12/2010
Application #:
11163561
Filing Dt:
10/23/2005
Publication #:
US20060102989
Pub Dt:
05/18/2006
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE
3
Patent #:
7671463
Issue Dt:
03/02/2010
Application #:
11277991
Filing Dt:
03/30/2006
Publication #:
US20070235854
Pub Dt:
10/11/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH GROUND RING
4
Patent #:
7710735
Issue Dt:
05/04/2010
Application #:
11278418
Filing Dt:
04/01/2006
Publication #:
US20070235216
Pub Dt:
10/11/2007
Title:
MULTICHIP PACKAGE SYSTEM
5
Patent #:
7737539
Issue Dt:
06/15/2010
Application #:
11306854
Filing Dt:
01/12/2006
Publication #:
US20070158806
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING HONEYCOMB MOLDING
6
Patent #:
7750482
Issue Dt:
07/06/2010
Application #:
11307482
Filing Dt:
02/09/2006
Publication #:
US20070182018
Pub Dt:
08/09/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING ZERO FILLET RESIN
7
Patent #:
7714451
Issue Dt:
05/11/2010
Application #:
11307614
Filing Dt:
02/14/2006
Publication #:
US20070108590
Pub Dt:
05/17/2007
Title:
SEMICONDUCTOR PACKAGE SYSTEM WITH THERMAL DIE BONDING
8
Patent #:
7741707
Issue Dt:
06/22/2010
Application #:
11307906
Filing Dt:
02/27/2006
Publication #:
US20070200230
Pub Dt:
08/30/2007
Title:
STACKABLE INTEGRATED CIRCUIT PACKAGE SYSTEM
9
Patent #:
7723146
Issue Dt:
05/25/2010
Application #:
11326206
Filing Dt:
01/04/2006
Publication #:
US20070166867
Pub Dt:
07/19/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
10
Patent #:
7746656
Issue Dt:
06/29/2010
Application #:
11383407
Filing Dt:
05/15/2006
Publication #:
US20060256525
Pub Dt:
11/16/2006
Title:
OFFSET INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM
11
Patent #:
7728417
Issue Dt:
06/01/2010
Application #:
11419748
Filing Dt:
05/22/2006
Publication #:
US20070108582
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING SHIELD
12
Patent #:
7732907
Issue Dt:
06/08/2010
Application #:
11421051
Filing Dt:
05/30/2006
Publication #:
US20070278660
Pub Dt:
12/06/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EDGE CONNECTION SYSTEM
13
Patent #:
7736950
Issue Dt:
06/15/2010
Application #:
11435305
Filing Dt:
05/15/2006
Publication #:
US20090045507
Pub Dt:
02/19/2009
Title:
FLIP CHIP INTERCONNECTION
14
Patent #:
7727816
Issue Dt:
06/01/2010
Application #:
11459305
Filing Dt:
07/21/2006
Publication #:
US20080017955
Pub Dt:
01/24/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKED DIE
15
Patent #:
7683461
Issue Dt:
03/23/2010
Application #:
11459320
Filing Dt:
07/21/2006
Publication #:
US20080096401
Pub Dt:
04/24/2008
Title:
INTEGRATED CIRCUIT LEADLESS PACKAGE SYSTEM
16
Patent #:
7667308
Issue Dt:
02/23/2010
Application #:
11459568
Filing Dt:
07/24/2006
Publication #:
US20080017957
Pub Dt:
01/24/2008
Title:
LEADED STACKED PACKAGES HAVING INTEGRATED UPPER LEAD
17
Patent #:
7705475
Issue Dt:
04/27/2010
Application #:
11462303
Filing Dt:
08/03/2006
Publication #:
US20080029911
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
18
Patent #:
7700458
Issue Dt:
04/20/2010
Application #:
11462545
Filing Dt:
08/04/2006
Publication #:
US20080029859
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING WAFER LEVEL CHIP SCALE PACKAGING
19
Patent #:
7645638
Issue Dt:
01/12/2010
Application #:
11462568
Filing Dt:
08/04/2006
Publication #:
US20080029866
Pub Dt:
02/07/2008
Title:
STACKABLE MULTI-CHIP PACKAGE SYSTEM WITH SUPPORT STRUCTURE
20
Patent #:
7622333
Issue Dt:
11/24/2009
Application #:
11462588
Filing Dt:
08/04/2006
Publication #:
US20080029867
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR PACKAGE STACKING AND MANUFACTURING METHOD THEREOF
21
Patent #:
7687892
Issue Dt:
03/30/2010
Application #:
11463072
Filing Dt:
08/08/2006
Publication #:
US20080036051
Pub Dt:
02/14/2008
Title:
QUAD FLAT PACKAGE
22
Patent #:
7687919
Issue Dt:
03/30/2010
Application #:
11463855
Filing Dt:
08/10/2006
Publication #:
US20070108621
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ARCHED PEDESTAL
23
Patent #:
7659608
Issue Dt:
02/09/2010
Application #:
11532387
Filing Dt:
09/15/2006
Publication #:
US20080067658
Pub Dt:
03/20/2008
Title:
STACKED DIE SEMICONDUCTOR DEVICE HAVING CIRCUIT TAPE
24
Patent #:
7635913
Issue Dt:
12/22/2009
Application #:
11608829
Filing Dt:
12/09/2006
Publication #:
US20080136007
Pub Dt:
06/12/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
25
Patent #:
7687897
Issue Dt:
03/30/2010
Application #:
11617413
Filing Dt:
12/28/2006
Publication #:
US20080157319
Pub Dt:
07/03/2008
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH ADHESIVE SPACING STRUCTURES
26
Patent #:
7683467
Issue Dt:
03/23/2010
Application #:
11635941
Filing Dt:
12/07/2006
Publication #:
US20080135989
Pub Dt:
06/12/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING STRUCTURAL SUPPORT
27
Patent #:
7659633
Issue Dt:
02/09/2010
Application #:
11640534
Filing Dt:
12/14/2006
Publication #:
US20070241464
Pub Dt:
10/18/2007
Title:
SOLDER JOINT FLIP CHIP INTERCONNECTION HAVING RELIEF STRUCTURE
28
Patent #:
7723225
Issue Dt:
05/25/2010
Application #:
11671900
Filing Dt:
02/06/2007
Publication #:
US20070184578
Pub Dt:
08/09/2007
Title:
SOLDER BUMP CONFINEMENT SYSTEM FOR AN INTEGRATED CIRCUIT PACKAGE
29
Patent #:
7750451
Issue Dt:
07/06/2010
Application #:
11672164
Filing Dt:
02/07/2007
Publication #:
US20080185702
Pub Dt:
08/07/2008
Title:
MULTI-CHIP PACKAGE SYSTEM WITH MULTIPLE SUBSTRATES
30
Patent #:
7682959
Issue Dt:
03/23/2010
Application #:
11689282
Filing Dt:
03/21/2007
Publication #:
US20080230902
Pub Dt:
09/25/2008
Title:
METHOD OF FORMING SOLDER BUMP ON HIGH TOPOGRAPHY PLATED CU
31
Patent #:
7727879
Issue Dt:
06/01/2010
Application #:
11689319
Filing Dt:
03/21/2007
Publication #:
US20080233731
Pub Dt:
09/25/2008
Title:
METHOD OF FORMING TOP ELECTRODE FOR CAPACITOR AND INTERCONNECTION IN INTEGRATED PASSIVE DEVICE (IPD)
32
Patent #:
7659140
Issue Dt:
02/09/2010
Application #:
11694933
Filing Dt:
03/30/2007
Publication #:
US20080242053
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT SYSTEM WITH A DEBRIS TRAPPING SYSTEM
33
Patent #:
7688160
Issue Dt:
03/30/2010
Application #:
11734410
Filing Dt:
04/12/2007
Publication #:
US20080252395
Pub Dt:
10/16/2008
Title:
COMPACT COILS FOR HIGH PERFORMANCE FILTERS
34
Patent #:
7687318
Issue Dt:
03/30/2010
Application #:
11744743
Filing Dt:
05/04/2007
Publication #:
US20080272368
Pub Dt:
11/06/2008
Title:
EXTENDED REDISTRIBUTION LAYERS BUMPED WAFER
35
Patent #:
7723840
Issue Dt:
05/25/2010
Application #:
11759227
Filing Dt:
06/07/2007
Publication #:
US20080303133
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CONTOURED DIE
36
Patent #:
7629860
Issue Dt:
12/08/2009
Application #:
11760207
Filing Dt:
06/08/2007
Publication #:
US20080303606
Pub Dt:
12/11/2008
Title:
MINIATURIZED WIDE-BAND BALUNS FOR RF APPLICATIONS
37
Patent #:
7622800
Issue Dt:
11/24/2009
Application #:
11760712
Filing Dt:
06/08/2007
Publication #:
US20070228545
Pub Dt:
10/04/2007
Title:
STACKED SEMICONDUCTOR PACKAGES AND METHOD THEREFOR
38
Patent #:
7727875
Issue Dt:
06/01/2010
Application #:
11766710
Filing Dt:
06/21/2007
Publication #:
US20080318396
Pub Dt:
12/25/2008
Title:
GROOVING BUMPED WAFER PRE-UNDERFILL SYSTEM
39
Patent #:
7723159
Issue Dt:
05/25/2010
Application #:
11768844
Filing Dt:
06/26/2007
Publication #:
US20080272477
Pub Dt:
11/06/2008
Title:
PACKAGE-ON-PACKAGE USING THROUGH-HOLE VIA DIE ON SAW STREETS
40
Patent #:
7750452
Issue Dt:
07/06/2010
Application #:
11768869
Filing Dt:
06/26/2007
Publication #:
US20080272470
Pub Dt:
11/06/2008
Title:
SAME SIZE DIE STACKED PACKAGE HAVING THROUGH-HOLE VIAS FORMED IN ORGANIC MATERIAL
41
Patent #:
7701049
Issue Dt:
04/20/2010
Application #:
11833882
Filing Dt:
08/03/2007
Publication #:
US20090032932
Pub Dt:
02/05/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM FOR FINE PITCH SUBSTRATES
42
Patent #:
7674640
Issue Dt:
03/09/2010
Application #:
11844354
Filing Dt:
08/24/2007
Publication #:
US20070284718
Pub Dt:
12/13/2007
Title:
STACKED DIE PACKAGE SYSTEM
43
Patent #:
7659609
Issue Dt:
02/09/2010
Application #:
11849127
Filing Dt:
08/31/2007
Publication #:
US20090057862
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH CARRIER INTERPOSER
44
Patent #:
7701042
Issue Dt:
04/20/2010
Application #:
11856879
Filing Dt:
09/18/2007
Publication #:
US20080073781
Pub Dt:
03/27/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR CHIP ON LEAD
45
Patent #:
7667335
Issue Dt:
02/23/2010
Application #:
11858749
Filing Dt:
09/20/2007
Publication #:
US20090079070
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR PACKAGE WITH PASSIVATION ISLAND FOR REDUCING STRESS ON SOLDER BUMPS
46
Patent #:
7679177
Issue Dt:
03/16/2010
Application #:
11859462
Filing Dt:
09/21/2007
Publication #:
US20090079066
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PASSIVE COMPONENTS
47
Patent #:
7701040
Issue Dt:
04/20/2010
Application #:
11860377
Filing Dt:
09/24/2007
Publication #:
US20090079041
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR PACKAGE AND METHOD OF REDUCING ELECTROMAGNETIC INTERFERENCE BETWEEN DEVICES
48
Patent #:
7667314
Issue Dt:
02/23/2010
Application #:
11865064
Filing Dt:
09/30/2007
Publication #:
US20090085199
Pub Dt:
04/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MOLD LOCK SUBASSEMBLY
49
Patent #:
7652382
Issue Dt:
01/26/2010
Application #:
11869737
Filing Dt:
10/09/2007
Publication #:
US20080029861
Pub Dt:
02/07/2008
Title:
MICRO CHIP-SCALE-PACKAGE SYSTEM
50
Patent #:
7727876
Issue Dt:
06/01/2010
Application #:
11934009
Filing Dt:
11/01/2007
Publication #:
US20080150161
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROTECTING PASSIVATION LAYER IN A SOLDER BUMP PROCESS
51
Patent #:
7646105
Issue Dt:
01/12/2010
Application #:
11941409
Filing Dt:
11/16/2007
Publication #:
US20090127719
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS
52
Patent #:
7691747
Issue Dt:
04/06/2010
Application #:
11947617
Filing Dt:
11/29/2007
Publication #:
US20090140381
Pub Dt:
06/04/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING PASSIVE CIRCUIT ELEMENTS WITH THROUGH SILICON VIAS TO BACKSIDE INTERCONNECT STRUCTURES
53
Patent #:
7656017
Issue Dt:
02/02/2010
Application #:
11953340
Filing Dt:
12/10/2007
Publication #:
US20080142943
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THERMO-MECHANICAL INTERLOCKING SUBSTRATES
54
Patent #:
7709944
Issue Dt:
05/04/2010
Application #:
11958838
Filing Dt:
12/18/2007
Publication #:
US20090152701
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
55
Patent #:
7714419
Issue Dt:
05/11/2010
Application #:
11965586
Filing Dt:
12/27/2007
Publication #:
US20090166822
Pub Dt:
07/02/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SHIELDING
56
Patent #:
7656021
Issue Dt:
02/02/2010
Application #:
11968626
Filing Dt:
01/02/2008
Publication #:
US20080122065
Pub Dt:
05/29/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PEDESTAL STRUCTURE
57
Patent #:
7682872
Issue Dt:
03/23/2010
Application #:
12037084
Filing Dt:
02/25/2008
Publication #:
US20080211111
Pub Dt:
09/04/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH UNDERFILL
58
Patent #:
7687313
Issue Dt:
03/30/2010
Application #:
12042312
Filing Dt:
03/04/2008
Publication #:
US20080171402
Pub Dt:
07/17/2008
Title:
METHOD OF FABRICATING A SEMICONDUCTOR MULTI PACKAGE MODULE HAVING AN INVERTED PACKAGE STACKED OVER BALL GRID ARRAY (BGA) PACKAGE
59
Patent #:
7687315
Issue Dt:
03/30/2010
Application #:
12045606
Filing Dt:
03/10/2008
Publication #:
US20080169549
Pub Dt:
07/17/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM AND METHOD OF MANUFACTURE THEREFOR
60
Patent #:
7749814
Issue Dt:
07/06/2010
Application #:
12047640
Filing Dt:
03/13/2008
Publication #:
US20090230542
Pub Dt:
09/17/2009
Title:
SEMICONDUCTOR DEVICE WITH INTEGRATED PASSIVE CIRCUIT AND METHOD OF MAKING THE SAME USING SACRIFICIAL SUBSTRATE
61
Patent #:
7732901
Issue Dt:
06/08/2010
Application #:
12050428
Filing Dt:
03/18/2008
Publication #:
US20090236704
Pub Dt:
09/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH ISOLATED LEADS
62
Patent #:
7741154
Issue Dt:
06/22/2010
Application #:
12055962
Filing Dt:
03/26/2008
Publication #:
US20090243071
Pub Dt:
10/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
63
Patent #:
7750454
Issue Dt:
07/06/2010
Application #:
12056418
Filing Dt:
03/27/2008
Publication #:
US20090243073
Pub Dt:
10/01/2009
Title:
STACKED INTEGRATED CIRCUIT PACKAGE SYSTEM
64
Patent #:
7700407
Issue Dt:
04/20/2010
Application #:
12062293
Filing Dt:
04/03/2008
Publication #:
US20080213941
Pub Dt:
09/04/2008
Title:
A METHOD OF FORMING A BUMP-ON-LEAD FLIP CHIP INTERCONNECTION HAVING HIGHER ESCAPE ROUTING DENSITY
65
Patent #:
7687920
Issue Dt:
03/30/2010
Application #:
12101961
Filing Dt:
04/11/2008
Publication #:
US20090256267
Pub Dt:
10/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH CENTRAL BOND WIRES
66
Patent #:
7645634
Issue Dt:
01/12/2010
Application #:
12125770
Filing Dt:
05/22/2008
Publication #:
US20080220563
Pub Dt:
09/11/2008
Title:
METHOD OF FABRICATING MODULE HAVING STACKED CHIP SCALE SEMICONDUCTOR PACKAGES
67
Patent #:
7666711
Issue Dt:
02/23/2010
Application #:
12127357
Filing Dt:
05/27/2008
Publication #:
US20090294911
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING DOUBLE-SIDED THROUGH VIAS IN SAW STREETS
68
Patent #:
7741156
Issue Dt:
06/22/2010
Application #:
12127417
Filing Dt:
05/27/2008
Publication #:
US20090294914
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH VIAS WITH REFLOWED CONDUCTIVE MATERIAL
69
Patent #:
7648911
Issue Dt:
01/19/2010
Application #:
12127472
Filing Dt:
05/27/2008
Publication #:
US20090294899
Pub Dt:
12/03/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
70
Patent #:
7683469
Issue Dt:
03/23/2010
Application #:
12131038
Filing Dt:
05/30/2008
Publication #:
US20090294941
Pub Dt:
12/03/2009
Title:
PACKAGE-ON-PACKAGE SYSTEM WITH HEAT SPREADER
71
Patent #:
7704796
Issue Dt:
04/27/2010
Application #:
12133177
Filing Dt:
06/04/2008
Publication #:
US20090302478
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING RECESSED CONDUCTIVE VIAS IN SAW STREETS
72
Patent #:
7659145
Issue Dt:
02/09/2010
Application #:
12172817
Filing Dt:
07/14/2008
Publication #:
US20100007029
Pub Dt:
01/14/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING STEPPED-DOWN RDL AND RECESSED THV IN PERIPHERAL REGION OF THE DEVICE
73
Patent #:
7750455
Issue Dt:
07/06/2010
Application #:
12188210
Filing Dt:
08/08/2008
Publication #:
US20100032821
Pub Dt:
02/11/2010
Title:
TRIPLE TIER PACKAGE ON PACKAGE SYSTEM
74
Patent #:
7652376
Issue Dt:
01/26/2010
Application #:
12235521
Filing Dt:
09/22/2008
Publication #:
US20090014899
Pub Dt:
01/15/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE
75
Patent #:
7679169
Issue Dt:
03/16/2010
Application #:
12236227
Filing Dt:
09/23/2008
Publication #:
US20090026597
Pub Dt:
01/29/2009
Title:
STACKED INTEGRATED CIRCUIT LEADFRAME PACKAGE SYSTEM
76
Patent #:
7732252
Issue Dt:
06/08/2010
Application #:
12248878
Filing Dt:
10/09/2008
Publication #:
US20100090350
Pub Dt:
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Title:
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Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED DEVICE AND METHOD OF MANUFACTURE THEREOF
Assignor
1
STATS CHIPPAC PTE. LTE.
Exec Dt:
03/29/2016
Assignee
1
STATS CHIPPAC PTE. LTE.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
SEAN WOODEN
1919 PENNSYLVANIA AVE., SUITE 800
WASHINGTON, DC 20006

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