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Reel/Frame:065236/0767   Pages: 12
Recorded: 09/11/2023
Attorney Dkt #:392739-00007
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 038378 FRAME: 0309. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Total properties: 74
1
Patent #:
7790504
Issue Dt:
09/07/2010
Application #:
11276727
Filing Dt:
03/10/2006
Publication #:
US20070210425
Pub Dt:
09/13/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM
2
Patent #:
7763145
Issue Dt:
07/27/2010
Application #:
11276945
Filing Dt:
03/17/2006
Publication #:
US20070215672
Pub Dt:
09/20/2007
Title:
SYSTEM FOR REMOVAL OF AN INTEGRATED CIRCUIT FROM A MOUNT MATERIAL
3
Patent #:
7829986
Issue Dt:
11/09/2010
Application #:
11278411
Filing Dt:
04/01/2006
Publication #:
US20070235846
Pub Dt:
10/11/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH NET SPACER
4
Patent #:
7763961
Issue Dt:
07/27/2010
Application #:
11278420
Filing Dt:
04/01/2006
Publication #:
US20070235879
Pub Dt:
10/11/2007
Title:
HYBRID STACKING PACKAGE SYSTEM
5
Patent #:
7851268
Issue Dt:
12/14/2010
Application #:
11279131
Filing Dt:
04/10/2006
Publication #:
US20070108596
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM USING HEAT SLUG
6
Patent #:
7768125
Issue Dt:
08/03/2010
Application #:
11326211
Filing Dt:
01/04/2006
Publication #:
US20070158809
Pub Dt:
07/12/2007
Title:
MULTI-CHIP PACKAGE SYSTEM
7
Patent #:
7859098
Issue Dt:
12/28/2010
Application #:
11379332
Filing Dt:
04/19/2006
Publication #:
US20070246806
Pub Dt:
10/25/2007
Title:
EMBEDDED INTEGRATED CIRCUIT PACKAGE SYSTEM
8
Patent #:
7763963
Issue Dt:
07/27/2010
Application #:
11381683
Filing Dt:
05/04/2006
Publication #:
US20060249828
Pub Dt:
11/09/2006
Title:
STACKED PACKAGE SEMICONDUCTOR MODULE HAVING PACKAGES STACKED IN A CAVITY IN THE MODULE SUBSTRATE
9
Patent #:
7759169
Issue Dt:
07/20/2010
Application #:
11456846
Filing Dt:
07/11/2006
Publication #:
US20080012122
Pub Dt:
01/17/2008
Title:
INTEGRATED CIRCUIT HEAT SPREADER STACKING METHOD
10
Patent #:
7833840
Issue Dt:
11/16/2010
Application #:
11462247
Filing Dt:
08/03/2006
Publication #:
US20080032456
Pub Dt:
02/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DOWN-SET DIE PAD AND METHOD OF MANUFACTURE THEREOF
11
Patent #:
7786551
Issue Dt:
08/31/2010
Application #:
11532455
Filing Dt:
09/15/2006
Publication #:
US20070108557
Pub Dt:
05/17/2007
Title:
INTEGRATED CIRCUIT SYSTEM WITH WAFER TRIMMING
12
Patent #:
7851257
Issue Dt:
12/14/2010
Application #:
11538806
Filing Dt:
10/04/2006
Publication #:
US20070114651
Pub Dt:
05/24/2007
Title:
INTEGRATED CIRCUIT STACKING SYSTEM WITH INTEGRATED PASSIVE COMPONENTS
13
Patent #:
7759783
Issue Dt:
07/20/2010
Application #:
11608123
Filing Dt:
12/07/2006
Publication #:
US20080137312
Pub Dt:
06/12/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING THIN PROFILE TECHNIQUES
14
Patent #:
7772683
Issue Dt:
08/10/2010
Application #:
11608827
Filing Dt:
12/09/2006
Publication #:
US20080136006
Pub Dt:
06/12/2008
Title:
STACKED INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
15
Patent #:
7777310
Issue Dt:
08/17/2010
Application #:
11670862
Filing Dt:
02/02/2007
Publication #:
US20080185693
Pub Dt:
08/07/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH INTEGRAL INNER LEAD AND PADDLE
16
Patent #:
7838391
Issue Dt:
11/23/2010
Application #:
11745045
Filing Dt:
05/07/2007
Publication #:
US20080280422
Pub Dt:
11/13/2008
Title:
ULTRA THIN BUMPED WAFER WITH UNDER-FILM
17
Patent #:
7830020
Issue Dt:
11/09/2010
Application #:
11766787
Filing Dt:
06/21/2007
Publication #:
US20080315411
Pub Dt:
12/25/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING DEVICE STACKING
18
Patent #:
7763493
Issue Dt:
07/27/2010
Application #:
11768730
Filing Dt:
06/26/2007
Publication #:
US20090001539
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH TOP AND BOTTOM TERMINALS
19
Patent #:
7863099
Issue Dt:
01/04/2011
Application #:
11769512
Filing Dt:
06/27/2007
Publication #:
US20090001593
Pub Dt:
01/01/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANGING CONNECTION STACK
20
Patent #:
7863706
Issue Dt:
01/04/2011
Application #:
11770690
Filing Dt:
06/28/2007
Publication #:
US20090001509
Pub Dt:
01/01/2009
Title:
CIRCUIT SYSTEM WITH CIRCUIT ELEMENT
21
Patent #:
7800211
Issue Dt:
09/21/2010
Application #:
11771086
Filing Dt:
06/29/2007
Publication #:
US20090001540
Pub Dt:
01/01/2009
Title:
STACKABLE PACKAGE BY USING INTERNAL STACKING MODULES
22
Patent #:
7812435
Issue Dt:
10/12/2010
Application #:
11849087
Filing Dt:
08/31/2007
Publication #:
US20090057861
Pub Dt:
03/05/2009
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM WITH SIDE-BY-SIDE AND OFFSET STACKING
23
Patent #:
7759806
Issue Dt:
07/20/2010
Application #:
11858588
Filing Dt:
09/20/2007
Publication #:
US20090079096
Pub Dt:
03/26/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTIPLE DEVICE UNITS
24
Patent #:
7755180
Issue Dt:
07/13/2010
Application #:
11858861
Filing Dt:
09/20/2007
Publication #:
US20080006925
Pub Dt:
01/10/2008
Title:
INTEGRATED CIRCUIT PACKAGE-IN-PACKAGE SYSTEM
25
Patent #:
7829998
Issue Dt:
11/09/2010
Application #:
11861244
Filing Dt:
09/25/2007
Publication #:
US20080272464
Pub Dt:
11/06/2008
Title:
SEMICONDUCTOR WAFER HAVING THROUGH-HOLE VIAS ON SAW STREETS WITH BACKSIDE REDISTRIBUTION LAYER
26
Patent #:
7772106
Issue Dt:
08/10/2010
Application #:
11936461
Filing Dt:
11/07/2007
Publication #:
US20090117702
Pub Dt:
05/07/2009
Title:
METHOD OF FORMING AN INDUCTOR ON A SEMICONDUCTOR WAFER
27
Patent #:
7790576
Issue Dt:
09/07/2010
Application #:
11947377
Filing Dt:
11/29/2007
Publication #:
US20090140394
Pub Dt:
06/04/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THROUGH HOLE VIAS IN DIE EXTENSION REGION AROUND PERIPHERY OF DIE
28
Patent #:
7838395
Issue Dt:
11/23/2010
Application #:
11951729
Filing Dt:
12/06/2007
Publication #:
US20090146297
Pub Dt:
06/11/2009
Title:
SEMICONDUCTOR WAFER LEVEL INTERCONNECT PACKAGE UTILIZING CONDUCTIVE RING AND PAD FOR SEPARATE VOLTAGE SUPPLIES AND METHOD OF MAKING THE SAME
29
Patent #:
7781261
Issue Dt:
08/24/2010
Application #:
11954613
Filing Dt:
12/12/2007
Publication #:
US20090155960
Pub Dt:
06/18/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OFFSET STACKING AND ANTI-FLASH STRUCTURE
30
Patent #:
7767496
Issue Dt:
08/03/2010
Application #:
11957101
Filing Dt:
12/14/2007
Publication #:
US20090152715
Pub Dt:
06/18/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTERCONNECT STRUCTURE FOR ENCAPSULATED DIE HAVING PRE-APPLIED PROTECTIVE LAYER
31
Patent #:
7790503
Issue Dt:
09/07/2010
Application #:
11958603
Filing Dt:
12/18/2007
Publication #:
US20090155959
Pub Dt:
06/18/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING INTEGRATED PASSIVE DEVICE MODULE
32
Patent #:
7759212
Issue Dt:
07/20/2010
Application #:
11964529
Filing Dt:
12/26/2007
Publication #:
US20090170242
Pub Dt:
07/02/2009
Title:
SYSTEM-IN-PACKAGE HAVING INTEGRATED PASSIVE DEVICES AND METHOD THEREFOR
33
Patent #:
7851246
Issue Dt:
12/14/2010
Application #:
11965160
Filing Dt:
12/27/2007
Publication #:
US20090166785
Pub Dt:
07/02/2009
Title:
SEMICONDUCTOR DEVICE WITH OPTICAL SENSOR AND METHOD OF FORMING INTERCONNECT STRUCTURE ON FRONT AND BACKSIDE OF THE DEVICE
34
Patent #:
7800212
Issue Dt:
09/21/2010
Application #:
11965641
Filing Dt:
12/27/2007
Publication #:
US20090166834
Pub Dt:
07/02/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING INTERPOSER
35
Patent #:
7863102
Issue Dt:
01/04/2011
Application #:
12036056
Filing Dt:
02/22/2008
Publication #:
US20090212415
Pub Dt:
08/27/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXTERNAL INTERCONNECTS WITHIN A DIE PLATFORM
36
Patent #:
7851345
Issue Dt:
12/14/2010
Application #:
12051349
Filing Dt:
03/19/2008
Publication #:
US20090236738
Pub Dt:
09/24/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING OXIDE LAYER ON SIGNAL TRACES FOR ELECTRICAL ISOLATION IN FINE PITCH BONDING
37
Patent #:
7804166
Issue Dt:
09/28/2010
Application #:
12053760
Filing Dt:
03/24/2008
Publication #:
US20090236754
Pub Dt:
09/24/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH STACKING MODULE
38
Patent #:
7785929
Issue Dt:
08/31/2010
Application #:
12054682
Filing Dt:
03/25/2008
Publication #:
US20090243066
Pub Dt:
10/01/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH EXPOSED EXTERNAL INTERCONNECTS
39
Patent #:
7855444
Issue Dt:
12/21/2010
Application #:
12054701
Filing Dt:
03/25/2008
Publication #:
US20090243067
Pub Dt:
10/01/2009
Title:
MOUNTABLE INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SUBSTRATE
40
Patent #:
7759137
Issue Dt:
07/20/2010
Application #:
12055152
Filing Dt:
03/25/2008
Publication #:
US20090243080
Pub Dt:
10/01/2009
Title:
FLIP CHIP INTERCONNECTION STRUCTURE WITH BUMP ON PARTIAL PAD AND METHOD THEREOF
41
Patent #:
7855100
Issue Dt:
12/21/2010
Application #:
12057299
Filing Dt:
03/27/2008
Publication #:
US20080179729
Pub Dt:
07/31/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH AN ENCAPSULANT CAVITY AND METHOD OF FABRICATION THEREOF
42
Patent #:
7859120
Issue Dt:
12/28/2010
Application #:
12122631
Filing Dt:
05/16/2008
Publication #:
US20090283888
Pub Dt:
11/19/2009
Title:
PACKAGE SYSTEM INCORPORATING A FLIP-CHIP ASSEMBLY
43
Patent #:
7777354
Issue Dt:
08/17/2010
Application #:
12132121
Filing Dt:
06/03/2008
Publication #:
US20080303122
Pub Dt:
12/11/2008
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADED PACKAGE
44
Patent #:
7772046
Issue Dt:
08/10/2010
Application #:
12133133
Filing Dt:
06/04/2008
Publication #:
US20090302439
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE HAVING ELECTRICAL DEVICES MOUNTED TO IPD STRUCTURE AND METHOD OF SHIELDING ELECTROMAGNETIC INTERFERENCE
45
Patent #:
7851893
Issue Dt:
12/14/2010
Application #:
12136723
Filing Dt:
06/10/2008
Publication #:
US20090302437
Pub Dt:
12/10/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF CONNECTING A SHIELDING LAYER TO GROUND THROUGH CONDUCTIVE VIAS
46
Patent #:
7863721
Issue Dt:
01/04/2011
Application #:
12137242
Filing Dt:
06/11/2008
Publication #:
US20090309235
Pub Dt:
12/17/2009
Title:
METHOD AND APPARATUS FOR WAFER LEVEL INTEGRATION USING TAPERED VIAS
47
Patent #:
7829984
Issue Dt:
11/09/2010
Application #:
12146101
Filing Dt:
06/25/2008
Publication #:
US20090321899
Pub Dt:
12/31/2009
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM STACKABLE DEVICES
48
Patent #:
7772080
Issue Dt:
08/10/2010
Application #:
12167146
Filing Dt:
07/02/2008
Publication #:
US20100001363
Pub Dt:
01/07/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING ELECTROSTATIC DISCHARGE PROTECTION FOR INTEGRATED PASSIVE DEVICES
49
Patent #:
7842607
Issue Dt:
11/30/2010
Application #:
12173504
Filing Dt:
07/15/2008
Publication #:
US20100013102
Pub Dt:
01/21/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF PROVIDING A THERMAL DISSIPATION PATH THROUGH RDL AND CONDUCTIVE VIA
50
Patent #:
7834430
Issue Dt:
11/16/2010
Application #:
12203332
Filing Dt:
09/03/2008
Publication #:
US20090127720
Pub Dt:
05/21/2009
Title:
DROP-MOLD CONFORMABLE MATERIAL AS AN ENCAPSULATION FOR AN INTEGRATED CIRCUIT PACKAGE SYSTEM
51
Patent #:
7829384
Issue Dt:
11/09/2010
Application #:
12205695
Filing Dt:
09/05/2008
Publication #:
US20090081830
Pub Dt:
03/26/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF LASER-MARKING WAFERS WITH TAPE APPLIED TO ITS ACTIVE SURFACE
52
Patent #:
7812449
Issue Dt:
10/12/2010
Application #:
12207459
Filing Dt:
09/09/2008
Publication #:
US20100059885
Pub Dt:
03/11/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH REDISTRIBUTION LAYER
53
Patent #:
7772081
Issue Dt:
08/10/2010
Application #:
12212524
Filing Dt:
09/17/2008
Publication #:
US20100065942
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING HIGH-FREQUENCY CIRCUIT STRUCTURE AND METHOD THEREOF
54
Patent #:
7777320
Issue Dt:
08/17/2010
Application #:
12236437
Filing Dt:
09/23/2008
Publication #:
US20100072586
Pub Dt:
03/25/2010
Title:
QUAD FLAT PACK IN QUAD FLAT PACK INTEGRATED CIRCUIT PACKAGE SYSTEM
55
Patent #:
7859094
Issue Dt:
12/28/2010
Application #:
12238183
Filing Dt:
09/25/2008
Publication #:
US20100072597
Pub Dt:
03/25/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
56
Patent #:
7842542
Issue Dt:
11/30/2010
Application #:
12266313
Filing Dt:
11/06/2008
Publication #:
US20100006994
Pub Dt:
01/14/2010
Title:
EMBEDDED SEMICONDUCTOR DIE PACKAGE AND METHOD OF MAKING THE SAME USING METAL FRAME CARRIER
57
Patent #:
7843047
Issue Dt:
11/30/2010
Application #:
12276297
Filing Dt:
11/21/2008
Publication #:
US20100127361
Pub Dt:
05/27/2010
Title:
ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR
58
Patent #:
7838337
Issue Dt:
11/23/2010
Application #:
12325587
Filing Dt:
12/01/2008
Publication #:
US20100133704
Pub Dt:
06/03/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING AN INTERPOSER PACKAGE WITH THROUGH SILICON VIAS
59
Patent #:
7863109
Issue Dt:
01/04/2011
Application #:
12329482
Filing Dt:
12/05/2008
Publication #:
US20100140809
Pub Dt:
06/10/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A PROTRUSION ON AN INNER STACKING MODULE AND METHOD OF MANUFACTURE THEREOF
60
Patent #:
7858441
Issue Dt:
12/28/2010
Application #:
12329778
Filing Dt:
12/08/2008
Publication #:
US20100140779
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR PACKAGE WITH SEMICONDUCTOR CORE STRUCTURE AND METHOD OF FORMING SAME
61
Patent #:
7776655
Issue Dt:
08/17/2010
Application #:
12331682
Filing Dt:
12/10/2008
Publication #:
US20100140795
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING CONDUCTIVE PILLARS IN RECESSED REGION OF PERIPHERAL AREA AROUND THE DEVICE FOR ELECTRICAL INTERCONNECTION TO OTHER DEVICES
62
Patent #:
7799602
Issue Dt:
09/21/2010
Application #:
12332277
Filing Dt:
12/10/2008
Publication #:
US20100140759
Pub Dt:
06/10/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING A SHIELDING LAYER OVER A SEMICONDUCTOR DIE AFTER FORMING A BUILD-UP INTERCONNECT STRUCTURE
63
Patent #:
7859099
Issue Dt:
12/28/2010
Application #:
12333297
Filing Dt:
12/11/2008
Publication #:
US20100148354
Pub Dt:
06/17/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIA WITH DIRECT INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
64
Patent #:
7786008
Issue Dt:
08/31/2010
Application #:
12334347
Filing Dt:
12/12/2008
Publication #:
US20100148336
Pub Dt:
06/17/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM HAVING THROUGH SILICON VIAS WITH PARTIAL DEPTH METAL FILL REGIONS AND METHOD OF MANUFACTURE THEREOF
65
Patent #:
7785925
Issue Dt:
08/31/2010
Application #:
12340638
Filing Dt:
12/19/2008
Publication #:
US20100155918
Pub Dt:
06/24/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
66
Patent #:
7858442
Issue Dt:
12/28/2010
Application #:
12353020
Filing Dt:
01/13/2009
Publication #:
US20090142883
Pub Dt:
06/04/2009
Title:
LEADED STACKED PACKAGES HAVING ELEVATED DIE PADDLE
67
Patent #:
7863100
Issue Dt:
01/04/2011
Application #:
12408662
Filing Dt:
03/20/2009
Publication #:
US20100237482
Pub Dt:
09/23/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LAYERED PACKAGING AND METHOD OF MANUFACTURE THEREOF
68
Patent #:
7847382
Issue Dt:
12/07/2010
Application #:
12412064
Filing Dt:
03/26/2009
Publication #:
US20100244219
Pub Dt:
09/30/2010
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE STACKING AND METHOD OF MANUFACTURE THEREOF
69
Patent #:
7863108
Issue Dt:
01/04/2011
Application #:
12473239
Filing Dt:
05/27/2009
Publication #:
US20090230529
Pub Dt:
09/17/2009
Title:
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ETCHED RING AND DIE PADDLE AND METHOD OF MANUFACTURE THEREOF
70
Patent #:
7843042
Issue Dt:
11/30/2010
Application #:
12493108
Filing Dt:
06/26/2009
Publication #:
US20090261460
Pub Dt:
10/22/2009
Title:
WAFER LEVEL INTEGRATION PACKAGE
71
Patent #:
7863726
Issue Dt:
01/04/2011
Application #:
12612630
Filing Dt:
11/04/2009
Publication #:
US20100052150
Pub Dt:
03/04/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS AND METHOD OF MANUFACTURE THEREOF
72
Patent #:
7838899
Issue Dt:
11/23/2010
Application #:
12623351
Filing Dt:
11/20/2009
Publication #:
US20100065936
Pub Dt:
03/18/2010
Title:
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH IMAGE SENSOR SYSTEM
73
Patent #:
7859085
Issue Dt:
12/28/2010
Application #:
12627884
Filing Dt:
11/30/2009
Publication #:
US20100072570
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING EMBEDDED PASSIVE CIRCUIT ELEMENTS INTERCONNECTED TO THROUGH HOLE VIAS
74
Patent #:
7786575
Issue Dt:
08/31/2010
Application #:
12631476
Filing Dt:
12/04/2009
Publication #:
US20100078794
Pub Dt:
04/01/2010
Title:
STACKED DIE SEMICONDUCTOR DEVICE HAVING CIRCUIT TAPE
Assignor
1
STATS CHIPPAC LTD.
Exec Dt:
03/29/2016
Assignee
1
STATS CHIPPAC PTE. LTD.
5 YISHUN STREET 23
SINGAPORE, SINGAPORE
Correspondence name and address
KATTEN MUCHIN ROSENMAN LLP
1919 PENNSYLVANIA AVE., NW - SUITE 800
WASHINGTON, DC 20006

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