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Reel/Frame:066778/0178   Pages: 8
Recorded: 03/09/2024
Attorney Dkt #:SONRAI
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 63
1
Patent #:
Issue Dt:
05/24/2005
Application #:
09564341
Filing Dt:
05/03/2000
Title:
HIGHLY CONCURRENT DMA CONTROLLER WITH PROGRAMMABLE DMA CHANNELS
2
Patent #:
Issue Dt:
06/29/2004
Application #:
09584034
Filing Dt:
05/30/2000
Title:
SLACK FETCH TO IMPROVE PERFORMANCE IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
3
Patent #:
Issue Dt:
02/08/2005
Application #:
09837995
Filing Dt:
04/19/2001
Publication #:
Pub Dt:
10/25/2001
Title:
SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR STORE INSTRUCTION COMPARATOR
4
Patent #:
Issue Dt:
09/14/2004
Application #:
09838069
Filing Dt:
04/19/2001
Publication #:
Pub Dt:
11/01/2001
Title:
INPUT REPLICATOR FOR INTERRUPTS IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
5
Patent #:
Issue Dt:
02/08/2005
Application #:
09839459
Filing Dt:
04/19/2001
Publication #:
Pub Dt:
11/01/2001
Title:
CYCLE COUNT REPLICATION IN A SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR
6
Patent #:
Issue Dt:
07/22/2003
Application #:
09839621
Filing Dt:
04/19/2001
Publication #:
Pub Dt:
10/25/2001
Title:
ACTIVE LOAD ADDRESS BUFFER
7
Patent #:
Issue Dt:
11/23/2004
Application #:
09839626
Filing Dt:
04/19/2001
Publication #:
Pub Dt:
10/25/2001
Title:
SIMULTANEOUS AND REDUNDANTLY THREADED PROCESSOR UNCACHED LOAD ADDRESS COMPARATOR AND DATA VALUE REPLICATION CIRCUIT
8
Patent #:
Issue Dt:
03/29/2005
Application #:
09865605
Filing Dt:
05/29/2001
Publication #:
Pub Dt:
12/05/2002
Title:
CHIP MULTIPROCESSOR WITH MULTIPLE OPERATING SYSTEMS
9
Patent #:
Issue Dt:
02/28/2006
Application #:
09870460
Filing Dt:
06/01/2001
Publication #:
Pub Dt:
01/02/2003
Title:
MODIFIED HARVARD ARCHITECTURE PROCESSOR HAVING DATA MEMORY SPACE MAPPED TO PROGRAM MEMORY SPACE WITH ERRONEOUS EXECUTION PROTECTION
10
Patent #:
Issue Dt:
04/11/2006
Application #:
09965883
Filing Dt:
09/28/2001
Publication #:
Pub Dt:
05/08/2003
Title:
ERROR INDICATION IN A RAID MEMORY SYSTEM
11
Patent #:
Issue Dt:
03/11/2008
Application #:
10029699
Filing Dt:
12/18/2001
Publication #:
Pub Dt:
05/09/2002
Title:
SOFTWARE CONTROLLED PRE-EXECUTION IN A MULTITHREADED PROCESSOR
12
Patent #:
Issue Dt:
11/18/2003
Application #:
10071605
Filing Dt:
02/08/2002
Publication #:
Pub Dt:
09/26/2002
Title:
DEVICE GENERATING A PRECISE REFERENCE VOLTAGE
13
Patent #:
Issue Dt:
12/14/2004
Application #:
10179081
Filing Dt:
06/25/2002
Publication #:
Pub Dt:
12/25/2003
Title:
MEMORY AUTO-PRECHARGE
14
Patent #:
Issue Dt:
12/07/2004
Application #:
10187337
Filing Dt:
06/28/2002
Publication #:
Pub Dt:
01/01/2004
Title:
SYSTEM FOR COMPRESSING/DECOMPRESSING DATA
15
Patent #:
Issue Dt:
06/28/2005
Application #:
10206217
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
08/14/2003
Title:
DISTRIBUTED FEEDBACK LASER DEVICE
16
Patent #:
Issue Dt:
06/01/2004
Application #:
10232636
Filing Dt:
08/30/2002
Publication #:
Pub Dt:
03/04/2004
Title:
POWER-ON RESET CIRCUIT
17
Patent #:
Issue Dt:
09/14/2004
Application #:
10348782
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
07/22/2004
Title:
METHOD FOR COUNTING BEYOND ENDURANCE LIMITATIONS OF NON-VOLATILE MEMORIES
18
Patent #:
Issue Dt:
04/20/2004
Application #:
10352733
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
04/29/2004
Title:
VARIABLE CHARGE PUMP CIRCUIT WITH DYNAMIC LOAD
19
Patent #:
Issue Dt:
07/19/2005
Application #:
10364583
Filing Dt:
02/11/2003
Publication #:
Pub Dt:
08/12/2004
Title:
PORTABLE RAM DRIVE
20
Patent #:
Issue Dt:
10/26/2004
Application #:
10407622
Filing Dt:
04/03/2003
Publication #:
Pub Dt:
03/18/2004
Title:
TEMPERATURE-COMPENSATED CURRENT REFERENCE CIRCUIT
21
Patent #:
Issue Dt:
07/12/2005
Application #:
10453157
Filing Dt:
06/03/2003
Publication #:
Pub Dt:
12/09/2004
Title:
INTEGRATING CHIP SCALE PACKAGING METALLIZATION INTO INTEGRATED CIRCUIT DIE STRUCTURES
22
Patent #:
Issue Dt:
08/22/2006
Application #:
10505180
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
10/13/2005
Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
23
Patent #:
Issue Dt:
10/14/2008
Application #:
10666142
Filing Dt:
09/17/2003
Publication #:
Pub Dt:
12/23/2004
Title:
REGENERATIVE CLOCK REPEATER
24
Patent #:
Issue Dt:
04/05/2005
Application #:
10687980
Filing Dt:
10/16/2003
Publication #:
Pub Dt:
04/21/2005
Title:
DIFFERENTIAL CHARGE PUMP
25
Patent #:
Issue Dt:
05/31/2005
Application #:
10760434
Filing Dt:
01/20/2004
Publication #:
Pub Dt:
12/09/2004
Title:
INTEGRATING CHIP SCALE PACKAGING METALLIZATION INTO INTEGRATED CIRCUIT DIE STRUCTURES
26
Patent #:
Issue Dt:
01/09/2007
Application #:
10762767
Filing Dt:
01/20/2004
Publication #:
Pub Dt:
07/21/2005
Title:
PERIPHERAL DEVICE FEATURE ALLOWING PROCESSORS TO ENTER A LOW POWER STATE
27
Patent #:
Issue Dt:
08/30/2005
Application #:
10802894
Filing Dt:
03/16/2004
Publication #:
Pub Dt:
09/22/2005
Title:
HIGH FREQUENCY DIFFERENTIAL POWER AMPLIFIER
28
Patent #:
Issue Dt:
09/05/2006
Application #:
10910038
Filing Dt:
08/02/2004
Publication #:
Pub Dt:
02/02/2006
Title:
FUSE DATA STORAGE SYSTEM USING CORE MEMORY
29
Patent #:
Issue Dt:
04/03/2007
Application #:
10946432
Filing Dt:
09/21/2004
Publication #:
Pub Dt:
02/02/2006
Title:
INCREMENT/DECREMENT, CHIP SELECT AND SELECTABLE WRITE TO NON-VOLATILE MEMORY USING A TWO SIGNAL CONTROL PROTOCOL FOR AN INTEGRATED CIRCUIT DEVICE
30
Patent #:
Issue Dt:
08/15/2006
Application #:
10954584
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
02/02/2006
Title:
WRITE PROTECTION USING A TWO SIGNAL CONTROL PROTOCOL FOR AN INTEGRATED CIRCUIT DEVICE HAVING PARAMETER CHANGE CAPABILITY, CHIP SELECT AND SELECTABLE WRITE TO NON-VOLATILE MEMORY
31
Patent #:
Issue Dt:
05/01/2007
Application #:
10980536
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
03/24/2005
Title:
INTEGRATING CHIP SCALE PACKAGING METALLIZATION INTO INTEGRATED CIRCUIT DIE STRUCTURES
32
Patent #:
Issue Dt:
02/26/2008
Application #:
11049334
Filing Dt:
02/01/2005
Publication #:
Pub Dt:
08/03/2006
Title:
NONVOLATILE LATCH
33
Patent #:
Issue Dt:
10/10/2006
Application #:
11061799
Filing Dt:
02/18/2005
Publication #:
Pub Dt:
10/06/2005
Title:
METHOD AND APPARATUS FOR A DUAL POWER SUPPLY TO EMBEDDED NON-VOLATILE MEMORY
34
Patent #:
Issue Dt:
05/15/2007
Application #:
11062888
Filing Dt:
02/22/2005
Publication #:
Pub Dt:
09/22/2005
Title:
ELECTRIC REFERENCE VOLTAGE GENERATING DEVICE OF IMPROVED ACCURACY AND CORRESPONDING ELECTRONIC INTEGRATED CIRCUIT
35
Patent #:
Issue Dt:
07/10/2007
Application #:
11135527
Filing Dt:
05/23/2005
Publication #:
Pub Dt:
09/22/2005
Title:
MODIFIED HARVARD ARCHITECTURE PROCESSOR HAVING DATA MEMORY SPACE MAPPED TO PROGRAM MEMORY SPACE WITH ERRONEOUS EXECUTION PROTECTION
36
Patent #:
Issue Dt:
08/21/2007
Application #:
11168833
Filing Dt:
06/28/2005
Publication #:
Pub Dt:
12/28/2006
Title:
EFFICIENT CHARGE PUMP FOR A WIDE RANGE OF SUPPLY VOLTAGES
37
Patent #:
Issue Dt:
02/12/2008
Application #:
11203938
Filing Dt:
08/15/2005
Publication #:
Pub Dt:
11/16/2006
Title:
SENSE AMPLIFIER CIRCUIT FOR PARALLEL SENSING OF FOUR CURRENT LEVELS
38
Patent #:
Issue Dt:
01/15/2008
Application #:
11291243
Filing Dt:
12/01/2005
Publication #:
Pub Dt:
04/20/2006
Title:
ERROR INDICATION IN A RAID MEMORY SYSTEM
39
Patent #:
Issue Dt:
05/06/2008
Application #:
11457377
Filing Dt:
07/13/2006
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD AND APPARATUS TO PREVENT HIGH VOLTAGE SUPPLY DEGRADATION FOR HIGH-VOLTAGE LATCHES OF A NON-VOLATILE MEMORY
40
Patent #:
Issue Dt:
02/05/2008
Application #:
11530977
Filing Dt:
09/12/2006
Publication #:
Pub Dt:
02/01/2007
Title:
ELECTRICALLY DISCONNECTING A PERIPHERAL DEVICE
41
Patent #:
Issue Dt:
11/18/2008
Application #:
11539564
Filing Dt:
10/06/2006
Publication #:
Pub Dt:
04/10/2008
Title:
APPARATUS FOR ELIMINATING LEAKAGE CURRENT OF A LOW VT DEVICE IN A COLUMN LATCH
42
Patent #:
Issue Dt:
11/11/2008
Application #:
11539567
Filing Dt:
10/06/2006
Publication #:
Pub Dt:
04/19/2007
Title:
METHOD AND APPARATUS FOR A DUAL POWER SUPPLY TO EMBEDDED NON-VOLATILE MEMORY
43
Patent #:
Issue Dt:
08/26/2008
Application #:
11554797
Filing Dt:
10/31/2006
Publication #:
Pub Dt:
05/01/2008
Title:
ADAPTIVE GATE VOLTAGE REGULATION
44
Patent #:
Issue Dt:
03/02/2010
Application #:
11610107
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
06/19/2008
Title:
AMPLITUDE CONTROLLED SAWTOOTH GENERATOR
45
Patent #:
Issue Dt:
02/26/2008
Application #:
11624139
Filing Dt:
01/17/2007
Title:
DIFFERENTIAL AMPLITUDE CONTROLLED SAWTOOTH GENERATOR
46
Patent #:
Issue Dt:
09/09/2008
Application #:
11668844
Filing Dt:
01/30/2007
Publication #:
Pub Dt:
07/31/2008
Title:
CLOCK CIRCUITRY FOR DDR-SDRAM MEMORY CONTROLLER
47
Patent #:
Issue Dt:
02/15/2011
Application #:
11747503
Filing Dt:
05/11/2007
Publication #:
Pub Dt:
04/03/2008
Title:
POWER SEMICONDUCTOR DEVICE
48
Patent #:
Issue Dt:
03/24/2009
Application #:
11846959
Filing Dt:
08/29/2007
Title:
METHOD FOR ENHANCING LINEARITY OF A TRANSISTOR AMPLIFIER USING SWITCHED CAPACITIVE LOADS
49
Patent #:
Issue Dt:
07/06/2010
Application #:
11933805
Filing Dt:
11/01/2007
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD AND APPARATUS TO PREVENT HIGH VOLTAGE SUPPLY DEGRADATION FOR HIGH-VOLTAGE LATCHES OF A NON-VOLATILE MEMORY
50
Patent #:
Issue Dt:
09/21/2010
Application #:
12014261
Filing Dt:
01/15/2008
Publication #:
Pub Dt:
07/24/2008
Title:
DIFFERENTIAL AMPLITUDE CONTROLLED SAWTOOTH GENERATOR
51
Patent #:
Issue Dt:
02/07/2012
Application #:
12031289
Filing Dt:
02/14/2008
Publication #:
Pub Dt:
08/20/2009
Title:
ERROR DETECTING/CORRECTING SCHEME FOR MEMORIES
52
Patent #:
Issue Dt:
03/16/2010
Application #:
12207147
Filing Dt:
09/09/2008
Publication #:
Pub Dt:
01/08/2009
Title:
CLOCK CIRCUITRY FOR DDR-SDRAM MEMORY CONTROLLER
53
Patent #:
Issue Dt:
11/30/2010
Application #:
12395518
Filing Dt:
02/27/2009
Publication #:
Pub Dt:
09/02/2010
Title:
DUAL MODE, SINGLE ENDED TO FULLY DIFFERENTIAL CONVERTER STRUCTURE
54
Patent #:
Issue Dt:
07/17/2012
Application #:
12436620
Filing Dt:
05/06/2009
Publication #:
Pub Dt:
11/11/2010
Title:
CYCLIC DIGITAL TO ANALOG CONVERTER
55
Patent #:
Issue Dt:
06/05/2012
Application #:
12481330
Filing Dt:
06/09/2009
Publication #:
Pub Dt:
12/10/2009
Title:
CIRCUIT AND METHOD FOR OPERATING A CIRCUIT
56
Patent #:
Issue Dt:
04/16/2013
Application #:
13042575
Filing Dt:
03/08/2011
Publication #:
Pub Dt:
12/29/2011
Title:
POWER SEMICONDUCTOR DEVICE
57
Patent #:
Issue Dt:
07/03/2012
Application #:
13335725
Filing Dt:
12/22/2011
Publication #:
Pub Dt:
04/19/2012
Title:
ERROR DETECTING/CORRECTING SCHEME FOR MEMORIES
58
Patent #:
Issue Dt:
04/09/2013
Application #:
13485426
Filing Dt:
05/31/2012
Publication #:
Pub Dt:
09/20/2012
Title:
CIRCUIT AND METHOD FOR OPERATING A CIRCUIT
59
Patent #:
Issue Dt:
09/09/2014
Application #:
13753674
Filing Dt:
01/30/2013
Publication #:
Pub Dt:
06/06/2013
Title:
POWER SEMICONDUCTOR DEVICE
60
Patent #:
Issue Dt:
02/09/2016
Application #:
14336774
Filing Dt:
07/21/2014
Publication #:
Pub Dt:
11/06/2014
Title:
POWER SEMICONDUCTOR DEVICE WITH RESISTANCE CONTEROL STRUCTURE
61
Patent #:
Issue Dt:
08/02/2016
Application #:
14414283
Filing Dt:
01/12/2015
Publication #:
Pub Dt:
07/23/2015
Title:
ANALOG FEEDBACK AMPLIFIER
62
Patent #:
Issue Dt:
01/24/2017
Application #:
14925344
Filing Dt:
10/28/2015
Publication #:
Pub Dt:
08/18/2016
Title:
FREQUENCY MULTIPLIER
63
Patent #:
Issue Dt:
01/16/2018
Application #:
15048340
Filing Dt:
02/19/2016
Publication #:
Pub Dt:
12/01/2016
Title:
MULTISTAGE AMPLIFIER
Assignor
1
Exec Dt:
03/05/2024
Assignee
1
SUITE 23, THE HYDE BUILDING
CARRICKMINES
DUBLIN, IRELAND 18
Correspondence name and address
ANTONIO PAPAGEORGIOU
230 PARK AVENUE, 4TH FLOOR WEST
LOMBARD & GELIEBTER LLP
NEW YORK, NY 10169

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