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10/04/1994
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08136930
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10/18/1993
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03/14/1995
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08143170
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10/26/1993
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09/12/1995
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08153915
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11/17/1993
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12/26/1995
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12/29/1993
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06/13/1995
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08178138
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01/06/1994
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12/05/1995
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08180673
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01/13/1994
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02/20/1996
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01/13/1994
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07/18/1995
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01/19/1994
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05/16/1995
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02/10/1994
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08/08/1995
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02/09/1994
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02/14/1995
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08204866
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03/02/1994
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08/15/1995
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08221965
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04/04/1994
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12/05/1995
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08230151
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04/19/1994
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07/30/1996
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04/29/1994
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09/03/1996
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05/02/1994
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08/15/1995
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08248765
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05/25/1994
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03/18/1997
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08/12/1994
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05/07/1996
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08290110
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08/15/1994
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08/08/1995
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08309574
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09/21/1994
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02/20/1996
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09/28/1994
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09/09/1997
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11/22/1994
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03/05/1996
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12/20/1994
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02/20/1996
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03/02/1995
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11/21/1995
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08405770
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03/17/1995
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02/25/1997
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08405884
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03/17/1995
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EEPROM ARRAY WITH FLASH-LIKE CORE
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10/15/1996
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08418475
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04/07/1995
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SWITCH WITH A FIRST SWITCHING ELEMENT IN THE FORM OF A BIPOLAR TRANSISTOR
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10/24/1995
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08428848
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04/25/1995
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SYNCHRONIZATION APPARATUS FOR A DIVERSITY RECEIVER
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07/30/1996
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08432926
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05/01/1995
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OUTPUT CIRCUIT FOR AN TTL-CMOS INTEGRATED CIRCUIT
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04/02/1996
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08438423
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05/10/1995
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METHOD AND APPARATUS FOR COMPARING DATA SETS
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02/18/1997
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08441734
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05/16/1995
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TRANSITION DETECTION DEVICE GENERATING A VARIABLE-DURATION PULSE
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01/14/1997
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08492390
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06/19/1995
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PROGRAMMABLE LOGIC DEVICE WITH REGIONAL AND UNIVERSAL SIGNAL ROUTING
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12/10/1996
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08501503
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07/11/1995
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INTEGRATED CIRCUIT CONTACTS WITH SECURED STRINGERS
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12/24/1996
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08511311
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08/04/1995
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HIGH SPEED, LOW VOLTAGE NON-VOLATILE MEMORY
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02/11/1997
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08521112
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08/29/1995
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GALOIS FIELD POLYNOMIAL MULTIPLY/DIVIDE CIRCUIT AND A DIGITAL SIGNAL PROCESSOR INCORPORATING SAME
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12/03/1996
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08523032
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09/01/1995
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METHOD AND APPARATUS TO ADAPTIVELY CONTROL THE FREQUENCY OF RECEPTION IN A DIGITAL WIRELESS COMMUNICATION SYSTEM
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03/24/1998
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08526027
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09/08/1995
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MOBILE TELECOMMUNICATION DEVICE AMD METHOD USED FOR CHANGING WIRELESS COMMUNICATION BETWEEN BASE STATIONS OF DIFFERENT KINDS
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06/08/1999
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08526066
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09/08/1995
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Title:
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WIRELESS COMMUNICATION SYSTEM HAVING MOBILE STATIONS ESTABLISH A COMMUNICATION LINK THROUGH THE BASE STATION WITHOUT USING A LANDLINE OR REGIONAL CELLULAR NETWORK AND WITHOUT A CALL IN PROGESS
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10/26/1999
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08526556
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09/12/1995
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Title:
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PROCESS FOR REDUCING THE SURFACE RECOMBINATION SPEED IN SILICON
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03/09/1999
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08533400
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09/25/1995
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DEVICE FOR INTERFACING LOGIC SIGNALS FROM THE LLL LEVEL TO THE TTL AND CMOS LEVEL
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05/27/1997
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08558745
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11/16/1995
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DIGITAL SIGNAL PROCESSOR OPTIMIZED FOR DECODING A SIGNAL ENCODED IN ACCORDANCE WITH A VITERBI ALGORITHM
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02/11/1997
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08568341
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12/06/1995
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COMPARATOR OF PHASE BETWEEN A DIGITAL SIGNAL AND A CLOCK SIGNAL, AND CORRESPONDING PHASE LOCKED LOOP
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03/24/1998
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08578464
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12/26/1995
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TIME DOMAIN CAPACITIVE FIELD DETECTOR
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11/02/1999
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08581047
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12/29/1995
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CIRCUIT FOR ROTATING, LEFT SHIFTING, OR RIGHT SHIFTING BITS
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09/08/1998
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08582516
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01/03/1996
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NON-DISRUPTIVE, RANDOMLY ADDRESSABLE MEMORY SYSTEM
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10/21/1997
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08593788
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01/30/1996
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METHOD OF FABRICATING A READ ONLY MEMORY IN MOS TECHNOLOGY, AND MEMORY THUS OBTAINED
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10/28/1997
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08604843
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02/22/1996
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CAPACITIVELY COUPLED IDENTITY VERIFICATION AND ESCORT MEMORY APPARATUS
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05/30/2006
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08631331
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04/12/1996
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METHOD FOR DETERMINING THE BEGINNING OF A SECOND IN THE SIGNAL OF A TIME-SIGNAL TRANSMITTER
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04/22/1997
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08648306
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05/13/1996
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METHOD OF MAKING A HIGH VOLTAGE RECTIFIER FOR AN INTEGRATED CIRCUIT CHIP
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04/13/1999
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08650477
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05/20/1996
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FIELD PROGRAMMABLE GATE ARRAY WITH DISTRIBUTED RAM AND INCREASED CELL UTILIZATION
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03/24/1998
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08661175
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06/10/1996
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OUTPUT INTERFACING DEVICE PROGRAMMABLE AMONG THREE STATES FOR A MEMORY IN CMOS TECHNOLOGY
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07/27/1999
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08662446
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06/10/1996
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HETERODYNE RECEIVER WITH SYNCHRONOUS DEMODULATION FOR RECEIVING TIME SIGNALS
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10/21/1997
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08672299
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06/28/1996
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HIGH-SPEED, NON-VOLATILE ELECTRICALLY PROGRAMMABLE AND ERASABLE CELL AND METHOD
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05/19/1998
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08684258
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07/19/1996
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ANALOG-TO DIGITAL CONVERSION DEVICE HAVING A STANDBY MODE
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10/20/1998
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08685848
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07/24/1996
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INTEGRATED CIRCUIT ARRANGEMENT WITH DIODE CHARACTERISTIC
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09/29/1998
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08691562
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08/02/1996
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VOLTAGE TO CURRENT CONVERTER FOR HIGH FREQUENCY APPLICATIONS
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12/30/1997
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08709060
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09/06/1996
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PROGRAMMABLE ARRAY CLOCK/RESET RESOURCE
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02/10/1998
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08709074
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09/06/1996
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LOW SKEW MULTIPLEXER NETWORK AND PROGRAMMABLE ARRAY CLOCK/RESET APPLICATIONS THEREOF
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07/21/1998
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08714376
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09/16/1996
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CLOCK FEEDTHROUGH REDUCTION SYSTEM FOR SWITCHED CURRENT MEMORY CELLS
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06/09/1998
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08714605
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09/16/1996
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EEPROM ARRAY WITH FLASH-LIKE CORE HAVING ECC OR A WRITE CACHE OR INTERRUPTIBLE LOAD CYCLES
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12/09/1997
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08726421
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10/07/1996
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TRANSMIT-RECEIVER SWITCH
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03/24/1998
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08726956
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10/07/1996
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Title:
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ZERO POWER FUSE CIRCUIT
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12/30/1997
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08730592
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10/15/1996
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DIGITAL TO ANALOG CONVERTER WITH DUAL RESISTOR STRING
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08/31/1999
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08739606
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10/30/1996
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METHOD AND SYSTEM FOR CONFIGURING AN ARRAY OF LOGIC DEVICES
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12/29/1998
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08745098
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11/07/1996
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Title:
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EIGHT-BIT MICROCONTROLLER HAVING A RISC ARCHITECTURE
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08/04/1998
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08750203
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02/19/1997
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ECL LEVEL/CMOS LEVEL LOGIC SIGNAL INTERFACING DEVICE
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09/08/1998
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08750246
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01/14/1997
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OVERSAMPLED HIGH-ORDER MODULATOR
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07/14/1998
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08788523
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01/24/1997
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BITLINE LOAD AND PRECHARGE STRUCTURE FOR AN SRAM MEMORY
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08/31/1999
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08805067
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02/25/1997
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INTEGRATED CIRCUIT LAYOUT COMPLETE WITH A BUS LOGIC UNIT CONNECTED TO A DATA BUS WITH POWER REDUCTION CIRCUITRY
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10/13/1998
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08815010
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03/14/1997
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Title:
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METHOD OF FABRICATING A HETEROBIPOLAR TRANSISTOR
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10/13/1998
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08824175
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03/26/1997
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DUAL BUFFER FLASH MEMORY ARCHITECTURE WITH MULTIPLE OPERATING MODES
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09/15/1998
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08824932
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03/27/1997
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Title:
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EIGHT-BIT MICROCONTROLLER HAVING A RISC ARCHITECTURE
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09/08/1998
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08826842
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04/08/1997
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Title:
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ELECTRONIC FLASHER UNIT FOR VEHICLE LIGHTING SYSTEM AND METHOD OF MONITORING THE OPERATION THEREOF
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03/24/1998
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08829378
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03/31/1997
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Title:
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COMBINED PROGRAM AND DATA NONVOLATILE MEMORY WITH CONCURRENT PROGRAM-READ/DATA WRITE CAPABILITY
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10/27/1998
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08842008
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04/23/1997
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A MEMORY DEVICE HAVING A POWER SUPPLY-INDEPENDENT LOW POWER COMSUMP TION BIT LINE VOLTAGE CLAMP
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10/06/2008
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08852473
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08/06/2008
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INTERGRATED CIRCUIT ARRANGEMENT WITH AN OPEN-COLLECTOR TRANSISTOR DESIGNED AS NPN TRANSISTOR
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04/06/1999
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08855568
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05/13/1997
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TRIGGERING PROCESS FOR PASSIVE SAFETY DEVICES IN VEHICLES
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09/05/2000
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Application #:
|
08855645
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Filing Dt:
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05/13/1997
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Title:
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TRIGGERING PROCESS FOR PASSIVE SAFETY DEVICES IN VEHICLES
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Patent #:
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Issue Dt:
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08/03/1999
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Application #:
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08872822
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Filing Dt:
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06/10/1997
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Title:
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DIGITAL CIRCUIT USING MEMORY FOR MONITORING SIGNALS FOR OCCURRENCES OF PREDEFINED BREAKPOINT CONDITIONS
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08887607
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Filing Dt:
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07/03/1997
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Title:
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DURATION AND FREQUENCY PROGRAMMABLE ELECTRONIC PULSE GENERATOR
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Patent #:
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Issue Dt:
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04/27/1999
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Application #:
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08896084
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Filing Dt:
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07/17/1997
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Title:
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APPARATUS AND METHOD FOR SIMPLIFIED ANALOG SIGNAL RECORD AND PLAYBACK
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Patent #:
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Issue Dt:
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05/30/2000
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Application #:
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08908428
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Filing Dt:
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08/07/1997
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Title:
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METHOD FOR TESTING A LARGE QUANTITY OF PRODUCTS
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Patent #:
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Issue Dt:
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10/26/1999
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Application #:
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08909988
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Filing Dt:
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08/12/1997
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Title:
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UNIVERSAL SERIAL BUS DEVICE CONTROLLER COMPRISING A FIFO ASSOCIATED WITH A PLURALITY OF ENDPOINTS AND A MEMORY FOR STORING AN IDENTIFIER OF A CURRENT ENDPOINT
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Patent #:
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Issue Dt:
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09/07/1999
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Application #:
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08935405
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Filing Dt:
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09/22/1997
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Title:
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HIGH IMPEDANCE BIAS CIRCUIT FOR AC SIGNAL AMPLIFIERS
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Patent #:
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Issue Dt:
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02/15/2000
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Application #:
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08936334
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Filing Dt:
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09/24/1997
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Title:
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FPGA LOGIC CELL INTERNAL STRUCTURE INCLUDING PAIR OF LOOK-UP TABLES
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Patent #:
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Issue Dt:
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01/11/2000
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Application #:
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08937105
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Filing Dt:
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09/24/1997
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Title:
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FIELD PROGRAMMABLE GATE ARRAY HAVING ACCESS TO ORTHOGONAL AND DIAGONAL ADJACENT NEIGHBORING CELLS
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Patent #:
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Issue Dt:
|
11/23/1999
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Application #:
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08943510
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Filing Dt:
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10/03/1997
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Title:
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SECURE MEMORY HAVING MULTIPLE SECURITY LEVELS
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Patent #:
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Issue Dt:
|
02/22/2000
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Application #:
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08959245
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Filing Dt:
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10/28/1997
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Title:
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FAST REGULAR MULTIPLIER ARCHITECTURE
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08965919
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Filing Dt:
|
11/07/1997
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Title:
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BOUNDARY SCAN SYSTEM WITH ADDRESS DEPENDENT INSTRUCTIONS
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Patent #:
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Issue Dt:
|
10/26/1999
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Application #:
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08971117
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Filing Dt:
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11/14/1997
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Title:
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MEMORY DEVICE HAVING PROGRAMMABLE ACCESS PROTECTION AND METHOD OF OPERATING THE SAME
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|
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Patent #:
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Issue Dt:
|
04/04/2000
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Application #:
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08971154
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Filing Dt:
|
11/14/1997
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Title:
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SELF POWERED ELECTRONIC MEMORY IDENTIFICATION TAG WITH DUAL COMMUNICATION PORTS
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|
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Patent #:
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|
Issue Dt:
|
08/17/2004
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Application #:
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08971386
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Filing Dt:
|
11/17/1997
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Title:
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METHOD AND APPARATUS FOR DEPLOYING AND TRACKING COMPUTERS
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Patent #:
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Issue Dt:
|
09/07/1999
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Application #:
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08974579
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Filing Dt:
|
11/19/1997
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Title:
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ZERO-DELAY SLEW-RATE CONTROLLED OUTPUT BUFFER
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Patent #:
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Issue Dt:
|
08/10/1999
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Application #:
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08977779
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Filing Dt:
|
11/25/1997
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Title:
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ZERO POWER POWER-ON RESET CIRCUIT
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Patent #:
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Issue Dt:
|
07/25/2000
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Application #:
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08978208
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Filing Dt:
|
11/26/1997
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Title:
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SECURE MEMORY HAVING ANTI-WIRE TAPPING
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Patent #:
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Issue Dt:
|
08/31/1999
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Application #:
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08978286
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Filing Dt:
|
11/25/1997
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Title:
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ZERO POWER HIGH SPEED CONFIGURATION MEMORY
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|
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Patent #:
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Issue Dt:
|
02/15/2000
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Application #:
|
08979803
|
Filing Dt:
|
11/26/1997
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Title:
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APPARATUS FOR MULTIPRECISION INTEGER ARITHMETIC
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Patent #:
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Issue Dt:
|
12/08/1998
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Application #:
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08986506
|
Filing Dt:
|
12/08/1997
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Title:
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INTEGRATED CIRCUIT WITH FLAG REGISTER FOR BLOCK SELECTION OF NONVOLATILE CELLS FOR BULK OPERATIONS
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|
Patent #:
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|
Issue Dt:
|
08/31/1999
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Application #:
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08988504
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Filing Dt:
|
12/10/1997
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Title:
|
MINIMUM VOLTAGE RADIO FREQUENCY INDENTIFICATION
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Patent #:
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|
Issue Dt:
|
08/17/1999
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Application #:
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08994193
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Filing Dt:
|
12/19/1997
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Title:
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DIGITAL DEVICE FOR INITIALIZING AN INTEGRATED CIRCUIT
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Patent #:
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|
Issue Dt:
|
11/02/1999
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Application #:
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09010434
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Filing Dt:
|
01/21/1998
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Title:
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NREQUENCY SYNTHESIS CIRCUIT TUNED BY DIGITAL WORDS
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