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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 10 of 148
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1
Patent #:
6195627
Issue Dt:
02/27/2001
Application #:
09190865
Filing Dt:
11/09/1998
Title:
METHOD AND SYSTEM FOR INSTRUMENTING SIMULATION MODELS
2
Patent #:
6130854
Issue Dt:
10/10/2000
Application #:
09190871
Filing Dt:
11/12/1998
Title:
PROGRAMMABLE ADDRESS DECODER FOR FIELD PROGRAMMABLE MEMORY ARRAY
3
Patent #:
5949719
Issue Dt:
09/07/1999
Application #:
09190905
Filing Dt:
11/12/1998
Title:
FIELD PROGRAMMABLE MEMORY ARRAY
4
Patent #:
6044031
Issue Dt:
03/28/2000
Application #:
09190919
Filing Dt:
11/12/1998
Title:
PROGRAMMABLE BIT LINE DRIVE MODES FOR MEMORY ARRAYS
5
Patent #:
6023421
Issue Dt:
02/08/2000
Application #:
09190920
Filing Dt:
11/12/1998
Title:
SELECTIVE CONNECTIVITY BETWEEN MEMORY SUB-ARRAYS AND A HIERARCHICAL BIT LINE STRUCTURE IN A MEMORY ARRAY
6
Patent #:
6017814
Issue Dt:
01/25/2000
Application #:
09192133
Filing Dt:
11/13/1998
Title:
STRUCTURE AND FABRICATION METHOD FOR STACKABLE, AIR-GAP-CONTAINING LOW EPSILON DIELECTRIC LAYERS
7
Patent #:
6214694
Issue Dt:
04/10/2001
Application #:
09193606
Filing Dt:
11/17/1998
Title:
PROCESS OF MAKING DENSELY PATTERNED SILICON-ON-INSULATOR (SOI) REGION ON A WAFER
8
Patent #:
6327671
Issue Dt:
12/04/2001
Application #:
09195187
Filing Dt:
11/18/1998
Title:
DELTA COMPRESSED ASYNCHRONOUS REMOTE COPY
9
Patent #:
6281737
Issue Dt:
08/28/2001
Application #:
09196907
Filing Dt:
11/20/1998
Title:
METHOD AND APPARATUS FOR REDUCING PARASITIC BIPOLAR CURRENT IN A SILICON-ON-INSULATOR TRANSISTOR
10
Patent #:
6177680
Issue Dt:
01/23/2001
Application #:
09197167
Filing Dt:
11/20/1998
Title:
CORRECTION OF PATTERN-DEPENDENT ERRORS IN A PARTICLE BEAM LITHOGRAPHY SYSTEM
11
Patent #:
6332270
Issue Dt:
12/25/2001
Application #:
09198179
Filing Dt:
11/23/1998
Publication #:
US20010040460
Pub Dt:
11/15/2001
Title:
METHOD OF MAKING A HIGH DENSITY INTEGRAL TEST PROBE
12
Patent #:
6245171
Issue Dt:
06/12/2001
Application #:
09198819
Filing Dt:
11/23/1998
Title:
MULTI-THICKNESS, MULTI-LAYER GREEN SHEET LAMINATION AND METHOD THEREOF
13
Patent #:
6285080
Issue Dt:
09/04/2001
Application #:
09198820
Filing Dt:
11/23/1998
Title:
PLANAR METALLIZED SUBSTRATE WITH EMBEDDED CAMBER CONTROL MATERIAL AND METHOD THEREOF
14
Patent #:
6177344
Issue Dt:
01/23/2001
Application #:
09199911
Filing Dt:
11/25/1998
Title:
BPSG REFLOW METHOD TO REDUCE THERMAL BUDGET FOR NEXT GENERATION DEVICE INCLUDING HEATINGT A STEAM AMBIENT
15
Patent #:
6123825
Issue Dt:
09/26/2000
Application #:
09203926
Filing Dt:
12/02/1998
Title:
ELECTROMIGRATION-RESISTANT COPPER MICROSTRUCTURE AND PROCESS OF MAKING
16
Patent #:
6717997
Issue Dt:
04/06/2004
Application #:
09204025
Filing Dt:
12/01/1998
Title:
APPARATUS AND METHOD FOR CURRENT DEMAND DISTRIBUTION IN ELECTRONIC SYSTEMS
17
Patent #:
6268291
Issue Dt:
07/31/2001
Application #:
09204185
Filing Dt:
12/03/1998
Title:
METHOD FOR FORMING ELECTROMIGRATION-RESISTANT STRUCTURES BY DOPING
18
Patent #:
6175087
Issue Dt:
01/16/2001
Application #:
09204458
Filing Dt:
12/02/1998
Title:
COMPOSITE LAMINATE CIRCUIT STRUCTURE AND METHOD OF FORMING THE SAME
19
Patent #:
6144054
Issue Dt:
11/07/2000
Application #:
09205934
Filing Dt:
12/04/1998
Title:
DRAM CELL HAVING AN ANNULAR SIGNAL TRANSFER REGION
20
Patent #:
6186877
Issue Dt:
02/13/2001
Application #:
09205935
Filing Dt:
12/04/1998
Title:
MULTI-WAFER POLISHING TOOL
21
Patent #:
6616863
Issue Dt:
09/09/2003
Application #:
09208528
Filing Dt:
12/09/1998
Publication #:
US20030155554
Pub Dt:
08/21/2003
Title:
PLASTICIZED, ANTIPLASTICIZED AND CRYSTALLINE CONDUCTING POLYMERS AND PRECURSORS THEREOF
22
Patent #:
6066570
Issue Dt:
05/23/2000
Application #:
09209413
Filing Dt:
12/10/1998
Title:
METHOD AND APPARATUS FOR PREVENTING FORMATION OF BLACK SILICON ON EDGES OF WAFERS
23
Patent #:
6333485
Issue Dt:
12/25/2001
Application #:
09210226
Filing Dt:
12/11/1998
Title:
METHOD FOR MINIMIZING SAMPLE DAMAGE DURING THE ABLATION OF MATERIAL USING A FOCUSED ULTRASHORT PULSED BEAM
24
Patent #:
6248961
Issue Dt:
06/19/2001
Application #:
09211976
Filing Dt:
12/15/1998
Title:
WAVE SOLDER APPLICATION FOR BALL GRID ARRAY MODULES AND SOLDER PLUG
25
Patent #:
6163045
Issue Dt:
12/19/2000
Application #:
09215011
Filing Dt:
12/17/1998
Title:
REDUCED PARASITIC LEAKAGE IN SEMICONDUCTOR DEVICES
26
Patent #:
6157530
Issue Dt:
12/05/2000
Application #:
09224766
Filing Dt:
01/04/1999
Title:
ESD PROTECTION CIRCUIT FOR MULTIPLE POWER SUUPLY ENVIRONMENTS
27
Patent #:
6261895
Issue Dt:
07/17/2001
Application #:
09225043
Filing Dt:
01/04/1999
Title:
POLYSILICON CAPACITOR HAVING LARGE CAPACITANCE AND LOW RESISTANCE AND PROCESS FOR FORMING THE CAPACITOR
28
Patent #:
6255136
Issue Dt:
07/03/2001
Application #:
09225191
Filing Dt:
01/05/1999
Title:
METHOD OF MAKING ELECTRONIC PACKAGE WITH COMPRESSIBLE HEATSINK STRUCTURE
29
Patent #:
6245186
Issue Dt:
06/12/2001
Application #:
09225192
Filing Dt:
01/05/1999
Title:
ELECTRONIC PACKAGE WITH COMPRESSIBLE HEATSINK STRUCTURE
30
Patent #:
6383892
Issue Dt:
05/07/2002
Application #:
09225315
Filing Dt:
01/05/1999
Title:
DOUBLE SILICON-ON-INSULATOR DEVICE AND METHOD THEREOF
31
Patent #:
6091486
Issue Dt:
07/18/2000
Application #:
09225339
Filing Dt:
01/05/1999
Title:
BLAZED GRATING MEASUREMENTS OF LITHOGRAPHIC LENS ABERATIONS
32
Patent #:
NONE
Issue Dt:
Application #:
09225526
Filing Dt:
01/04/1999
Publication #:
US20010013660
Pub Dt:
08/16/2001
Title:
BEOL DECOUPLING CAPACITOR
33
Patent #:
6372081
Issue Dt:
04/16/2002
Application #:
09225572
Filing Dt:
01/05/1999
Title:
PROCESS TO PREVENT COPPER CONTAMINATION OF SEMICONDUCTOR FABS
34
Patent #:
6090722
Issue Dt:
07/18/2000
Application #:
09225595
Filing Dt:
01/06/1999
Title:
PROCESS FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING A SELF-ALIGNED SPACER
35
Patent #:
6102776
Issue Dt:
08/15/2000
Application #:
09225597
Filing Dt:
01/06/1999
Title:
APPARATUS AND METHOD FOR CONTROLLING POLISHING OF INTEGRATED CIRCUIT SUBSTRATES
36
Patent #:
6047248
Issue Dt:
04/04/2000
Application #:
09226097
Filing Dt:
10/19/1998
Title:
PERFORMANCE-TEMPERATURE OPTIMIZATION BY COOPERATIVELY VARYING THE VOLTAGE AND FREQUENCY OF A CIRCUIT
37
Patent #:
6245616
Issue Dt:
06/12/2001
Application #:
09226369
Filing Dt:
01/06/1999
Title:
OXYNITRIDE GATE DIELECTRIC AND METHOD OF FORMING
38
Patent #:
6093508
Issue Dt:
07/25/2000
Application #:
09226765
Filing Dt:
01/06/1999
Title:
DUAL DAMASCENE STRUCTURE FORMED IN A SINGLE PHOTORESIST FILM
39
Patent #:
6323522
Issue Dt:
11/27/2001
Application #:
09227695
Filing Dt:
01/08/1999
Title:
SOI BASED TFT HAVING A GATE INSULATION LAYER THICKER THAN THE CHANNEL REGION
40
Patent #:
6255145
Issue Dt:
07/03/2001
Application #:
09227696
Filing Dt:
01/08/1999
Title:
PROCESS FOR MANUFACTURING PATTERNED SILICON-ON- INSULATOR LAYERS WITH SELF- ALIGNED TRENCHES AND RESULTING PRODUCT
41
Patent #:
6369449
Issue Dt:
04/09/2002
Application #:
09228601
Filing Dt:
01/12/1999
Publication #:
US20010045637
Pub Dt:
11/29/2001
Title:
METHOD AND APPARATUS FOR INJECTION MOLDED FLIP CHIP ENCAPSULATION
42
Patent #:
6258636
Issue Dt:
07/10/2001
Application #:
09231068
Filing Dt:
01/14/1999
Title:
SOI ACTIVE PIXEL CELL DESIGN WITH GROUNDED BODY CONTACT
43
Patent #:
6188122
Issue Dt:
02/13/2001
Application #:
09231615
Filing Dt:
01/14/1999
Title:
BURIED CAPACITOR FOR SILICON-ON-INSULATOR STRUCTURE
44
Patent #:
6335262
Issue Dt:
01/01/2002
Application #:
09231617
Filing Dt:
01/14/1999
Title:
METHOD FOR FABRICATING DIFFERENT GATE OXIDE THICKNESSES WITHIN THE SAME CHIP
45
Patent #:
6271595
Issue Dt:
08/07/2001
Application #:
09231618
Filing Dt:
01/14/1999
Title:
METHOD FOR IMPROVING ADHESION TO COPPER
46
Patent #:
6052231
Issue Dt:
04/18/2000
Application #:
09233711
Filing Dt:
01/19/1999
Title:
BEAM DIVIDING ELEMENTS PERMITTING PROJECTION OF AN IMAGE WITH HIGH CONTRAST
47
Patent #:
6420761
Issue Dt:
07/16/2002
Application #:
09233797
Filing Dt:
01/20/1999
Title:
ASYMMETRICAL SEMICONDUCTOR DEVICE FOR ESD PROTECTION
48
Patent #:
6650699
Issue Dt:
11/18/2003
Application #:
09234767
Filing Dt:
01/21/1999
Title:
METHODS AND APPARATUS FOR TIMING RECOVERY FROM A SAMPLED AND EQUALIZED DATA SIGNAL
49
Patent #:
6265771
Issue Dt:
07/24/2001
Application #:
09238492
Filing Dt:
01/27/1999
Title:
DUAL CHIP WITH HEAT SINK
50
Patent #:
6521947
Issue Dt:
02/18/2003
Application #:
09239327
Filing Dt:
01/28/1999
Title:
METHOD OF INTEGRATING SUBSTRATE CONTACT ON SOI WAFERS WITH STI PROCESS
51
Patent #:
6127866
Issue Dt:
10/03/2000
Application #:
09239487
Filing Dt:
01/28/1999
Title:
DELAY-LOCKED-LOOP (DLL) HAVING SYMMETRICAL RISING AND FALLING CLOCK EDGE TYPE DELAYS
52
Patent #:
6360227
Issue Dt:
03/19/2002
Application #:
09240231
Filing Dt:
01/29/1999
Title:
SYSTEM AND METHOD FOR GENERATING TAXONOMIES WITH APPLICATIONS TO CONTENT- BASED RECOMMENDATIONS
53
Patent #:
6348731
Issue Dt:
02/19/2002
Application #:
09240950
Filing Dt:
01/29/1999
Title:
COPPER INTERCONNECTIONS WITH ENHANCED ELECTROMIGRATION RESISTANCE AND REDUCED DEFECT SENSITIVITY AND METHOD OF FORMING SAME
54
Patent #:
6703283
Issue Dt:
03/09/2004
Application #:
09244958
Filing Dt:
02/04/1999
Title:
DISCONTINUOUS DIELECTRIC INTERFACE FOR BIPOLAR TRANSISTORS
55
Patent #:
6252179
Issue Dt:
06/26/2001
Application #:
09246529
Filing Dt:
02/08/1999
Title:
ELECTRONIC PACKAGE ON METAL CARRIER
56
Patent #:
6420747
Issue Dt:
07/16/2002
Application #:
09247275
Filing Dt:
02/10/1999
Publication #:
US20020017693
Pub Dt:
02/14/2002
Title:
MOSCAP DESIGN FOR IMPROVED RELIABILITY
57
Patent #:
6206997
Issue Dt:
03/27/2001
Application #:
09248341
Filing Dt:
02/11/1999
Title:
METHOD FOR BONDING HEAT SINKS TO OVERMOLDS AND DEVICE FORMED THEREBY
58
Patent #:
5997773
Issue Dt:
12/07/1999
Application #:
09249302
Filing Dt:
02/12/1999
Title:
COMPOSITION CONTAINING A POLYMER AND CONDUCTIVE FILLER AND USE THEREOF
59
Patent #:
6176765
Issue Dt:
01/23/2001
Application #:
09250308
Filing Dt:
02/16/1999
Title:
ACCUMULATOR FOR SLURRY SAMPLING
60
Patent #:
6326732
Issue Dt:
12/04/2001
Application #:
09250880
Filing Dt:
02/16/1999
Title:
APPARATUS AND METHOD FOR NON-CONTACT STRESS EVALUATION OF WAFER GATE DIELECTRIC RELIABILITY
61
Patent #:
6097070
Issue Dt:
08/01/2000
Application #:
09250881
Filing Dt:
02/16/1999
Title:
MOSFET STRUCTURE AND PROCESS FOR LOW GATE INDUCED DRAIN LEAKAGE (GIDL)
62
Patent #:
6180456
Issue Dt:
01/30/2001
Application #:
09251661
Filing Dt:
02/17/1999
Title:
TRIPLE POLYSILICON EMBEDDED NVRAM CELL AND METHOD THEREOF
63
Patent #:
6528984
Issue Dt:
03/04/2003
Application #:
09254768
Filing Dt:
03/11/1999
Publication #:
US20020130676
Pub Dt:
09/19/2002
Title:
INTEGRATED COMPLIANT PROBE FOR WAFER LEVEL TEST AND BURN-IN
64
Patent #:
NONE
Issue Dt:
03/04/2003
Application #:
09254768
Filing Dt:
03/11/1999
Publication #:
US20020130676
Pub Dt:
09/19/2002
PCT #:
US9716265
Title:
INTEGRATED COMPLIANT PROBE FOR WAFER LEVEL TEST AND BURN-IN
65
Patent #:
7282945
Issue Dt:
10/16/2007
Application #:
09254769
Filing Dt:
03/11/1999
Title:
WAFER SCALE HIGH DENSITY PROBE ASSEMBLY, APPARATUS FOR USE THEREOF AND METHODS OF FABRICATION THEREOF
66
Patent #:
6452406
Issue Dt:
09/17/2002
Application #:
09254798
Filing Dt:
03/11/1999
Title:
PROBE STRUCTURE HAVING A PLURALITY OF DISCRETE INSULATED PROBE TIPS
67
Patent #:
6242310
Issue Dt:
06/05/2001
Application #:
09255534
Filing Dt:
02/22/1999
Title:
METHOD OF FORMING BURIED-STRAP WITH REDUCED OUTDIFFUSION INCLUDING REMOVING A SACRIFICIAL INSULATOR LEAVING A GAP AND SUPPORTING SPACER
68
Patent #:
6193861
Issue Dt:
02/27/2001
Application #:
09255998
Filing Dt:
02/23/1999
Title:
APPARATUS AND METHOD TO ENHANCE HOLE FILL IN SUB-MICRON PLATING
69
Patent #:
7361444
Issue Dt:
04/22/2008
Application #:
09256034
Filing Dt:
02/23/1999
Title:
MULTILAYERED RESIST SYSTEMS USING TUNED POLYMER FILMS AS UNDERLAYERS AND METHODS OF FABRICATION THEREOF
70
Patent #:
6477630
Issue Dt:
11/05/2002
Application #:
09257146
Filing Dt:
02/24/1999
Publication #:
US20020026556
Pub Dt:
02/28/2002
Title:
HIERARCHICAL ROW ACTIVATION METHOD FOR BANKING CONTROL IN MULTI-BANK DRAM
71
Patent #:
6444548
Issue Dt:
09/03/2002
Application #:
09257817
Filing Dt:
02/25/1999
Publication #:
US20010046745
Pub Dt:
11/29/2001
Title:
BITLINE DIFFUSION WITH HALO FOR IMPROVED ARRAY THRESHOLD VOLTAGE CONTROL
72
Patent #:
6125531
Issue Dt:
10/03/2000
Application #:
09259977
Filing Dt:
03/01/1999
Title:
METHOD OF MAKING A PRINTED CIRCUIT BOARD HAVING FILLED HOLES AND A FILL MEMBER FOR USE THEREWITH INCLUDING REINFORCEMENT MEANS
73
Patent #:
6174762
Issue Dt:
01/16/2001
Application #:
09260311
Filing Dt:
03/02/1999
Title:
SALICIDE DEVICE WITH BORDERLESS CONTACT
74
Patent #:
6798475
Issue Dt:
09/28/2004
Application #:
09260869
Filing Dt:
03/02/1999
Publication #:
US20020085133
Pub Dt:
07/04/2002
Title:
REFLECTIVE LIGHTVALVE
75
Patent #:
6180956
Issue Dt:
01/30/2001
Application #:
09261515
Filing Dt:
03/03/1999
Title:
THIN FILM TRANSISTORS WITH ORGANIC-INORGANIC HYBRID MATERIALS AS SEMICONDUCTING CHANNELS
76
Patent #:
6090507
Issue Dt:
07/18/2000
Application #:
09261638
Filing Dt:
03/03/1999
Title:
METHODS FOR REPAIR PHOTOMASKS
77
Patent #:
6261723
Issue Dt:
07/17/2001
Application #:
09262370
Filing Dt:
03/04/1999
Title:
TRANSFER LAYER REPAIR PROCESS FOR ATTENUATED MASKS
78
Patent #:
6768203
Issue Dt:
07/27/2004
Application #:
09262690
Filing Dt:
03/04/1999
Title:
OPEN-BOTTOMED VIA LINER STRUCTURE AND METHOD FOR FABRICATING SAME
79
Patent #:
6066030
Issue Dt:
05/23/2000
Application #:
09262691
Filing Dt:
03/04/1999
Title:
ELECTRO ETCH CHEMICAL MECHANICAL POLISHING EQUIPMENT
80
Patent #:
6259137
Issue Dt:
07/10/2001
Application #:
09264973
Filing Dt:
03/09/1999
Title:
DEFECT INDUCED BURIED OXIDE (DIBOX) FOR THROUGHPUT SOI
81
Patent #:
6207472
Issue Dt:
03/27/2001
Application #:
09265161
Filing Dt:
03/09/1999
Title:
LOW TEMPERATURE THIN FILM TRANSISTOR FABRICATION
82
Patent #:
6124074
Issue Dt:
09/26/2000
Application #:
09266341
Filing Dt:
03/11/1999
Title:
PHOTORESIST COMPOSITIONS WITH CYCLIC OLEFIN POLYMERS AND HYDROPHOBIC NON-STEROIDAL MULTI-ALICYCLIC ADDITIVES
83
Patent #:
6127731
Issue Dt:
10/03/2000
Application #:
09266586
Filing Dt:
03/11/1999
Title:
CAPPED SOLDER BUMPS WHICH FORM AN INTERCONNECTION WITH A TAILORED REFLOW MELTING POINT
84
Patent #:
6105243
Issue Dt:
08/22/2000
Application #:
09266658
Filing Dt:
03/11/1999
Title:
METHOD OF FABRICATING MULTILAYER PRINTED CIRCUIT BOARD
85
Patent #:
6350993
Issue Dt:
02/26/2002
Application #:
09267323
Filing Dt:
03/12/1999
Title:
HIGH SPEED COMPOSITE P-CHANNEL SI/SIGE HETEROSTRUCTURE FOR FIELD EFFECT DEVICES
86
Patent #:
6210606
Issue Dt:
04/03/2001
Application #:
09268527
Filing Dt:
03/12/1999
Title:
POLYCRYSTALLINE CONDUCTING POLYMERS AND PRECURSORS THEREOF HAVING ADJUSTABLE MORPHOLOGY AND PROPERTIES
87
Patent #:
6446234
Issue Dt:
09/03/2002
Application #:
09269000
Filing Dt:
03/16/1999
Title:
METHOD AND APPARATUS FOR UPDATING CYCLIC REDUNDANCY CHECK INFORMATION FOR DATA STORAGE
88
Patent #:
6438724
Issue Dt:
08/20/2002
Application #:
09270069
Filing Dt:
03/16/1999
Title:
METHOD AND APPARATUS FOR DETERMINISTICALLY ALTERING CYCLIC REDUNDANCY CHECK INFORMATION FOR DATA STORAGE
89
Patent #:
NONE
Issue Dt:
Application #:
09272433
Filing Dt:
03/19/1999
Publication #:
US20020060343
Pub Dt:
05/23/2002
Title:
DIFFUSION RESISTOR/CAPACITOR (DRC) NON-ALIGNED MOSFET STRUCTURE
90
Patent #:
6442445
Issue Dt:
08/27/2002
Application #:
09272434
Filing Dt:
03/19/1999
Title:
USER CONFIGURABLE MULTIVARIATE TIME SERIES REDUCTION TOOL CONTROL METHOD
91
Patent #:
6341071
Issue Dt:
01/22/2002
Application #:
09272517
Filing Dt:
03/19/1999
Title:
STRESS RELIEVED BALL GRID ARRAY PACKAGE
92
Patent #:
6306331
Issue Dt:
10/23/2001
Application #:
09275169
Filing Dt:
03/24/1999
Title:
ULTRA MOLD FOR ENCAPSULATING VERY THIN PACKAGES
93
Patent #:
7356415
Issue Dt:
04/08/2008
Application #:
09275568
Filing Dt:
03/24/1999
Title:
SIMILARITY SEARCHING OF MOLECULES BASED UPON DESCRIPTOR VECTORS CHARACTERIZING MOLECULAR REGIONS
94
Patent #:
6104079
Issue Dt:
08/15/2000
Application #:
09276160
Filing Dt:
03/25/1999
Title:
CLOSELY PITCHED POLYSILICON FUSES AND METHOD OF FORMING THE SAME
95
Patent #:
6429519
Issue Dt:
08/06/2002
Application #:
09277699
Filing Dt:
03/26/1999
Publication #:
US20020047206
Pub Dt:
04/25/2002
Title:
WIRING STRUCTURES CONTAINING INTERCONNECTED METAL AND WIRING LEVELS INCLUDING A CONTINOUS, SINGLE CRYSTALLINE OR POLYCRYSTALLINE CONDUCTIVE MATERIAL HAVING ONE OR MORE TWIN BOUNDARIES
96
Patent #:
6037194
Issue Dt:
03/14/2000
Application #:
09281136
Filing Dt:
03/29/1999
Title:
METHOD FOR MAKING A DRAM CELL WITH GROOVED TRANSFER DEVICE
97
Patent #:
7472215
Issue Dt:
12/30/2008
Application #:
09282141
Filing Dt:
03/31/1999
Title:
PORTABLE COMPUTER SYSTEM WITH THERMAL ENHANCEMENTS AND MULTIPLE POWER MODES OF OPERATION
98
Patent #:
6118192
Issue Dt:
09/12/2000
Application #:
09282576
Filing Dt:
03/31/1999
Title:
APPLICATIONS OF MICRO-ELECTRO-MECHANICAL WOBBLE MOTORS AS RADIO FREQUENCY TRANSCEIVER COMPONENTS
99
Patent #:
6762761
Issue Dt:
07/13/2004
Application #:
09283387
Filing Dt:
03/31/1999
Publication #:
US20030001849
Pub Dt:
01/02/2003
Title:
METHOD AND SYSTEM FOR GRAPHICS RENDERING USING HARDWARE-EVENT-TRIGGERED EXECUTION OF CAPTURED GRAPHICS HARDWARE INSTRUCTIONS
100
Patent #:
6290860
Issue Dt:
09/18/2001
Application #:
09283679
Filing Dt:
04/01/1999
Title:
PROCESS FOR DESIGN AND MANUFACTURE OF FINE LINE CIRCUITS ON PLANARIZED THIN FILM DIELECTRICS AND CIRCUITS MANUFACTURED THEREBY
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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