Total properties:
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12
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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11075195
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Filing Dt:
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03/07/2005
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Title:
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OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS
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Patent #:
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Issue Dt:
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12/25/2007
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Application #:
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11090107
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Filing Dt:
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03/24/2005
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Publication #:
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Pub Dt:
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08/25/2005
| | | | |
Title:
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DUAL DAMASCENE INTERCONNECT STRUCTURE WITH IMPROVED ELECTRO MIGRATION LIFETIMES
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Patent #:
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Issue Dt:
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02/12/2008
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Application #:
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11094975
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Filing Dt:
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03/31/2005
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Publication #:
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Pub Dt:
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10/12/2006
| | | | |
Title:
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SEMICONDUCTOR STRUCTURE FORMED USING A SACRIFICIAL STRUCTURE
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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11098290
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Filing Dt:
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04/04/2005
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Publication #:
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Pub Dt:
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08/04/2005
| | | | |
Title:
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ION RECOIL IMPLANTATION AND ENHANCED CARRIER MOBILITY IN CMOS DEVICE
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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11104050
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Filing Dt:
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04/11/2005
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Title:
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SEMICONDUCTOR CHIP WITH BORDERLESS CONTACT THAT AVOIDS WELL LEAKAGE
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11116903
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Filing Dt:
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04/28/2005
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Publication #:
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Pub Dt:
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09/01/2005
| | | | |
Title:
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METAL-OXIDE-SEMICONDUCTOR DEVICE INCLUDING A BURIED LIGHTLY-DOPED DRAIN REGION
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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11124307
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Filing Dt:
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05/06/2005
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Publication #:
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Pub Dt:
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11/09/2006
| | | | |
Title:
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METHODS AND APPARATUS FOR DETERMINING LOCATION-BASED ON-CHIP VARIATION FACTOR
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Patent #:
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Issue Dt:
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09/23/2008
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Application #:
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11131003
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Filing Dt:
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05/16/2005
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Publication #:
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Pub Dt:
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09/22/2005
| | | | |
Title:
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DIELECTRIC BARRIER FILMS FOR USE AS COPPER BARRIER LAYERS IN SEMICONDUCTOR TRENCH AND VIA STRUCTURES
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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11131705
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Filing Dt:
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05/18/2005
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Publication #:
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Pub Dt:
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10/13/2005
| | | | |
Title:
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VOLTAGE CONTRAST MONITOR FOR INTEGRATED CIRCUIT DEFECTS
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Patent #:
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Issue Dt:
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11/07/2006
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Application #:
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11138152
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Filing Dt:
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05/26/2005
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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METHOD OF ELECTRICAL TESTING
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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11140142
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Filing Dt:
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05/27/2005
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Title:
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METHOD AND SYSTEM FOR AREA EFFICIENT CHARGE-BASED CAPACITANCE MEASUREMENT
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11158450
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Filing Dt:
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06/21/2005
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Publication #:
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Pub Dt:
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08/24/2006
| | | | |
Title:
|
Systems and methods for wafer polishing
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|
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Patent #:
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|
Issue Dt:
|
10/12/2010
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Application #:
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11167772
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Filing Dt:
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06/27/2005
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Publication #:
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Pub Dt:
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12/22/2005
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURE THEREFOR
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Patent #:
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Issue Dt:
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11/02/2010
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Application #:
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11182615
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Filing Dt:
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07/15/2005
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Publication #:
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Pub Dt:
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01/18/2007
| | | | |
Title:
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DIGITALLY OBTAINING CONTOURS OF FABRICATED POLYGONS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11189625
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Filing Dt:
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07/25/2005
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Publication #:
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Pub Dt:
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11/24/2005
| | | | |
Title:
|
Memory device having an electron trapping layer in a high-K dielectric gate stack
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Patent #:
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|
Issue Dt:
|
04/15/2008
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Application #:
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11225310
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Filing Dt:
|
09/12/2005
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Title:
|
METHOD OF FORMING A LOW K POLYMER E-BEAM PRINTABLE MECHANICAL SUPPORT
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Patent #:
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Issue Dt:
|
09/11/2007
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Application #:
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11232074
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Filing Dt:
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09/21/2005
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Publication #:
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Pub Dt:
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03/22/2007
| | | | |
Title:
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CONTROLLING OVERSPRAY COATING IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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10/16/2007
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Application #:
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11247517
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Filing Dt:
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10/11/2005
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Publication #:
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Pub Dt:
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10/12/2006
| | | | |
Title:
|
DEFECT ANALYSIS USING A YIELD VEHICLE
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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11258253
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Filing Dt:
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10/25/2005
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Publication #:
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Pub Dt:
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02/16/2006
| | | | |
Title:
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I/O AND POWER ESD PROTECTION CIRCUITS BY ENHANCING SUBSTRATE-BIAS IN DEEP-SUBMICRON CMOS PROCESS
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Patent #:
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Issue Dt:
|
03/27/2007
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Application #:
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11259965
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Filing Dt:
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10/26/2005
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Title:
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METHOD AND STRUCTURE FOR CREATING ULTRA LOW RESISTANCE DAMASCENE COPPER WIRING
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|
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Patent #:
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|
Issue Dt:
|
11/17/2009
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Application #:
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11262173
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Filing Dt:
|
10/28/2005
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Title:
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SHALLOW TRENCH ISOLATION STRUCTURE WITH LOW TRENCH PARASITIC CAPACITANCE
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Patent #:
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|
Issue Dt:
|
12/22/2009
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Application #:
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11265062
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Filing Dt:
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11/02/2005
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Publication #:
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|
Pub Dt:
|
03/16/2006
| | | | |
Title:
|
INTERDIGITADED CAPACITORS
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Patent #:
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Issue Dt:
|
12/13/2011
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Application #:
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11269275
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Filing Dt:
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11/08/2005
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Publication #:
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Pub Dt:
|
05/10/2007
| | | | |
Title:
|
REDUCTION OF MACRO LEVEL STRESSES IN COPPER/LOW-K WAFERS
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Patent #:
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|
Issue Dt:
|
02/24/2009
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Application #:
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11286546
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Filing Dt:
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11/23/2005
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Publication #:
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|
Pub Dt:
|
05/24/2007
| | | | |
Title:
|
PROGRAMMABLE NANOTUBE INTERCONNECT
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|
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Patent #:
|
|
Issue Dt:
|
12/07/2010
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Application #:
|
11286558
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Filing Dt:
|
11/23/2005
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Publication #:
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|
Pub Dt:
|
06/07/2007
| | | | |
Title:
|
CONFIGURABLE POWER SEGMENTATION USING A NANOTUBE STRUCTURE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11314649
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Filing Dt:
|
12/21/2005
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Publication #:
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|
Pub Dt:
|
05/04/2006
| | | | |
Title:
|
Variable mask field exposure
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|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
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Application #:
|
11321206
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Filing Dt:
|
12/29/2005
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Publication #:
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|
Pub Dt:
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07/05/2007
| | | | |
Title:
|
ROBUST SHALLOW TRENCH ISOLATION STRUCTURES AND A METHOD FOR FORMING SHALLOW TRENCH ISOLATION STRUCTURES
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|
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Patent #:
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|
Issue Dt:
|
05/04/2010
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Application #:
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11322103
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Filing Dt:
|
12/29/2005
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Publication #:
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Pub Dt:
|
07/19/2007
| | | | |
Title:
|
AREA-EFFICIENT POWER SWITCHING CELL
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|
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Patent #:
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|
Issue Dt:
|
04/22/2008
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Application #:
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11323400
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Filing Dt:
|
12/29/2005
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Publication #:
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Pub Dt:
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07/05/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRATED CIRCUIT DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2008
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Application #:
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11323405
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Filing Dt:
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12/29/2005
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Publication #:
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|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
METHOD AND SAMPLE FOR RADIATION MICROSCOPY INCLUDING A PARTICLE BEAM CHANNEL FORMED IN THE SAMPLE SOURCE
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|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
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Application #:
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11337460
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Filing Dt:
|
01/23/2006
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Publication #:
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Pub Dt:
|
06/08/2006
| | | | |
Title:
|
PLANARIZATION WITH REDUCED DISHING
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Patent #:
|
|
Issue Dt:
|
10/21/2008
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Application #:
|
11361430
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Filing Dt:
|
02/24/2006
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Publication #:
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|
Pub Dt:
|
08/30/2007
| | | | |
Title:
|
THERMALLY STABLE BICMOS FABRICATION METHOD AND BIPOLAR JUNCTION TRANSISTORS FORMED ACCORDING TO THE METHOD
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|
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Patent #:
|
|
Issue Dt:
|
01/13/2009
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Application #:
|
11368780
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Filing Dt:
|
03/06/2006
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Publication #:
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|
Pub Dt:
|
10/12/2006
| | | | |
Title:
|
SELECTIVE ISOTROPIC ETCH FOR TITANIUM-BASED MATERIALS
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11381409
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Filing Dt:
|
05/03/2006
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Publication #:
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|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
Adjustable Transmission Phase Shift Mask
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11385156
|
Filing Dt:
|
03/21/2006
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Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
PHASE-SHIFTING MASK AND SEMICONDUCTOR DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11389643
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Filing Dt:
|
03/23/2006
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Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
INCORPORATING DOPANTS TO ENHANCE THE DIELECTRIC PROPERTIES OF METAL SILICATES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11392375
|
Filing Dt:
|
03/29/2006
|
Publication #:
|
|
Pub Dt:
|
07/27/2006
| | | | |
Title:
|
High-density inter-die interconnect structure
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
11397252
|
Filing Dt:
|
04/03/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
INTERDIGITATED MESH TO PROVIDE DISTRIBUTED, HIGH QUALITY FACTOR CAPACITIVE COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2007
|
Application #:
|
11403137
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Filing Dt:
|
04/11/2006
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
WAFER CHUCKING APPARATUS FOR SPIN PROCESSOR
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11409377
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Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
Method to improve the control of electro-polishing by use of a plating electrode in an electrolyte bath
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|
|
Patent #:
|
|
Issue Dt:
|
06/02/2009
|
Application #:
|
11414902
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Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
INDUCTOR FORMED IN AN INTEGRATED CIRCUIT
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|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
11418873
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Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
DUAL LAYER BARRIER FILM TECHNIQUES TO PREVENT RESIST POISONING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2008
|
Application #:
|
11419252
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
A METHOD OF FORMING A SPIRAL INDUCTOR IN A SEMICONDUCTOR SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/21/2007
|
Application #:
|
11419356
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
A VERTICAL REPLACEMENT-GATE SILICON-ON-INSULATOR TRANSISTOR
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|
|
Patent #:
|
|
Issue Dt:
|
11/11/2008
|
Application #:
|
11458270
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Filing Dt:
|
07/18/2006
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Publication #:
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|
Pub Dt:
|
11/09/2006
| | | | |
Title:
|
METHOD FOR FORMING MULTIPLE DOPING LEVEL BIPOLAR JUNCTIONS TRANSISTORS
|
|
|
Patent #:
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|
Issue Dt:
|
01/20/2009
|
Application #:
|
11469032
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Filing Dt:
|
08/31/2006
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Publication #:
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|
Pub Dt:
|
03/06/2008
| | | | |
Title:
|
METHOD TO IMPROVE PERFORMANCE OF A BIPOLAR DEVICE USING AN AMORPHIZING IMPLANT
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|
|
Patent #:
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|
Issue Dt:
|
11/20/2007
|
Application #:
|
11473627
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Filing Dt:
|
06/22/2006
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Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
|
OPTICAL ERROR MINIMIZATION IN A SEMICONDUCTOR MANUFACTURING APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11494221
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Filing Dt:
|
07/27/2006
|
Publication #:
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|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH SUBSTANTIALLY PERPENDICULAR WIRE BONDS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11524107
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Filing Dt:
|
09/20/2006
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Publication #:
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|
Pub Dt:
|
01/18/2007
| | | | |
Title:
|
APPARATUS AND METHOD OF MANUFACTURE FOR INTEGRATED CIRCUIT AND CMOS DEVICE INCLUDING EPITAXIALLY GROWN DIELECTRIC ON SILICON CARBIDE
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|
|
Patent #:
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|
Issue Dt:
|
09/18/2007
|
Application #:
|
11530550
|
Filing Dt:
|
09/11/2006
|
Title:
|
SYSTEMS AND METHODS FOR DISTRIBUTING I/O IN A SEMICONDUCTOR DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
02/23/2010
|
Application #:
|
11531477
|
Filing Dt:
|
09/13/2006
|
Publication #:
|
|
Pub Dt:
|
03/13/2008
| | | | |
Title:
|
BIPOLAR DEVICE HAVING IMPROVED CAPACITANCE
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|
|
Patent #:
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|
Issue Dt:
|
05/19/2009
|
Application #:
|
11534340
|
Filing Dt:
|
09/22/2006
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Publication #:
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|
Pub Dt:
|
03/27/2008
| | | | |
Title:
|
LOW MUTUAL INDUCTANCE MATCHED INDUCTORS
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|
|
Patent #:
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|
Issue Dt:
|
07/03/2007
|
Application #:
|
11540056
|
Filing Dt:
|
09/29/2006
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
METHOD OF ELECTRICAL TESTING OF AN INTERGRATED CIRCUIT WITH AN ELECTRICAL PROBE
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|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
11542864
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Filing Dt:
|
10/04/2006
|
Publication #:
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|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
PROTRUDING SPACERS FOR SELF-ALIGNED CONTACTS
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|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
11609509
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Filing Dt:
|
12/12/2006
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Publication #:
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|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
METHOD AND APPARATUS FOR PERFORMING METALIZATION IN AN INTEGRATED CIRCUIT PROCESS
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|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
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Application #:
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11641507
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Filing Dt:
|
12/19/2006
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
Title:
|
III-V POWER FIELD EFFECT TRANSISTORS
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|
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Patent #:
|
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Issue Dt:
|
03/02/2010
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Application #:
|
11649197
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Filing Dt:
|
01/03/2007
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Publication #:
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|
Pub Dt:
|
12/20/2007
| | | | |
Title:
|
PROCESS FOR MAKING AN ON-CHIP VACUUM TUBE DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
07/07/2009
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Application #:
|
11673645
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Filing Dt:
|
02/12/2007
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Publication #:
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|
Pub Dt:
|
08/14/2008
| | | | |
Title:
|
METHOD TO IMPROVE WRITER LEAKAGE IN A SIGE BIPOLAR DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
05/04/2010
|
Application #:
|
11684674
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Filing Dt:
|
03/12/2007
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Publication #:
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|
Pub Dt:
|
03/13/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR SUPPORTING A SUBSET OF MULTIPLE INTERFACE TYPES IN A SEMICONDUCTOR DEVICE
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|
|
Patent #:
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Issue Dt:
|
11/25/2008
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Application #:
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11694021
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Filing Dt:
|
03/30/2007
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Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
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METHOD TO REDUCE BORON PENETRATION IN A SIGE BIPOLAR DEVICE
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NONE
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04/02/2007
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07/19/2007
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Title:
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08/19/2008
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11733673
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04/10/2007
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08/02/2007
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Title:
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03/09/2010
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08/16/2007
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Title:
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08/05/2008
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11748569
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05/15/2007
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09/13/2007
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Title:
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GUARD RING FOR IMPROVED MATCHING
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02/17/2009
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11768725
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06/26/2007
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10/25/2007
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Title:
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MULTI-LAYER REGISTRATION AND DIMENSIONAL TEST MARK FOR SCATTEROMETRICAL MEASUREMENT
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12/15/2009
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10/04/2007
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Title:
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STRUCTURE AND FABRICATION METHOD FOR CAPACITORS INTEGRATIBLE WITH VERTICAL REPLACEMENT GATE TRANSISTORS
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02/17/2009
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11809873
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06/01/2007
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10/11/2007
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Title:
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FABRICATION METHOD
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06/10/2008
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11/01/2007
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Title:
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09/21/2010
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11/01/2007
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Title:
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INTEGRATED CIRCUIT WITH METAL SILICIDE REGIONS
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12/15/2009
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07/13/2007
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11/29/2007
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Title:
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REAL-TIME GATE ETCH CRITICAL DIMENSION CONTROL BY OXYGEN MONITORING
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08/10/2010
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08/02/2007
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11/22/2007
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Title:
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CONTROLLING OVERSPRAY COATING IN SEMICONDUCTOR DEVICES
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03/13/2012
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08/14/2007
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02/28/2008
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Title:
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CIRCUITS AND METHODS FOR IMPROVED FET MATCHING
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01/21/2014
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02/07/2008
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Title:
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Method of isolation for acoustic resonator device
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08/25/2009
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11927950
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10/30/2007
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03/06/2008
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Title:
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DUAL-GATE METAL-OXIDE-SEMICONDUCTOR DEVICE
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06/22/2010
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11927978
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10/30/2007
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03/06/2008
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Title:
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SEMICONDUCTOR STRUCTURE FORMED USING A SACRIFICIAL STRUCTURE
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07/14/2009
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11/08/2007
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03/13/2008
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03/02/2010
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11939482
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11/13/2007
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Title:
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METHOD OF TREATING METAL AND METAL SALTS TO ENABLE THIN LAYER DEPOSITION IN SEMICONDUCTOR PROCESSING
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06/07/2011
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12/19/2007
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05/01/2008
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Title:
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SPACER-LESS TRANSISTOR INTEGRATION SCHEME FOR HIGH-K GATE DIELECTRICS AND SMALL GATE-TO-GATE SPACES APPLICABLE TO SI, SIGE AND STRAINED SILICON SCHEMES
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03/03/2009
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01/03/2008
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05/01/2008
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STRUCTURE AND METHOD FOR IMPROVED HEAT CONDUCTION FOR SEMICONDUCTOR DEVICES
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05/05/2009
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01/03/2008
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05/01/2008
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Title:
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SYSTEM OF USING OFFSET GAGE FOR CMP POLISHING PAD ALIGNMENT AND ADJUSTMENT
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04/10/2012
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11999168
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12/04/2007
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04/24/2008
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METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING TRENCHED DIFFUSION REGION AND METHOD OF FORMING SAME
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09/01/2009
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01/24/2008
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06/05/2008
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METHOD FOR REDIRECTING VOID DIFFUSION AWAY FROM VIAS IN AN INTEGRATED CIRCUIT DESIGN
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07/12/2011
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04/30/2008
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11/05/2009
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HIGH VOLTAGE TOLERANT METAL-OXIDE-SEMICONDUCTOR DEVICE
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NONE
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05/02/2008
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11/13/2008
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04/19/2011
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09/04/2008
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YIELD PROFILE MANIPULATOR
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02/26/2013
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06/17/2008
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12/18/2008
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09/06/2011
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05/30/2008
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09/25/2008
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12/29/2009
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11/06/2008
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01/12/2010
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08/13/2008
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12/11/2008
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07/27/2010
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08/17/2010
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01/08/2009
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10/23/2008
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METHOD TO REDUCE BORON PENETRATION IN A SiGe BIPOLAR DEVICE
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07/05/2011
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04/29/2010
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05/21/2009
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03/16/2010
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04/23/2009
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03/01/2011
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06/24/2010
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04/09/2013
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07/30/2009
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09/20/2011
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05/21/2009
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10/18/2011
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11/18/2010
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ELECTRONIC PRESSURE-SENSING DEVICE
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