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06/12/2003
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08/07/2003
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08/14/2003
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08/14/2003
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04/25/2006
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10/30/2003
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11/04/2004
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SPECULATION POINTERS TO IDENTIFY DATA-SPECULATIVE OPERATIONS IN MICROPROCESSOR
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10429697
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Filing Dt:
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05/06/2003
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Title:
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FINFET-BASED SRAM CELL
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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10434692
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Filing Dt:
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05/09/2003
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Title:
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APPARATUS AND METHOD FOR BALANCED SPINLOCK SUPPORT IN NUMA SYSTEMS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10434999
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Filing Dt:
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05/09/2003
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Publication #:
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Pub Dt:
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07/01/2004
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Title:
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METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10435842
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Filing Dt:
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05/12/2003
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Publication #:
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Pub Dt:
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11/18/2004
| | | | |
Title:
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BUILT-IN SELF TEST SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10436213
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Filing Dt:
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05/12/2003
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Publication #:
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Pub Dt:
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11/18/2004
| | | | |
Title:
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METHOD OF OPTIMIZING AND ANALYZING SELECTED PORTIONS OF A DIGITAL INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/15/2005
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Application #:
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10436432
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Filing Dt:
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05/12/2003
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Publication #:
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Pub Dt:
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11/18/2004
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Title:
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COUPLED BODY CONTACTS FOR SOI DIFFERENTIAL CIRCUITS
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10440847
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Filing Dt:
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05/19/2003
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Title:
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NICKEL ALLOY FOR SMOS PROCESS SILICIDATION
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10442131
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Filing Dt:
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05/21/2003
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Publication #:
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Pub Dt:
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11/25/2004
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Title:
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MULTIPLE-GATE MOS DEVICE AND METHOD FOR MAKING THE SAME
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10442975
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Filing Dt:
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05/22/2003
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Title:
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STRAINED-SILICON DEVICE WITH DIFFERENT SILICON THICKNESSES
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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10444226
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Filing Dt:
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05/23/2003
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Title:
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COLUMN REDUNDANCY SYSTEM AND METHOD FOR A MICRO-CELL EMBEDDED DRAM (E-DRAM) ARCHITECTURE
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10446297
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Filing Dt:
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05/28/2003
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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10447047
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Filing Dt:
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05/28/2003
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Publication #:
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Pub Dt:
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12/02/2004
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Title:
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METHOD OF FABRICATING BODY-TIED SOI TRANSISTOR HAVING HALO IMPLANT REGION UNDERLYING HAMMERHEAD PORTION OF GATE
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Patent #:
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Issue Dt:
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09/14/2004
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Application #:
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10448723
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Filing Dt:
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05/30/2003
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Title:
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SRAM CELL WITH BOOTSTRAPPED POWER LINE
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10448776
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Filing Dt:
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05/29/2003
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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BI-DIRECTIONAL READ WRITE DATA STRUCTURE AND METHOD FOR MEMORY
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Patent #:
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Issue Dt:
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04/11/2006
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Application #:
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10448954
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Filing Dt:
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05/30/2003
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Publication #:
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Pub Dt:
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12/02/2004
| | | | |
Title:
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SIGE LATTICE ENGINEERING USING A COMBINATION OF OXIDATION, THINNING AND EPITAXIAL REGROWTH
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10455601
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Filing Dt:
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06/05/2003
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Publication #:
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Pub Dt:
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12/09/2004
| | | | |
Title:
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DECODE PATH GATED LOW ACTIVE POWER SRAM
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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10458147
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Filing Dt:
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06/10/2003
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Publication #:
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Pub Dt:
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12/16/2004
| | | | |
Title:
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SYSTEM AND METHOD FOR WRITING TO A MAGNETIC SHIFT REGISTER
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Patent #:
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Issue Dt:
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12/21/2004
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Application #:
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10458554
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Filing Dt:
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06/10/2003
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Publication #:
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Pub Dt:
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12/16/2004
| | | | |
Title:
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SHIFTABLE MAGNETIC SHIFT REGISTER AND METHOD OF USING THE SAME
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Patent #:
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Issue Dt:
|
07/27/2004
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Application #:
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10459328
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Filing Dt:
|
06/11/2003
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Title:
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METHOD FOR FORMING DUAL INLAID STRUCTURES FOR IC INTERCONNECTIONS
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Patent #:
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Issue Dt:
|
10/18/2011
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Application #:
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10459344
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Filing Dt:
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06/11/2003
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Title:
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FASTER MEMORY ACCESS IN NON-UNIFIED MEMORY ACCESS SYSTEMS
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Patent #:
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Issue Dt:
|
06/29/2004
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Application #:
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10459579
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Filing Dt:
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06/12/2003
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Title:
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DUAL SILICON LAYER FOR CHEMICAL MECHANICAL POLISHING PLANARIZATION
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Patent #:
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Issue Dt:
|
02/24/2004
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Application #:
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10459978
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Filing Dt:
|
06/12/2003
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Title:
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MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
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Patent #:
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Issue Dt:
|
11/09/2004
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Application #:
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10460615
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Filing Dt:
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06/11/2003
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Title:
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METHOD OF SIMULTANEOUS DISPLAY OF DIE AND WAFER CHARACTERIZATION IN INTEGRATED CIRCUIT TECHNOLOGY DEVELOPMENT
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Patent #:
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Issue Dt:
|
05/30/2006
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Application #:
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10461090
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Filing Dt:
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06/13/2003
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Publication #:
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Pub Dt:
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12/16/2004
| | | | |
Title:
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BILAYERED METAL HARDMASKS FOR USE IN DUAL DAMASCENE ETCH SCHEMES
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10461821
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Filing Dt:
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06/13/2003
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Publication #:
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Pub Dt:
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11/13/2003
| | | | |
Title:
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FULLY-DEPLETED SOI MOSFETS WITH LOW SOURCE AND DRAIN RESISTANCE AND MINIMAL OVERLAP CAPACITANCE USING A RECESSED CHANNEL DAMASCENE GATE PROCESS
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10462933
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Filing Dt:
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06/17/2003
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Publication #:
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Pub Dt:
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12/23/2004
| | | | |
Title:
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HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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10463038
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Filing Dt:
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06/17/2003
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Publication #:
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Pub Dt:
|
08/12/2004
| | | | |
Title:
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ULTRA SCALABLE HIGH SPEED HETEROJUNCTION VERTICAL N-CHANNEL MISFETS AND METHODS THEREOF
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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10464339
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Filing Dt:
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06/18/2003
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Publication #:
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Pub Dt:
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11/13/2003
| | | | |
Title:
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ALL-IN-ONE DISPOSABLE/PERMANENT SPACER ELEVATED SOURCE/DRAIN, SELF-ALIGNED SILICIDE CMOS
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Patent #:
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Issue Dt:
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07/27/2004
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Application #:
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10464400
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Filing Dt:
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06/19/2003
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Publication #:
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Pub Dt:
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11/20/2003
| | | | |
Title:
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ASYMMETRICAL MOSFET LAYOUT FOR HIGH CURRENTS AND HIGH SPEED OPERATION
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10465506
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Filing Dt:
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06/19/2003
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Publication #:
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Pub Dt:
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11/20/2003
| | | | |
Title:
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CHIP AND WAFER INTEGRATION PROCESS USING VERTICAL CONNECTIONS
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Patent #:
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Issue Dt:
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05/16/2006
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Application #:
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10465797
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Filing Dt:
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06/20/2003
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Publication #:
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Pub Dt:
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12/23/2004
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Title:
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NONVOLATILE MEMORY DEVICE USING SEMICONDUCTOR NANOCRYSTALS AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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02/07/2006
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Application #:
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10499538
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Filing Dt:
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06/21/2004
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Publication #:
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Pub Dt:
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03/03/2005
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Title:
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ELECTRODE STRUCTURE FOR ELECTRONIC AND OPTO-ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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08/14/2007
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Application #:
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10523310
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Filing Dt:
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01/27/2005
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Publication #:
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Pub Dt:
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01/26/2006
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Title:
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DIAPHRAGM ACTIVATED MICRO-ELECTROMECHANICAL SWITCH
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Patent #:
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Issue Dt:
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06/17/2008
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Application #:
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10536483
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Filing Dt:
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05/24/2005
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Publication #:
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Pub Dt:
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03/16/2006
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Title:
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STRAINED FINFET CMOS DEVICE STRUCTURES
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Patent #:
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Issue Dt:
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02/12/2008
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10537238
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05/31/2005
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05/04/2006
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Title:
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METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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10539333
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Filing Dt:
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06/15/2005
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Publication #:
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Pub Dt:
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06/15/2006
| | | | |
Title:
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INTEGRATED ANTIFUSE STRUCTURE FOR FINFET AND CMOS DEVICES
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Patent #:
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Issue Dt:
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04/26/2011
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10596022
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05/25/2006
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Pub Dt:
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01/15/2009
| | | | |
Title:
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CARBON NANOTUBE CONDUCTOR FOR TRENCH CAPACITORS
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