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11/11/2008
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11811394
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06/08/2007
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10/25/2007
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06/10/2008
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06/11/2007
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10/18/2007
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02/23/2010
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06/11/2007
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10/18/2007
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02/22/2011
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06/11/2007
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10/18/2007
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02/18/2014
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06/12/2007
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12/18/2008
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04/07/2009
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06/12/2007
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12/18/2008
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12/18/2012
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06/14/2007
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12/18/2008
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04/05/2011
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06/21/2007
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01/10/2008
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08/18/2009
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06/22/2007
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01/10/2008
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SEMICONDUCTOR MEMORY DEVICE
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02/09/2010
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07/30/2007
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06/26/2008
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05/03/2011
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06/15/2007
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12/18/2008
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07/26/2011
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06/15/2007
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12/18/2008
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11/29/2011
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06/15/2007
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12/18/2008
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06/28/2011
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11818983
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06/15/2007
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12/18/2008
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06/08/2010
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06/15/2007
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12/18/2008
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09/15/2015
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11818996
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06/15/2007
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12/18/2008
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10/19/2010
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06/15/2007
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12/18/2008
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02/23/2010
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06/15/2007
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12/18/2008
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02/14/2012
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11819000
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06/15/2007
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12/18/2008
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ERROR DETECTION FOR MULTI-BIT MEMORY
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08/03/2010
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11820007
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06/15/2007
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12/18/2008
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05/26/2009
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11820011
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06/15/2007
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12/18/2008
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07/28/2009
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06/19/2007
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12/25/2008
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12/15/2009
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11821462
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06/21/2007
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12/25/2008
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MEMORY IN LOGIC CELL
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11/29/2011
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06/22/2007
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12/27/2007
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06/30/2009
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06/25/2007
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10/25/2007
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06/02/2009
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06/26/2007
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01/17/2008
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INTEGRATED CIRCUIT INCLUDING MEMORY ARRAY HAVING A SEGMENTED BIT LINE ARCHITECTURE AND METHOD OF CONTROLLING AND/OR OPERATING SAME
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11/17/2009
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06/26/2007
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01/01/2009
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01/25/2011
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07/03/2007
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01/17/2008
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SEMICONDUCTOR DEVICE
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10/19/2010
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07/06/2007
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01/17/2008
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11/24/2009
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06/27/2007
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01/01/2009
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03/22/2011
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06/28/2007
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01/01/2009
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06/30/2009
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06/28/2007
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01/01/2009
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SELECT GATE TRANSISTORS AND METHODS OF OPERATING THE SAME
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04/28/2009
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11823587
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06/28/2007
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12/13/2007
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02/21/2012
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06/28/2007
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01/01/2009
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07/20/2010
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06/28/2007
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01/01/2009
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11/03/2009
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06/29/2007
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01/01/2009
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SYSTEM AND METHOD FOR CONDITIONING DIFFERENTIAL CLOCK SIGNALS AND INTEGRATED CIRCUIT LOAD BOARD USING SAME
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09/29/2009
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06/29/2007
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01/01/2009
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MEMORY DEVICE BIT LINE SENSING SYSTEM AND METHOD THAT COMPENSATES FOR BIT LINE RESISTANCE VARIATIONS
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04/15/2008
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07/03/2007
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11/01/2007
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MEMORY CELL REPAIR USING FUSE PROGRAMMING METHOD IN A MEMORY DEVICE
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05/25/2010
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07/06/2007
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01/10/2008
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05/25/2010
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07/19/2007
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02/28/2008
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11/24/2009
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07/11/2007
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01/15/2009
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06/01/2010
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07/13/2007
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11/08/2007
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FORMING INTEGRATED CIRCUIT DEVICES
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03/25/2014
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07/25/2007
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01/29/2009
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12/15/2009
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07/25/2007
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01/29/2009
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07/07/2009
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07/27/2007
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01/31/2008
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11/02/2010
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07/27/2007
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01/24/2008
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MEMORY CELL WITH BURIED DIGIT LINE
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08/20/2013
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07/30/2007
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11/15/2007
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HIGHLY SELECTIVE DOPED OXIDE ETCHANT
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02/08/2011
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07/30/2007
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11/15/2007
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03/17/2015
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07/30/2007
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02/05/2009
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09/27/2011
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07/30/2007
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02/05/2009
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04/06/2010
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07/30/2007
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02/05/2009
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10/22/2013
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07/31/2007
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02/05/2009
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06/05/2012
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07/31/2007
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02/05/2009
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03/08/2011
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07/31/2007
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02/05/2009
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03/08/2011
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07/31/2007
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01/24/2008
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01/12/2010
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02/05/2009
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03/01/2011
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08/01/2007
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02/05/2009
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03/29/2011
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08/02/2007
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11/22/2007
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07/09/2013
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Pub Dt:
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02/05/2009
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Title:
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SEMICONDUCTOR STRUCTURES INCLUDING TIGHT PITCH CONTACTS AND METHODS TO FORM SAME
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Patent #:
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Issue Dt:
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05/12/2009
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Application #:
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11833400
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Filing Dt:
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08/03/2007
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
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NON-VOLATILE MEMORY DEVICE AND METHOD OF HANDLING A DATUM READ FROM A MEMORY CELL
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Patent #:
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Issue Dt:
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04/10/2012
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Application #:
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11834258
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Filing Dt:
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08/06/2007
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Publication #:
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Pub Dt:
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02/12/2009
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Title:
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METHODS FOR SUBSTANTIALLY EQUALIZING RATES AT WHICH MATERIAL IS REMOVED OVER AN AREA OF A STRUCTURE OR FILM THAT INCLUDES RECESSES OR CREVICES
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Patent #:
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Issue Dt:
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05/26/2009
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Application #:
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11834367
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Filing Dt:
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08/06/2007
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Publication #:
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Pub Dt:
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02/14/2008
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Title:
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PSEUDO SOI SUBSTRATE AND ASSOCIATED SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11834765
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Filing Dt:
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08/07/2007
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Publication #:
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Pub Dt:
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02/12/2009
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Title:
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PACKAGED INTEGRATED CIRCUIT DEVICES WITH THROUGH-BODY CONDUCTIVE VIAS, AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
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03/16/2010
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Application #:
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11835039
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Filing Dt:
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08/07/2007
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Publication #:
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Pub Dt:
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09/04/2008
| | | | |
Title:
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POWER MANAGEMENT OF NON-VOLATILE MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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06/23/2009
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Application #:
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11835709
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
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11/29/2007
| | | | |
Title:
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MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES
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Patent #:
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Issue Dt:
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09/08/2009
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Application #:
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11837149
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Filing Dt:
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08/10/2007
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Publication #:
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Pub Dt:
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11/29/2007
| | | | |
Title:
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METHODS OF PROGRAMMING MEMORY CELLS USING MANIPULATION OF OXYGEN VACANCIES
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Patent #:
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Issue Dt:
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03/23/2010
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Application #:
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11838070
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Filing Dt:
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08/13/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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METHODS OF FORMING A PLURALITY OF CAPACITORS
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Patent #:
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Issue Dt:
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10/06/2015
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Application #:
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11839377
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Filing Dt:
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08/15/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR LENS ALIGNMENT FOR OPTICALLY SENSITIVE DEVICES AND SYSTEMS IMPLEMENTING SAME
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Patent #:
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Issue Dt:
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10/09/2012
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Application #:
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11839628
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Filing Dt:
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08/16/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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SELECTIVE WET ETCHING OF HAFNIUM ALUMINUM OXIDE FILMS
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Patent #:
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Issue Dt:
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08/10/2010
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Application #:
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11839900
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Filing Dt:
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08/16/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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TEMPERATURE SENSOR CIRCUIT, DEVICE, SYSTEM, AND METHOD
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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11840074
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Filing Dt:
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08/16/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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COMMAND INTERFACE SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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10/11/2011
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Application #:
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11840120
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Filing Dt:
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08/16/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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METHODS OF FORMING THROUGH SUBSTRATE INTERCONNECTS
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Patent #:
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Issue Dt:
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12/14/2010
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Application #:
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11840485
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Filing Dt:
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08/17/2007
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Publication #:
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Pub Dt:
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02/19/2009
| | | | |
Title:
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METHOD OF FORMING COMPLEX OXIDE NANODOTS FOR A CHARGE TRAP
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Patent #:
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Issue Dt:
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04/14/2009
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Application #:
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11840815
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Filing Dt:
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08/17/2007
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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MULTIPLE DIE STACK APPARATUS EMPLOYING T-SHAPED INTERPOSER ELEMENTS
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11841180
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Filing Dt:
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08/20/2007
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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INTERCONNECT STRUCTURES WITH INTERLAYER DIELECTRIC
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11841296
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Filing Dt:
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08/20/2007
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Publication #:
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Pub Dt:
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12/06/2007
| | | | |
Title:
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SPACER PATTERNED, HIGH DIELECTRIC CONSTANT CAPACITOR
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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11841351
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Filing Dt:
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08/20/2007
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Publication #:
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Pub Dt:
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12/13/2007
| | | | |
Title:
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COMPUTER SYSTEMS HAVING AN INTERPOSER INCLUDING A FLEXIBLE MATERIAL
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Patent #:
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Issue Dt:
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04/10/2012
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Application #:
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11841406
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Filing Dt:
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08/20/2007
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Publication #:
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Pub Dt:
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02/26/2009
| | | | |
Title:
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MULTI-PROCESSOR SYSTEM HAVING AT LEAST ONE PROCESSOR THAT COMPRISES A DYNAMICALLY RECONFIGURABLE INSTRUCTION SET
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Patent #:
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Issue Dt:
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05/12/2009
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Application #:
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11842531
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Filing Dt:
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08/21/2007
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Publication #:
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Pub Dt:
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12/13/2007
| | | | |
Title:
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BITLINE EXCLUSION IN VERIFICATION OPERATION
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Patent #:
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Issue Dt:
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02/03/2009
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Application #:
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11842662
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Filing Dt:
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08/21/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE AND REFRESH CONTROL METHOD THEREOF
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11842817
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Filing Dt:
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08/21/2007
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Publication #:
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Pub Dt:
|
02/26/2009
| | | | |
Title:
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SYSTEM, APPARATUS, AND METHOD FOR MEMORY BUILT-IN SELF TESTING USING MICROCODE SEQUENCERS
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Patent #:
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Issue Dt:
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06/30/2009
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Application #:
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11843371
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Filing Dt:
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08/22/2007
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Publication #:
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Pub Dt:
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12/13/2007
| | | | |
Title:
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DELAY LINE CIRCUIT
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Patent #:
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Issue Dt:
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08/03/2010
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Application #:
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11843466
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Filing Dt:
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08/22/2007
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Publication #:
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Pub Dt:
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02/26/2009
| | | | |
Title:
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ERROR SCANNING IN FLASH MEMORY
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Patent #:
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Issue Dt:
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01/12/2010
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Application #:
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11844390
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Filing Dt:
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08/24/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A POLYMETAL GATE ELECTRODE STRUCTURE
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11844470
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Filing Dt:
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08/24/2007
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Publication #:
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Pub Dt:
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03/06/2008
| | | | |
Title:
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VOLTAGE REGULATOR OR NON-VOLATILE MEMORIES IMPLEMENTED WITH LOW-VOLTAGE TRANSISTORS
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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11844480
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Filing Dt:
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08/24/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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METHOD FOR COMPACTING THE ERASED THRESHOLD VOLTAGE DISTRIBUTION OF FLASH MEMORY DEVICES DURING WRITING OPERATIONS
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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11845120
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Filing Dt:
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08/27/2007
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Publication #:
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Pub Dt:
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02/28/2008
| | | | |
Title:
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SEMICONDUCTOR DEVICE AND MANUFACTURE METHOD THEREOF
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Patent #:
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Issue Dt:
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09/15/2009
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Application #:
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11845605
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Filing Dt:
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08/27/2007
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Publication #:
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Pub Dt:
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03/13/2008
| | | | |
Title:
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SEMICONDUCTOR STORAGE DEVICE
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Patent #:
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Issue Dt:
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03/10/2009
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Application #:
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11846041
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Filing Dt:
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08/28/2007
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Publication #:
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Pub Dt:
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12/20/2007
| | | | |
Title:
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TRENCH INSULATION STRUCTURES INCLUDING AN OXIDE LINER AND OXIDATION BARRIER
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Patent #:
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Issue Dt:
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06/21/2011
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Application #:
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11846371
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Filing Dt:
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08/28/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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ENHANCED PERFORMANCE MEMORY SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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08/17/2010
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Application #:
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11846404
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Filing Dt:
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08/28/2007
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Publication #:
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Pub Dt:
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12/27/2007
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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Patent #:
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Issue Dt:
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04/05/2011
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Application #:
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11846427
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Filing Dt:
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08/28/2007
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Publication #:
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Pub Dt:
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12/20/2007
| | | | |
Title:
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LINER FOR SHALLOW TRENCH ISOLATION
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Patent #:
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Issue Dt:
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02/03/2015
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Application #:
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11846460
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Filing Dt:
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08/28/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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REDISTRIBUTION STRUCTURES FOR MICROFEATURE WORKPIECES
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Patent #:
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Issue Dt:
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12/21/2010
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Application #:
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11846928
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Filing Dt:
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08/29/2007
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Publication #:
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Pub Dt:
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01/15/2009
| | | | |
Title:
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PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
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Patent #:
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Issue Dt:
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11/24/2009
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Application #:
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11847113
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Filing Dt:
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08/29/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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MEMORY DEVICE INTERFACE METHODS, APPARATUS, AND SYSTEMS
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Patent #:
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Issue Dt:
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10/15/2013
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Application #:
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11847169
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Filing Dt:
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08/29/2007
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Publication #:
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Pub Dt:
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03/05/2009
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Title:
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COMPILER FOR GENERATING AN EXECUTABLE COMPRISING INSTRUCTIONS FOR A PLURALITY OF DIFFERENT INSTRUCTION SETS
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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11847183
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Filing Dt:
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08/29/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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THICKENED SIDEWALL DIELECTRIC FOR MEMORY CELL
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Patent #:
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Issue Dt:
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05/31/2011
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Application #:
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11847543
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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JITTERY SIGNAL GENERATION WITH DISCRETE-TIME FILTERING
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Patent #:
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Issue Dt:
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07/28/2009
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Application #:
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11847559
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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POWER SAVING SENSING SCHEME FOR SOLID STATE MEMORY
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Patent #:
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Issue Dt:
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10/05/2010
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Application #:
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11847575
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Filing Dt:
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08/30/2007
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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COMBINED PARALLEL/SERIAL STATUS REGISTER READ
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