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NONE
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Application #:
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13491873
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Filing Dt:
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06/08/2012
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Publication #:
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Pub Dt:
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12/12/2013
| | | | |
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Title:
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Plating Stub Resonance Shift with Filter Stub Design Methodology
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Patent #:
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Issue Dt:
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09/19/2017
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Application #:
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13492108
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Filing Dt:
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06/08/2012
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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METHOD OF FABRICATING A FINFET HAVING A GATE STRUCTURE DISPOSED AT LEAST PARTIALLY AT A BEND REGION OF THE SEMICONDUCTOR FIN.
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13492399
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Filing Dt:
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06/08/2012
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Publication #:
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Pub Dt:
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12/12/2013
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Title:
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IDENTIFICATION OF MISTIMED FORCING OF VALUES IN DESIGN SIMULATION
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Patent #:
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Issue Dt:
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09/24/2013
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Application #:
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13492964
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Filing Dt:
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06/11/2012
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Publication #:
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Pub Dt:
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09/27/2012
| | | | |
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Title:
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COMPUTER IMPLEMENTED DESIGN OF DEVICE FOR ELECTRO-OPTICAL
MODULATION OF LIGHT INCIDENT UPON DEVICE
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Patent #:
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Issue Dt:
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11/17/2015
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Application #:
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13494047
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Filing Dt:
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06/12/2012
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Publication #:
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Pub Dt:
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12/12/2013
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Title:
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Optimizing Heat Transfer in 3-D Chip-Stacks
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13494312
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Filing Dt:
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06/12/2012
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Publication #:
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Pub Dt:
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12/12/2013
| | | | |
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Title:
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PREVENTING FULLY SILICIDED FORMATION IN HIGH-K METAL GATE PROCESSING
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Patent #:
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Issue Dt:
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12/17/2013
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Application #:
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13494327
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Filing Dt:
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06/12/2012
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Publication #:
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Pub Dt:
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10/04/2012
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Title:
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LAYERED STRUCTURE WITH FUSE
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Patent #:
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Issue Dt:
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01/07/2014
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Application #:
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13494635
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Filing Dt:
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06/12/2012
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Publication #:
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Pub Dt:
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12/12/2013
| | | | |
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Title:
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SIDE-GATE DEFINED TUNABLE NANOCONSTRICTION IN DOUBLE-GATED GRAPHENE MULTILAYERS
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Patent #:
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Issue Dt:
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12/16/2014
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Application #:
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13494667
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Filing Dt:
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06/12/2012
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Publication #:
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Pub Dt:
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12/12/2013
| | | | |
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Title:
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THREE DIMENSIONAL FLIP CHIP SYSTEM AND METHOD
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Patent #:
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Issue Dt:
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04/22/2014
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Application #:
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13495081
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Filing Dt:
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06/13/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
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Title:
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METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) GATE TERMINATION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13495148
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Filing Dt:
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06/13/2012
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Publication #:
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Pub Dt:
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11/28/2013
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Title:
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METHODS FOR FABRICATING SEMICONDUCTOR WIRE-ARRAY VARACTOR STRUCTURES
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Patent #:
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Issue Dt:
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03/26/2013
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Application #:
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13495195
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Filing Dt:
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06/13/2012
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
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Title:
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SEMICONDUCTOR DEVICE AND METHOD OF MAKING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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01/06/2015
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Application #:
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13523048
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
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Title:
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CONTINUOUSLY SCALABLE WIDTH AND HEIGHT SEMICONDUCTOR FINS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13523179
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Filing Dt:
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06/14/2012
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|
Publication #:
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Pub Dt:
|
12/12/2013
| | | | |
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Title:
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PLATING BATHS AND METHODS FOR ELECTROPLATING SELENIUM AND SELENIUM ALLOYS
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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13523182
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
|
12/19/2013
| | | | |
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Title:
|
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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Patent #:
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Issue Dt:
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01/21/2014
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Application #:
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13523331
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
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01/03/2013
| | | | |
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Title:
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ANALOG-DIGITAL CONVERTER
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Patent #:
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Issue Dt:
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11/26/2013
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Application #:
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13523624
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
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Title:
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BITLINE DELETION
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Patent #:
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Issue Dt:
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07/22/2014
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Application #:
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13523633
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Filing Dt:
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06/14/2012
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Publication #:
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Pub Dt:
|
12/19/2013
| | | | |
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Title:
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BITLINE DELETION
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Patent #:
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Issue Dt:
|
12/16/2014
|
Application #:
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13523971
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Filing Dt:
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06/15/2012
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Publication #:
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Pub Dt:
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12/19/2013
| | | | |
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Title:
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BAD WORDLINE/ARRAY DETECTION IN MEMORY
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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13523983
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Filing Dt:
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06/15/2012
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|
Publication #:
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Pub Dt:
|
12/27/2012
| | | | |
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Title:
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FACILITATING DEBUGGING A HARDWARE DESIGN
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13524131
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Filing Dt:
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06/15/2012
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Publication #:
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|
Pub Dt:
|
11/28/2013
| | | | |
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Title:
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FIN ISOLATION FOR MULTIGATE TRANSISTORS
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13524298
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Filing Dt:
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06/15/2012
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Publication #:
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|
Pub Dt:
|
10/04/2012
| | | | |
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Title:
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PATTERNABLE LOW-K DIELECTRIC INTERCONNECT STRUCTURE WITH A GRADED CAP LAYER AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
|
10/01/2013
|
Application #:
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13524576
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Filing Dt:
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06/15/2012
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Title:
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REPLACEMENT METAL GATE PROCESSING WITH REDUCED INTERLEVEL DIELECTRIC LAYER ETCH RATE
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Patent #:
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Issue Dt:
|
12/31/2013
|
Application #:
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13525479
|
Filing Dt:
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06/18/2012
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Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
STRAINED SILICON AND STRAINED SILICON GERMANIUM ON INSULATOR METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS (MOSFETS)
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Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
13525650
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Filing Dt:
|
06/18/2012
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|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
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ISOLATION STRUCTURE FOR SEMICONDUCTOR DEVICES
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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13525996
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Filing Dt:
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06/18/2012
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|
Publication #:
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|
Pub Dt:
|
10/04/2012
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR GENERATING PROFILE OF SOLUTIONS TRADING OFF NUMBER OF ACTIVITIES UTILIZED AND OBJECTIVE VALUE FOR BILINEAR INTEGER OPTIMIZATION MODELS
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Patent #:
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Issue Dt:
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12/17/2013
|
Application #:
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13526139
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Filing Dt:
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06/18/2012
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|
Publication #:
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|
Pub Dt:
|
11/21/2013
| | | | |
|
Title:
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SEMICONDUCTOR ACTIVE MATRIX ON BURIED INSULATOR
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Patent #:
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Issue Dt:
|
05/20/2014
|
Application #:
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13526152
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Filing Dt:
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06/18/2012
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|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
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Title:
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METHOD AND APPARATUS FOR HIERARCHICAL WAFER QUALITY PREDICTIVE MODELING
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Patent #:
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|
Issue Dt:
|
09/02/2014
|
Application #:
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13526153
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Filing Dt:
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06/18/2012
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|
Publication #:
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|
Pub Dt:
|
03/20/2014
| | | | |
|
Title:
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Token-Based Current Control to Mitigate Current Delivery Limitations in Integrated Circuits
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|
Patent #:
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Issue Dt:
|
12/16/2014
|
Application #:
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13526252
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Filing Dt:
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06/18/2012
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Publication #:
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|
Pub Dt:
|
07/10/2014
| | | | |
|
Title:
|
ADAPTIVE WORKLOAD BASED OPTIMIZATIONS COUPLED WITH A HETEROGENEOUS CURRENT-AWARE BASELINE DESIGN TO MITIGATE CURRENT DELIVERY LIMITATIONS IN INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
07/01/2014
|
Application #:
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13526585
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Filing Dt:
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06/19/2012
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Publication #:
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Pub Dt:
|
11/28/2013
| | | | |
|
Title:
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DRIFT-INSENSITIVE OR INVARIANT MATERIAL FOR PHASE CHANGE MEMORY
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
13526840
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Filing Dt:
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06/19/2012
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|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
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Title:
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EPITAXIAL GROWTH OF SMOOTH AND HIGHLY STRAINED GERMANIUM
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13526915
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Filing Dt:
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06/19/2012
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|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
RESISTOR-2 RESISTOR (R-2R) DIGITAL-TO-ANALOG CONVERTER WITH RESISTOR NETWORK REVERSAL
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
13527063
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Filing Dt:
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06/19/2012
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|
Publication #:
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|
Pub Dt:
|
12/12/2013
| | | | |
|
Title:
|
PREVENTING FULLY SILICIDED FORMATION IN HIGH-K METAL GATE PROCESSING
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|
|
|
Patent #:
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|
Issue Dt:
|
05/26/2015
|
Application #:
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13527131
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Filing Dt:
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06/19/2012
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Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
THROUGH SILICON VIA WAFER AND METHODS OF MANUFACTURING
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
13527828
|
Filing Dt:
|
06/20/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
REPLACEMENT METAL GATE PROCESSING WITH REDUCED INTERLEVEL DIELECTRIC LAYER ETCH RATE
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|
|
|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
13527961
|
Filing Dt:
|
06/20/2012
|
|
Publication #:
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|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
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PHOTORECEPTOR WITH IMPROVED BLOCKING LAYER
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|
Patent #:
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|
Issue Dt:
|
01/13/2015
|
Application #:
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13528947
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Filing Dt:
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06/21/2012
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|
Publication #:
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Pub Dt:
|
12/26/2013
| | | | |
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Title:
|
PROBE-ON-SUBSTRATE
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|
Patent #:
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|
Issue Dt:
|
09/17/2013
|
Application #:
|
13529334
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Filing Dt:
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06/21/2012
|
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Title:
|
NANOWIRE FET AND FINFET
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|
Patent #:
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|
Issue Dt:
|
11/18/2014
|
Application #:
|
13529360
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Filing Dt:
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06/21/2012
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|
Publication #:
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|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
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|
Patent #:
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|
Issue Dt:
|
11/26/2013
|
Application #:
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13529389
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Filing Dt:
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06/21/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
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REDUNDANT METAL BARRIER STRUCTURE FOR INTERCONNECT APPLICATIONS
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|
Patent #:
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|
Issue Dt:
|
06/10/2014
|
Application #:
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13529557
|
Filing Dt:
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06/21/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
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STACKABLE PROGRAMMABLE PASSIVE DEVICE AND A TESTING METHOD
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|
Patent #:
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|
Issue Dt:
|
01/15/2013
|
Application #:
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13529558
|
Filing Dt:
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06/21/2012
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|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
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EMBEDDED STRESSOR FOR SEMICONDUCTOR STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
04/08/2014
|
Application #:
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13529625
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Filing Dt:
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06/21/2012
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|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
HETEROJUNCTION BIPOLAR TRANSISTORS AND METHODS OF MANUFACTURE
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
13530004
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Filing Dt:
|
06/21/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
ORGANIC SOLVENT DEVELOPABLE PHOTORESIST COMPOSITION
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|
Patent #:
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|
Issue Dt:
|
04/08/2014
|
Application #:
|
13530519
|
Filing Dt:
|
06/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
LATERAL EPITAXIAL GROWN SOI IN DEEP TRENCH STRUCTURES AND METHODS OF MANUFACTURE
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|
Patent #:
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|
Issue Dt:
|
03/25/2014
|
Application #:
|
13530549
|
Filing Dt:
|
06/22/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/11/2012
| | | | |
|
Title:
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NANOPILLAR DECOUPLING CAPACITOR
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|
Patent #:
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|
Issue Dt:
|
09/10/2013
|
Application #:
|
13530605
|
Filing Dt:
|
06/22/2012
|
|
Title:
|
METHOD OF LARGE-AREA CIRCUIT LAYOUT RECOGNITION
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|
Patent #:
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|
Issue Dt:
|
08/27/2013
|
Application #:
|
13530637
|
Filing Dt:
|
06/22/2012
|
|
Title:
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RADIATION HARDENED SOI STRUCTURE AND METHOD OF MAKING SAME
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|
Patent #:
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|
Issue Dt:
|
12/17/2013
|
Application #:
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13530725
|
Filing Dt:
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06/22/2012
|
|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
|
Title:
|
GRAPHENE BASED STRUCTURES AND METHODS FOR BROADBAND ELECTROMAGNETIC RADIATION ABSORPTION AT THE MICROWAVE AND TERAHERTZ FREQUENCIES
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|
Patent #:
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|
Issue Dt:
|
07/15/2014
|
Application #:
|
13530887
|
Filing Dt:
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06/22/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
INTEGRATION OF FIN-BASED DEVICES AND ETSOI DEVICES
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|
Patent #:
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|
Issue Dt:
|
08/27/2013
|
Application #:
|
13530889
|
Filing Dt:
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06/22/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
PHASE CHANGE MEMORY CYCLE TIMER AND METHOD
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|
Patent #:
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|
Issue Dt:
|
10/14/2014
|
Application #:
|
13531053
|
Filing Dt:
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06/22/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
STRAINED THIN BODY CMOS DEVICE HAVING VERTICALLY RAISED SOURCE/DRAIN STRESSORS WITH SINGLE SPACER
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|
Patent #:
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|
Issue Dt:
|
01/13/2015
|
Application #:
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13531175
|
Filing Dt:
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06/22/2012
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|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
DEVICE STRUCTURE, LAYOUT AND FABRICATION METHOD FOR UNIAXIALLY STRAINED TRANSISTORS
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|
Patent #:
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|
Issue Dt:
|
12/02/2014
|
Application #:
|
13531518
|
Filing Dt:
|
06/23/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
|
Title:
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INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
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|
|
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|
Patent #:
|
|
Issue Dt:
|
06/16/2015
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Application #:
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13531654
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Filing Dt:
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06/25/2012
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|
Publication #:
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Pub Dt:
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12/26/2013
| | | | |
|
Title:
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SHALLOW TRENCH ISOLATION STRUCTURES
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
13531703
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Filing Dt:
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06/25/2012
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|
Publication #:
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Pub Dt:
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10/18/2012
| | | | |
|
Title:
|
Gradient-Based Search Mechanism for Optimizing Photolithograph Masks
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Patent #:
|
|
Issue Dt:
|
05/28/2013
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Application #:
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13531733
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Filing Dt:
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06/25/2012
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|
Publication #:
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Pub Dt:
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10/18/2012
| | | | |
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Title:
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GRADIENT-BASED SEARCH MECHANISM FOR OPTIMIZING PHOTOLITHOGRAPH MASKS
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Patent #:
|
|
Issue Dt:
|
07/23/2013
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Application #:
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13531754
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
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Title:
|
Gradient-Based Search Mechanism for Optimizing Photolithograph Masks
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|
|
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Patent #:
|
|
Issue Dt:
|
07/23/2013
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Application #:
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13531778
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Filing Dt:
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06/25/2012
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Publication #:
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Pub Dt:
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10/18/2012
| | | | |
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Title:
|
GRADIENT-BASED SEARCH MECHANISM FOR OPTIMIZING PHOTOLITHOGRAPH MASKS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
03/18/2014
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Application #:
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13531780
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Filing Dt:
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06/25/2012
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|
Publication #:
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Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
SHALLOW TRENCH ISOLATION STRUCTURES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
13531811
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Filing Dt:
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06/25/2012
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|
Publication #:
|
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Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
GRADIENT-BASED SEARCH MECHANISM FOR OPTIMIZING PHOTOLITHOGRAPH MASKS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13531831
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Filing Dt:
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06/25/2012
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Publication #:
|
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Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
GRADIENT-BASED SEARCH MECHANISM FOR OPTIMIZING PHOTOLITHOGRAPH MASKS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
05/14/2013
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Application #:
|
13532204
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Filing Dt:
|
06/25/2012
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|
Publication #:
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Pub Dt:
|
11/01/2012
| | | | |
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Title:
|
RUNTIME DYNAMIC PERFORMANCE SKEW ELIMINATION
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
13532323
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Filing Dt:
|
06/25/2012
|
|
Title:
|
BIPOLAR JUNCTION TRANSISTOR WITH EPITAXIAL CONTACTS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2016
|
Application #:
|
13532716
|
Filing Dt:
|
06/25/2012
|
|
Publication #:
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|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
METHODS FOR FABRICATING MAGNETIC TRANSDUCERS USING POST-DEPOSITION TILTING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/26/2013
|
Application #:
|
13532991
|
Filing Dt:
|
06/26/2012
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|
Publication #:
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|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
COUPLING PIEZOELECTRIC MATERIAL GENERATED STRESSES TO DEVICES FORMED IN INTEGRATED CIRCUITS
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13533099
|
Filing Dt:
|
06/26/2012
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|
Publication #:
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|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
METHOD OF FABRICATING ISOLATED CAPACITORS AND STRUCTURE THEREOF
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
|
Application #:
|
13533182
|
Filing Dt:
|
06/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13533484
|
Filing Dt:
|
06/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
12/26/2013
| | | | |
|
Title:
|
IMPLEMENTING GATE WITHIN A GATE UTILIZING REPLACEMENT METAL GATE PROCESS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/16/2013
|
Application #:
|
13533499
|
Filing Dt:
|
06/26/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2015
|
Application #:
|
13534012
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13534037
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
INTEGRATION OF A TITANIA LAYER IN AN ANTI-REFLECTIVE COATING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13534067
|
Filing Dt:
|
06/27/2012
|
|
Title:
|
THREE DIMENSIONAL INTEGRATED CIRCUIT INTEGRATION USING ALIGNMENT VIA/DIELECTRIC BONDING FIRST AND THROUGH VIA FORMATION LAST
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2014
|
Application #:
|
13534082
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
DAMASCENE METHOD OF FORMING A SEMICONDUCTOR STRUCTURE AND A SEMICONDUCTOR STRUCTURE WITH MULTIPLE FIN-SHAPED CHANNEL REGIONS HAVING DIFFERENT WIDTHS
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13534241
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
|
Title:
|
EDGE SELECTION TECHNIQUES FOR CORRECTING CLOCK DUTY CYCLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13534350
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
13534355
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
ON-CHIP CAPACITORS WITH A VARIABLE CAPACITANCE FOR A RADIOFREQUENCY INTEGRATED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2014
|
Application #:
|
13534407
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
SEMICONDUCTOR DEVICE WITH EPITAXIAL SOURCE/DRAIN FACETTING PROVIDED AT THE GATE EDGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2013
|
Application #:
|
13534462
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
SEMICONDUCTOR SWITCHING DEVICE EMPLOYING A QUANTUM DOT STRUCTURE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13534522
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
CMOS DEVICES HAVING STRAIN SOURCE/DRAIN REGIONS AND LOW CONTACT RESISTANCE
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13534596
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
|
Title:
|
EDGE SELECTION TECHNIQUES FOR CORRECTING CLOCK DUTY CYCLE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2013
|
Application #:
|
13534855
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13534890
|
Filing Dt:
|
06/27/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
SURFACE CHARGE ENABLED NANOPOROUS SEMI-PERMEABLE MEMBRANE FOR DESALINATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13535393
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2012
| | | | |
|
Title:
|
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13535394
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
METHOD OF FORMING A FIELD EFFECT TRANSISTOR HAVING A GATE STRUCTURE TRAVERSING CHANNEL REGION COMPRISING A FIRST SECTION FORMED ON A CENTRAL PORTION AND A SECOND SECTION FORMED ABOVE THE FIRST SECTION AND EXTENDING ONTO THE ISOLATION REGION.
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13535412
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
STRUCTURE AND DESIGN STRUCTURE FOR HIGH-Q VALUE INDUCTOR AND METHOD OF MANUFACTURING THE SAME
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
13535466
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13535528
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
11/01/2012
| | | | |
|
Title:
|
SPIN-ON FORMULATION AND METHOD FOR STRIPPING AN ION IMPLANTED PHOTORESIST
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13535660
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
Enhanced Modularity in Heterogeneous 3D Stacks
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2016
|
Application #:
|
13535675
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
ENHANCED MODULARITY IN HETEROGENEOUS 3D STACKS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
13535676
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
3-D STACKED MULTIPROCESSOR STRUCTURES AND METHODS TO ENABLE RELIABLE OPERATION OF PROCESSORS AT SPEEDS ABOVE SPECIFIED LIMITS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
13535694
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
Enhanced Modularity in Heterogeneous 3D Stacks
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13535812
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
13535888
|
Filing Dt:
|
06/28/2012
|
|
Title:
|
DOUBLE LAYER INTERLEAVED P-N DIODE MODULATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13536163
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
INTEGRATED DESIGN ENVIRONMENT FOR NANOPHOTONICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2013
|
Application #:
|
13536366
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
10/25/2012
| | | | |
|
Title:
|
METHOD OF FORMING SWITCHING DEVICE HAVING A MOLYBDENUM OXYNITRIDE METAL GATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
13536601
|
Filing Dt:
|
06/28/2012
|
|
Title:
|
STRUCTURED LATCH AND LOCAL-CLOCK-BUFFER PLANNING
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13536915
|
Filing Dt:
|
06/28/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
Crossed slit structure for nanopores
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2015
|
Application #:
|
13537101
|
Filing Dt:
|
06/29/2012
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2014
| | | | |
|
Title:
|
COMPOSITE HIGH-K GATE DIELECTRIC STACK FOR REDUCING GATE LEAKAGE
|
|
