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04/12/2011
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12251944
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10/15/2008
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Pub Dt:
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04/15/2010
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Title:
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TECHNIQUES FOR SIMULTANEOUSLY DRIVING A PLURALITY OF SOURCE LINES
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04/12/2011
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12252223
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10/15/2008
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04/15/2010
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Title:
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EMBEDDED PROCESSOR
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11/29/2011
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12252495
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10/16/2008
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04/22/2010
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Title:
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MEMORY DEVICES, TRANSISTOR DEVICES AND RELATED METHODS
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02/22/2011
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12252499
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10/16/2008
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04/22/2010
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METHODS OF FORMING CAPACITORS
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11/16/2010
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12252618
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10/16/2008
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03/12/2009
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Title:
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DELAY STAGE-INTERWEAVED ANALOG DLL/PLL
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11/18/2014
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12252835
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10/16/2008
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Pub Dt:
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04/22/2010
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Title:
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SWITCHING DEVICE
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11/15/2011
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12252882
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Filing Dt:
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10/16/2008
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Pub Dt:
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01/21/2010
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Title:
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SWITCHING DEVICE
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10/18/2011
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12252934
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Filing Dt:
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10/16/2008
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Pub Dt:
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01/07/2010
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Title:
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SWITCHING METHOD
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10/04/2011
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12253121
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10/16/2008
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Pub Dt:
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04/22/2010
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Title:
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SEMICONDUCTOR SUBSTRATES WITH UNITARY VIAS AND VIA TERMINALS, AND ASSOCIATED SYSTEMS AND METHODS
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06/26/2012
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12253966
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10/18/2008
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04/22/2010
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Title:
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METHODS OF INDIRECT REGISTER ACCESS INCLUDING AUTOMATIC MODIFICATION OF A DIRECTLY ACCESSIBLE ADDRESS REGISTER
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01/20/2015
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12253967
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10/18/2008
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Pub Dt:
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04/22/2010
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Title:
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INDIRECT REGISTER ACCESS METHOD AND SYSTEM
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01/04/2011
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12254111
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10/20/2008
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Pub Dt:
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04/22/2010
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Title:
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STACKABLE SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES
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08/10/2010
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12255186
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10/21/2008
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02/19/2009
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Title:
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DRAM TUNNELING ACCESS TRANSISTOR
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02/08/2011
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12255523
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10/21/2008
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04/22/2010
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Title:
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REDUNDANT MEMORY ARRAY FOR REPLACING MEMORY SECTIONS OF MAIN MEMORY
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09/14/2010
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12257100
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10/23/2008
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Pub Dt:
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02/19/2009
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Title:
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FINNED MEMORY CELLS
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Patent #:
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03/01/2011
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12257732
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10/24/2008
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02/19/2009
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Title:
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REDUCING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE
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07/23/2013
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12258099
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10/24/2008
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04/29/2010
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Title:
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SYSTEM AND METHOD FOR CONTROLLING A FEATURE OF A TELECOMMUNICATIONS DEVICE BASED ON THE BODY TEMPERATURE OF A USER
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01/25/2011
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12259218
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10/27/2008
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04/29/2010
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Title:
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MEMORY DEVICES HAVING REDUNDANT ARRAYS FOR REPAIR
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10/16/2012
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12259363
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10/28/2008
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Pub Dt:
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04/29/2010
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Title:
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TEMPORARY MIRRORING, LOGICAL SEGREGATION, AND REDUNDANT PROGRAMMING OR ADDRESSING FOR SOLID STATE DRIVE OPERATION
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06/24/2014
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12259380
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10/28/2008
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04/29/2010
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Title:
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LOGICAL UNIT OPERATION
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04/17/2012
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12259625
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10/28/2008
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04/29/2010
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Title:
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CIRCUITRY AND METHODS MINIMIZING OUTPUT SWITCHING NOISE THROUGH SPLIT-LEVEL SIGNALING AND BUS DIVISION ENABLED BY A THIRD POWER SUPPLY
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01/17/2012
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12259921
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10/28/2008
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Pub Dt:
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04/29/2010
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Title:
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METHOD FOR SELECTIVELY PERMEATING A SELF-ASSEMBLED BLOCK COPOLYMER, METHOD FOR FORMING METAL OXIDE STRUCTURES, METHOD FOR FORMING A METAL OXIDE PATTERN, AND METHOD FOR PATTERNING A SEMICONDUCTOR STRUCTURE
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01/18/2011
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12259938
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10/28/2008
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Pub Dt:
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04/29/2010
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Title:
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MULTI-PHASE DUTY-CYCLE CORRECTED CLOCK SIGNAL GENERATOR AND MEMORY HAVING SAME
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08/05/2014
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12259949
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10/28/2008
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04/29/2010
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Title:
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ERROR CORRECTION IN MULTIPLE SEMICONDUCTOR MEMORY UNITS
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09/28/2010
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12261101
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10/30/2008
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Pub Dt:
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07/02/2009
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Title:
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OUTPUT BUFFER
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Patent #:
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02/28/2012
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12261124
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10/30/2008
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Pub Dt:
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05/06/2010
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Title:
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PROGRAMMING MEMORY CELLS WITH ADDITIONAL DATA FOR INCREASED THRESHOLD VOLTAGE RESOLUTION
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01/10/2012
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12261857
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10/30/2008
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Pub Dt:
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05/06/2010
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Title:
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MACRO AND COMMAND EXECUTION FROM MEMORY ARRAY
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12/14/2010
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12261928
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10/30/2008
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Pub Dt:
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05/06/2010
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Title:
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DATA PATH FOR MULTI-LEVEL CELL MEMORY, METHODS FOR STORING AND METHODS FOR UTILIZING A MEMORY ARRAY
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07/12/2011
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12261942
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10/30/2008
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01/07/2010
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Title:
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MULTI-SERIAL INTERFACE STACKED-DIE MEMORY ARCHITECTURE
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08/28/2012
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12261963
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10/30/2008
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Pub Dt:
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05/06/2010
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Title:
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SWITCHED INTERFACE STACKED-DIE MEMORY ARCHITECTURE
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NONE
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12262036
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10/30/2008
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Pub Dt:
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05/06/2010
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Title:
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SYSTEMS AND ASSOCIATED METHODS FOR DEPOSITING MATERIALS
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11/16/2010
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12262223
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10/31/2008
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Pub Dt:
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05/06/2010
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Title:
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RESISTIVE MEMORY
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09/20/2011
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12262405
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10/31/2008
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05/06/2010
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Title:
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PROGRAM WINDOW ADJUST FOR MEMORY CELL SIGNAL LINE DELAY
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06/19/2012
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12263203
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10/31/2008
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Pub Dt:
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05/06/2010
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Title:
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DYNAMICALLY CONFIGURED COPROCESSOR FOR DIFFERENT EXTENDED INSTRUCTION SET PERSONALITY SPECIFIC TO APPLICATION PROGRAM WITH SHARED MEMORY STORING INSTRUCTIONS INVISIBLY DISPATCHED FROM HOST PROCESSOR
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06/19/2012
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12264109
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11/03/2008
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Pub Dt:
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05/06/2010
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Title:
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PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED METHODS OF FOCUS CORRECTION
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08/16/2011
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12264354
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11/04/2008
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03/05/2009
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Title:
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EFFICIENT CLOCKING SCHEME FOR ULTRA HIGH-SPEED SYSTEMS
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09/04/2012
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12265032
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11/05/2008
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03/12/2009
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Title:
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METHOD FOR FABRICATING STACKED SEMICONDUCTOR COMPONENTS
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11/02/2010
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12265070
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11/05/2008
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Pub Dt:
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05/06/2010
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Title:
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METHODS OF FORMING A PLURALITY OF TRANSISTOR GATES, AND METHODS OF FORMING A PLURALITY OF TRANSISTOR GATES HAVING AT LEAST TWO DIFFERENT WORK FUNCTIONS
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Issue Dt:
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10/26/2010
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12265204
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11/05/2008
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Pub Dt:
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03/12/2009
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Title:
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DIGITAL CALIBRATION CIRCUITS, DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS OF OPERATION
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11/22/2011
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12265265
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11/05/2008
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Pub Dt:
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02/26/2009
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Title:
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ADJUSTABLE BYTE LANE OFFSET FOR MEMORY MODULE TO REDUCE SKEW
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06/28/2011
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12265421
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11/05/2008
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Pub Dt:
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05/06/2010
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Title:
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METHODS AND SYSTEMS TO ACCOMPLISH VARIABLE WIDTH DATA INPUT
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03/29/2011
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12265436
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11/05/2008
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Pub Dt:
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05/06/2010
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Title:
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BUS TRANSLATOR
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Patent #:
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Issue Dt:
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05/02/2017
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12265465
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11/05/2008
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Pub Dt:
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05/06/2010
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Title:
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Pattern-Recognition Processor with Results Buffer
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12/06/2011
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12265518
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11/05/2008
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Pub Dt:
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05/06/2010
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Title:
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RETICLES WITH SUBDIVIDED BLOCKING REGIONS
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03/13/2012
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12265989
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11/06/2008
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Pub Dt:
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05/06/2010
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Title:
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MEMORY DEVICE BIASING METHOD AND APPARATUS
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Issue Dt:
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06/09/2015
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12266202
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11/06/2008
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Pub Dt:
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05/06/2010
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Title:
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PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED ALIGNMENT CORRECTION METHODS
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09/04/2012
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12266276
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11/06/2008
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Pub Dt:
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05/06/2010
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Title:
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PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED METHODS OF OVERLAY ERROR CORRECTION
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11/02/2010
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12266376
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11/06/2008
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Pub Dt:
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05/06/2010
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Title:
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PRECHARGE CONTROL CIRCUITS AND METHODS FOR MEMORY HAVING BUFFERED WRITE COMMANDS
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08/02/2011
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12267308
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11/07/2008
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Pub Dt:
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03/12/2009
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MEMORY WITH WEIGHTED MULTI-PAGE READ
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Issue Dt:
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06/01/2010
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12267694
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11/10/2008
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03/12/2009
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PROGRAMMING A MEMORY WITH VARYING BITS PER CELL
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03/19/2013
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12268270
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11/10/2008
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05/13/2010
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METHODS AND SYSTEMS FOR DEVICES WITH A SELF-SELECTING BUS DECODER
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05/20/2014
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12268879
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11/11/2008
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03/18/2010
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EMBEDDED MAPPING INFORMATION FOR MEMORY DEVICES
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04/19/2011
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12270530
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11/13/2008
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Pub Dt:
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05/13/2010
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Title:
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METHODS OF FORMING ELECTRICALLY INSULATIVE MATERIALS, METHODS OF FORMING LOW K DIELECTRIC REGIONS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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02/22/2011
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12270533
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11/13/2008
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Pub Dt:
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05/13/2010
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Title:
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CIRCUITS, SYSTEMS, AND METHODS FOR REDUCING SIMULTANEOUS SWITCHING OUTPUT NOISE, POWER NOISE, OR COMBINATIONS THEREOF
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11/02/2010
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12271132
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11/14/2008
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Pub Dt:
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03/12/2009
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METHOD OF FORMING MEMORY DEVICES BY PERFORMING HALOGEN ION IMPLANTATION AND DIFFUSION PROCESSES
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10/13/2015
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12271140
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11/14/2008
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Pub Dt:
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05/20/2010
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AUTOMATIC WORD LINE LEAKAGE MEASUREMENT CIRCUITRY
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01/17/2012
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12271185
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11/14/2008
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Pub Dt:
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05/20/2010
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SYSTEMS AND METHODS FOR ERASING A MEMORY
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11/22/2011
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12271223
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11/14/2008
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05/20/2010
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ERASE VOLTAGE REDUCTION IN A NON-VOLATILE MEMORY DEVICE
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02/01/2011
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12272138
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Filing Dt:
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11/17/2008
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Pub Dt:
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05/20/2010
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Title:
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REPLACING DEFECTIVE COLUMNS OF MEMORY CELLS IN RESPONSE TO EXTERNAL ADDRESSES
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02/16/2010
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12272281
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11/17/2008
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03/19/2009
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Title:
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PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY
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02/07/2012
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12272358
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11/17/2008
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05/14/2009
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Title:
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NON-VOLATILE MEMORY WITH ERASE BLOCK STATE INDICATION IN A SUBSET OF SECTORS OF ERASE BLOCK
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06/15/2010
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12272500
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11/17/2008
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Pub Dt:
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03/12/2009
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Title:
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SYSTEMS AND METHODS FOR MANIPULATING LIQUID FILMS ON SEMICONDUCTOR SUBSTRATES
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05/08/2012
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12272517
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11/17/2008
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Pub Dt:
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05/20/2010
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Title:
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METHODS OF UTILIZING BLOCK COPOLYMER TO FORM PATTERNS
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04/13/2010
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12272590
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11/17/2008
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03/19/2009
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Title:
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NON-VOLATILE MEMORY DEVICE AND METHOD HAVING BIT-STATE ASSIGNMENTS SELECTED TO MINIMIZE SIGNAL COUPLING
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06/17/2014
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12274169
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11/19/2008
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Pub Dt:
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05/20/2010
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Title:
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METHODS FOR FORMING A CONDUCTIVE MATERIAL, METHODS FOR SELECTIVELY FORMING A CONDUCTIVE MATERIAL, METHODS FOR FORMING PLATINUM, AND METHODS FOR FORMING CONDUCTIVE STRUCTURES
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08/30/2011
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12274181
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11/19/2008
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05/20/2010
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Title:
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SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME
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05/21/2013
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12274426
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11/20/2008
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Pub Dt:
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05/20/2010
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Title:
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REPLACING DEFECTIVE MEMORY BLOCKS IN RESPONSE TO EXTERNAL ADDRESSES
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09/13/2011
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12274508
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11/20/2008
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05/20/2010
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Title:
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PROGRAM AND SENSE OPERATIONS IN A NON-VOLATILE MEMORY DEVICE
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09/15/2009
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12274570
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11/20/2008
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03/19/2009
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Title:
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LOW VOLTAGE DATA PATH AND CURRENT SENSE AMPLIFIER
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01/03/2012
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12274727
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11/20/2008
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05/20/2010
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Title:
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TWO-PART PROGRAMMING METHODS AND MEMORIES
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09/29/2009
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12274824
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11/20/2008
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03/19/2009
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TERRACED FILM STACK
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11/22/2011
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12276085
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11/21/2008
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05/27/2010
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Title:
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MULTI-PASS PROGRAMMING IN A MEMORY DEVICE
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01/11/2011
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12276152
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11/21/2008
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04/23/2009
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Title:
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LOCALIZED MASKING FOR SEMICONDUCTOR STRUCTURE DEVELOPMENT
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08/24/2010
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12276235
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11/21/2008
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03/19/2009
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SEMICONDUCTOR CONSTRUCTIONS, AND ELECTRONIC SYSTEMS
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06/22/2010
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12276699
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11/24/2008
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03/19/2009
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STATUS OF OVERALL HEALTH OF NONVOLATILE MEMORY
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11/03/2009
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12277114
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11/24/2008
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03/19/2009
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PHOTOACTIVE ADHESION PROMOTER
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10/26/2010
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12277554
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11/25/2008
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03/19/2009
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Title:
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DOUBLE DENSITY MRAM WITH PLANAR PROCESSING
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10/13/2009
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12284961
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09/26/2008
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02/05/2009
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Title:
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METHOD AND APPARATUS FOR VARYING THE PROGRAMMING DURATION AND/OR VOLTAGE OF AN ELECTRICALLY FLOATING BODY TRANSISTOR, AND MEMORY CELL ARRAY IMPLEMENTING SAME
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01/08/2013
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12285308
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10/01/2008
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04/01/2010
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VERTICAL 4-WAY SHARED PIXEL IN A SINGLE COLUMN WITH INTERNAL RESET AND NO ROW SELECT
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07/06/2010
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12289692
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10/31/2008
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05/21/2009
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DIELECTRIC RELAXATION MEMORY
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06/24/2014
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12293534
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12/23/2009
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08/26/2010
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SEMICONDUCTOR FIELD-EFFECT TRANSISTOR, MEMORY CELL AND MEMORY DEVICE
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04/28/2015
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12315723
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12/05/2008
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06/11/2009
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Control path I/O virtualisation
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02/21/2012
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12320571
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01/29/2009
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08/06/2009
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SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
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07/27/2010
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12323213
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11/25/2008
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03/19/2009
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STRUCTURE AND METHOD FOR FORMING A CAPACITIVELY COUPLED CHIP-TO-CHIP SIGNALING INTERFACE
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09/04/2012
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12323241
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11/25/2008
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05/27/2010
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APPARATUS FOR BYPASSING FAULTY CONNECTIONS
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03/10/2015
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12323717
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11/26/2008
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05/27/2010
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SHARING RESOURCES IN MULTI-DICE STACKS
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12/14/2010
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12323926
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11/26/2008
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05/27/2010
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MICROELECTRONIC DEVICE WAFERS INCLUDING AN IN-SITU MOLDED ADHESIVE, MOLDS FOR IN-SITU MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS, AND METHODS OF MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS
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12/20/2011
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12323978
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11/26/2008
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05/27/2010
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METHODS OF FORMING DIODES
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02/08/2011
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12323998
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11/26/2008
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03/26/2009
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METHOD FOR PRODUCTION OF MRAM ELEMENTS
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04/17/2012
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12324338
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11/26/2008
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05/27/2010
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LOCAL POWER DOMAINS FOR MEMORY SECTIONS OF AN ARRAY OF MEMORY
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07/27/2010
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12324375
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11/26/2008
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05/27/2010
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ADJUSTABLE VOLTAGE REGULATOR FOR PROVIDING A REGULATED OUTPUT VOLTAGE
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06/15/2010
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12324701
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11/26/2008
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04/23/2009
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VERTICAL GATED ACCESS TRANSISTOR
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05/24/2016
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12325875
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12/01/2008
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06/03/2010
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Systems and Methods for Managing Endian Mode of a Device
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05/22/2012
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12325929
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12/01/2008
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06/03/2010
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CALIBRATION METHODS AND DEVICES USEFUL IN SEMICONDUCTOR PHOTOLITHOGRAPHY
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06/26/2018
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12325982
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12/01/2008
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06/03/2010
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Systems and Methods to Enable Identification of Different Data Sets
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12325986
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12/01/2008
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Pub Dt:
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06/03/2010
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DEVICES, SYSTEMS, AND METHODS TO SYNCHRONIZE SIMULTANEOUS DMA PARALLEL PROCESSING OF A SINGLE DATA STREAM BY MULTIPLE DEVICES
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10/20/2015
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12325990
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12/01/2008
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Pub Dt:
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06/03/2010
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DEVICES, SYSTEMS, AND METHODS TO SYNCHRONIZE PARALLEL PROCESSING OF A SINGLE DATA STREAM
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09/23/2014
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12326165
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12/02/2008
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06/03/2010
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PASSWORD PROTECTED BUILT-IN TEST MODE FOR MEMORIES
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Issue Dt:
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08/03/2010
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12326598
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12/02/2008
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05/07/2009
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METHOD AND APPARATUS OF DETERMINING THE BEST FOCUS POSITION OF A LENS
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10/19/2010
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12326737
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12/02/2008
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03/26/2009
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Title:
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MEMORY DEVICE HAVING TERMINALS FOR TRANSFERRING MULTIPLE TYPES OF DATA
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