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|
Patent #:
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|
Issue Dt:
|
03/24/2015
|
Application #:
|
13741611
|
Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
LITHOGRAPHIC MATERIAL STACK INCLUDING A METAL-COMPOUND HARD MASK
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|
Patent #:
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|
Issue Dt:
|
03/24/2015
|
Application #:
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13741638
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Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
TITANIUM OXYNITRIDE HARD MASK FOR LITHOGRAPHIC PATTERNING
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Patent #:
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|
Issue Dt:
|
10/21/2014
|
Application #:
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13741645
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Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
Title:
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AUTOMATING INTEGRATED CIRCUIT DEVICE LIBRARY GENERATION IN MODEL BASED METROLOGY
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Patent #:
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|
Issue Dt:
|
07/29/2014
|
Application #:
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13741947
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Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
HYBRID CONDUCTOR THROUGH-SILICON-VIA FOR POWER DISTRIBUTION AND SIGNAL TRANSMISSION
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
13741978
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Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
05/22/2014
| | | | |
Title:
|
LOCAL TAILORING OF FINGERS IN MULTI-FINGER FIN FIELD EFFECT TRANSISTORS
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|
Patent #:
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|
Issue Dt:
|
12/03/2013
|
Application #:
|
13742338
|
Filing Dt:
|
01/15/2013
|
Publication #:
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|
Pub Dt:
|
05/23/2013
| | | | |
Title:
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ERROR CHECKING ADDRESSABLE BLOCKS IN STORAGE
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|
Patent #:
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|
Issue Dt:
|
02/03/2015
|
Application #:
|
13742465
|
Filing Dt:
|
01/16/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
PHOTO-PATTERNABLE DIELECTRIC MATERIALS CURABLE TO POROUS DIELECTRIC MATERIALS, FORMULATIONS, PRECURSORS AND METHODS OF USE THEREOF
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|
|
Patent #:
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|
Issue Dt:
|
04/14/2015
|
Application #:
|
13742490
|
Filing Dt:
|
01/16/2013
|
Publication #:
|
|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
PHOTO-PATTERNABLE DIELECTRIC MATERIALS CURABLE TO POROUS DIELECTRIC MATERIALS, FORMULATIONS, PRECURSORS AND METHODS OF USE THEREOF
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|
|
Patent #:
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|
Issue Dt:
|
01/28/2014
|
Application #:
|
13742508
|
Filing Dt:
|
01/16/2013
|
Publication #:
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|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HEAT DISSIPATION STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
03/17/2015
|
Application #:
|
13742526
|
Filing Dt:
|
01/16/2013
|
Publication #:
|
|
Pub Dt:
|
08/01/2013
| | | | |
Title:
|
PHOTO-PATTERNABLE DIELECTRIC MATERIALS CURABLE TO POROUS DIELECTRIC MATERIALS, FORMULATIONS, PRECURSORS AND METHODS OF USE THEREOF
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|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13742733
|
Filing Dt:
|
01/16/2013
|
Publication #:
|
|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
METHODS AND CIRCUITS FOR DISRUPTING INTEGRATED CIRCUIT FUNCTION
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|
Patent #:
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|
Issue Dt:
|
10/28/2014
|
Application #:
|
13742916
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Filing Dt:
|
01/16/2013
|
Publication #:
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|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
SEALED AIR GAP FOR SEMICONDUCTOR CHIP
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|
Patent #:
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|
Issue Dt:
|
06/23/2015
|
Application #:
|
13743642
|
Filing Dt:
|
01/17/2013
|
Publication #:
|
|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
DISASSEMBLABLE ELECTRONIC ASSEMBLY WITH LEAK-INHIBITING COOLANT CAPILLARIES
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|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13743810
|
Filing Dt:
|
01/17/2013
|
Publication #:
|
|
Pub Dt:
|
07/17/2014
| | | | |
Title:
|
DETERMINING OVERALL OPTIMAL YIELD POINT FOR A SEMICONDUCTOR WAFER
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|
Patent #:
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|
Issue Dt:
|
08/26/2014
|
Application #:
|
13744468
|
Filing Dt:
|
01/18/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
LOW ALPHA PARTICLE EMISSION ELECTRICALLY-CONDUCTIVE COATING
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|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13744606
|
Filing Dt:
|
01/18/2013
|
Title:
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FIN DESIGN LEVEL MASK DECOMPOSITION FOR DIRECTED SELF ASSEMBLY
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|
Patent #:
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|
Issue Dt:
|
05/10/2016
|
Application #:
|
13744756
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Filing Dt:
|
01/18/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
METAL LINES HAVING ETCH-BIAS INDEPENDENT HEIGHT
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|
Patent #:
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|
Issue Dt:
|
06/16/2015
|
Application #:
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13744761
|
Filing Dt:
|
01/18/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
MARCHAND BALUN STRUCTURE AND DESIGN METHOD
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|
|
Patent #:
|
NONE
|
Issue Dt:
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|
Application #:
|
13744845
|
Filing Dt:
|
01/18/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
REDUCING CONTACT RESISTANCE BY DIRECT SELF-ASSEMBLING
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|
|
Patent #:
|
|
Issue Dt:
|
10/22/2013
|
Application #:
|
13745221
|
Filing Dt:
|
01/18/2013
|
Publication #:
|
|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
HIGH ENERGY DENSITY STORAGE MATERIAL DEVICE USING NANOCHANNEL STRUCTURE
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|
|
Patent #:
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|
Issue Dt:
|
03/03/2015
|
Application #:
|
13745770
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Filing Dt:
|
01/19/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
Wire-Last Integration Method and Structure for III-V Nanowire Devices
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|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
13745963
|
Filing Dt:
|
01/21/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
RACETRACK MEMORY CELLS WITH A VERTICAL NANOWIRE STORAGE ELEMENT
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|
|
Patent #:
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|
Issue Dt:
|
06/16/2015
|
Application #:
|
13745965
|
Filing Dt:
|
01/21/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
LAND GRID ARRAY (LGA) SOCKET CARTRIDGE AND METHOD OF FORMING
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|
|
Patent #:
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|
Issue Dt:
|
02/23/2016
|
Application #:
|
13746359
|
Filing Dt:
|
01/22/2013
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
WAFER DEBONDING USING LONG-WAVELENGTH INFRARED RADIATION ABLATION
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|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
13746463
|
Filing Dt:
|
01/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
CROSS COMMUNICATION OF COMMON PROBLEM DETERMINATION AND RESOLUTION
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|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
13746627
|
Filing Dt:
|
01/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
COMPOSITE COPPER WIRE INTERCONNECT STRUCTURES AND METHODS OF FORMING
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13746940
|
Filing Dt:
|
01/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR FIELD-EFFECT TRANSISTOR WITH AN EPITAXIAL SOURCE AND DRAIN HAVING A LOW EXTERNAL RESISTANCE
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|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13747529
|
Filing Dt:
|
01/23/2013
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELL WITH SENSE AMPLIFIER
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|
|
Patent #:
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|
Issue Dt:
|
08/26/2014
|
Application #:
|
13747683
|
Filing Dt:
|
01/23/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
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FINFET DEVICE FORMATION
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|
|
Patent #:
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|
Issue Dt:
|
03/15/2016
|
Application #:
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13747798
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Filing Dt:
|
01/23/2013
|
Publication #:
|
|
Pub Dt:
|
05/23/2013
| | | | |
Title:
|
METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS
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|
|
Patent #:
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|
Issue Dt:
|
06/23/2015
|
Application #:
|
13747842
|
Filing Dt:
|
01/23/2013
|
Publication #:
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|
Pub Dt:
|
12/19/2013
| | | | |
Title:
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BAD WORDLINE/ARRAY DETECTION IN MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
02/25/2014
|
Application #:
|
13748038
|
Filing Dt:
|
01/23/2013
|
Publication #:
|
|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
HYDROGEN BARRIER LINER FOR FERRO-ELECTRIC RANDOM ACCESS MEMORY (FRAM) CHIP
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|
|
Patent #:
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|
Issue Dt:
|
02/16/2016
|
Application #:
|
13748048
|
Filing Dt:
|
01/23/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
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NOTCH FILTER STRUCTURE WITH OPEN STUBS IN SEMICONDUCTOR SUBSTRATE AND DESIGN STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
11/25/2014
|
Application #:
|
13748197
|
Filing Dt:
|
01/23/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
SELF-ALIGNED BIOSENSORS WITH ENHANCED SENSITIVITY
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|
Patent #:
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|
Issue Dt:
|
12/16/2014
|
Application #:
|
13748226
|
Filing Dt:
|
01/23/2013
|
Publication #:
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|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
TEMPERATURE CONTROL DEVICE FOR OPTOELECTRONIC DEVICES
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|
Patent #:
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|
Issue Dt:
|
06/16/2015
|
Application #:
|
13748662
|
Filing Dt:
|
01/24/2013
|
Publication #:
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|
Pub Dt:
|
05/30/2013
| | | | |
Title:
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STRUCTURE OF VERY HIGH INSERTION LOSS OF THE SUBSTRATE NOISE DECOUPLING
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|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13748821
|
Filing Dt:
|
01/24/2013
|
Publication #:
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|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
IN-SITU THERMOELECTRIC COOLING
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|
|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13748942
|
Filing Dt:
|
01/24/2013
|
Publication #:
|
|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
STRUCTURE AND METHOD TO FABRICATE A BODY CONTACT
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|
Patent #:
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|
Issue Dt:
|
09/30/2014
|
Application #:
|
13749146
|
Filing Dt:
|
01/24/2013
|
Publication #:
|
|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
METAL-INSULATOR-METAL CAPACITORS WITH HIGH CAPACITANCE DENSITY
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|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
13749222
|
Filing Dt:
|
01/24/2013
|
Publication #:
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|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
FIELD-EFFECT INTER-DIGITATED BACK CONTACT PHOTOVOLTAIC DEVICE
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|
Patent #:
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|
Issue Dt:
|
01/12/2016
|
Application #:
|
13749330
|
Filing Dt:
|
01/24/2013
|
Publication #:
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|
Pub Dt:
|
10/24/2013
| | | | |
Title:
|
LASER-INITIATED EXFOLIATION OF GROUP III-NITRIDE FILMS AND APPLICATIONS FOR LAYER TRANSFER AND PATTERNING
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|
|
Patent #:
|
|
Issue Dt:
|
11/25/2014
|
Application #:
|
13749744
|
Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
06/06/2013
| | | | |
Title:
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CHIP IDENTIFICATION FOR ORGANIC LAMINATE PACKAGING AND METHODS OF MANUFACTURE
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|
Patent #:
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|
Issue Dt:
|
09/16/2014
|
Application #:
|
13749745
|
Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
CHIP IDENTIFICATION FOR ORGANIC LAMINATE PACKAGING AND METHODS OF MANUFACTURE
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|
|
Patent #:
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|
Issue Dt:
|
08/09/2016
|
Application #:
|
13749830
|
Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING SUBSTRATE CONTACT AND RELATED METHOD
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|
Patent #:
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|
Issue Dt:
|
09/16/2014
|
Application #:
|
13749851
|
Filing Dt:
|
01/25/2013
|
Publication #:
|
|
Pub Dt:
|
12/05/2013
| | | | |
Title:
|
POWER/PERFORMANCE OPTIMIZATION THROUGH TEMPERATURE/VOLTAGE CONTROL
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|
Patent #:
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|
Issue Dt:
|
09/16/2014
|
Application #:
|
13749925
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Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
POWER/PERFORMANCE OPTIMIZATION THROUGH CONTINUOUSLY VARIABLE TEMPERATURE-BASED VOLTAGE CONTROL
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|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13750497
|
Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
CIRCUIT AND METHOD FOR EFFICIENT MEMORY REPAIR
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|
|
Patent #:
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|
Issue Dt:
|
12/01/2015
|
Application #:
|
13750751
|
Filing Dt:
|
01/25/2013
|
Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
INTERPOLATION TECHNIQUES USED FOR TIME ALIGNMENT OF MULTIPLE SIMULATION MODELS
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|
Patent #:
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|
Issue Dt:
|
11/18/2014
|
Application #:
|
13751238
|
Filing Dt:
|
01/28/2013
|
Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
METHOD OF FORMING ELECTRONIC FUSE LINE WITH MODIFIED CAP
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|
Patent #:
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|
Issue Dt:
|
12/30/2014
|
Application #:
|
13751361
|
Filing Dt:
|
01/28/2013
|
Publication #:
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|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
STRESSED CHANNEL FET WITH SOURCE/DRAIN BUFFERS
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|
Patent #:
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|
Issue Dt:
|
06/23/2015
|
Application #:
|
13751490
|
Filing Dt:
|
01/28/2013
|
Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
Nanowire Capacitor for Bidirectional Operation
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13751778
|
Filing Dt:
|
01/28/2013
|
Publication #:
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|
Pub Dt:
|
05/30/2013
| | | | |
Title:
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STRESSED TRANSISTOR WITH IMPROVED METASTABILITY
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|
Patent #:
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|
Issue Dt:
|
06/16/2015
|
Application #:
|
13751799
|
Filing Dt:
|
01/28/2013
|
Publication #:
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|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
SELECTIVE GALLIUM NITRIDE REGROWTH ON (100) SILICON
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13752388
|
Filing Dt:
|
01/29/2013
|
Publication #:
|
|
Pub Dt:
|
05/30/2013
| | | | |
Title:
|
CMOS TRANSISTORS HAVING DIFFERENTIALLY STRESSED SPACERS
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|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13752567
|
Filing Dt:
|
01/29/2013
|
Publication #:
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|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
STRUCTURE AND METHOD FOR REPLACEMENT GATE MOSFET WITH SELF-ALIGNED CONTACT USING SACRIFICIAL MANDREL DIELECTRIC
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|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
13752737
|
Filing Dt:
|
01/29/2013
|
Publication #:
|
|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
ORGANIC MODULE EMI SHIELDING STRUCTURES AND METHODS
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|
|
Patent #:
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|
Issue Dt:
|
09/03/2013
|
Application #:
|
13752934
|
Filing Dt:
|
01/29/2013
|
Title:
|
AUTOMATED SYNTHESIS OF HIGH-PERFORMANCE TWO OPERAND BINARY PARALLEL PREFIX ADDER
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|
|
Patent #:
|
|
Issue Dt:
|
04/05/2016
|
Application #:
|
13752948
|
Filing Dt:
|
01/29/2013
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
EFFICIENT DATA EXTRACTION BY A REMOTE APPLICATION
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13753989
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Filing Dt:
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01/30/2013
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Publication #:
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Pub Dt:
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07/31/2014
| | | | |
Title:
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PROCESS VARIATION SKEW IN AN SRAM COLUMN ARCHITECTURE
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Patent #:
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Issue Dt:
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04/07/2015
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Application #:
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13755030
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Filing Dt:
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01/31/2013
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Publication #:
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Pub Dt:
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07/31/2014
| | | | |
Title:
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ELECTRONIC FUSE HAVING AN INSULATION LAYER
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13755192
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Filing Dt:
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01/31/2013
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Publication #:
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Pub Dt:
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06/06/2013
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Title:
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BIPOLAR JUNCTION TRANSISTOR WITH A SELF-ALIGNED EMITTER AND BASE
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Patent #:
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Issue Dt:
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09/29/2015
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Application #:
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13755726
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Filing Dt:
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01/31/2013
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Publication #:
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Pub Dt:
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06/19/2014
| | | | |
Title:
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ANALYSIS OF CHIP-MEAN VARIATION AND INDEPENDENT INTRA-DIE VARIATION FOR CHIP YIELD DETERMINATION
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Patent #:
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Issue Dt:
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07/01/2014
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Application #:
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13756638
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Filing Dt:
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02/01/2013
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Publication #:
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Pub Dt:
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06/06/2013
| | | | |
Title:
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TEST STRUCTURE FOR DETECTION OF GAP IN CONDUCTIVE LAYER OF MULTILAYER GATE STACK
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Patent #:
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Issue Dt:
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03/25/2014
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Application #:
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13756981
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Filing Dt:
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02/01/2013
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Publication #:
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Pub Dt:
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06/06/2013
| | | | |
Title:
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METAL-CONTAMINATION-FREE THROUGH-SUBSTRATE VIA STRUCTURE
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Patent #:
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Issue Dt:
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09/17/2013
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Application #:
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13757040
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Filing Dt:
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02/01/2013
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Publication #:
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Pub Dt:
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06/06/2013
| | | | |
Title:
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PARALLEL OPTICAL TRANSCEIVER MODULE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13757932
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Filing Dt:
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02/04/2013
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
Title:
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METHODOLOGY FOR FABRICATING ISOTROPICALLY RECESSED DRAIN REGIONS OF CMOS TRANSISTORS
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Patent #:
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Issue Dt:
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02/17/2015
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Application #:
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13757961
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Filing Dt:
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02/04/2013
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Publication #:
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Pub Dt:
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08/07/2014
| | | | |
Title:
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TRENCH ISOLATION FOR BIPOLAR JUNCTION TRANSISTORS IN BICMOS TECHNOLOGY
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Patent #:
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Issue Dt:
|
05/06/2014
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Application #:
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13758204
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Filing Dt:
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02/04/2013
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
Title:
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BIPOLAR JUNCTION TRANSISTORS WITH A LINK REGION CONNECTING THE INTRINSIC AND EXTRINSIC BASES
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|
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Patent #:
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NONE
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Issue Dt:
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Application #:
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13758382
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Filing Dt:
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02/04/2013
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Publication #:
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Pub Dt:
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06/06/2013
| | | | |
Title:
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HIGH DENSITY SIX TRANSISTOR FINFET SRAM CELL LAYOUT
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|
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Patent #:
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Issue Dt:
|
07/15/2014
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Application #:
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13758386
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Filing Dt:
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02/04/2013
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Publication #:
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Pub Dt:
|
06/06/2013
| | | | |
Title:
|
SOLDER BUMP CONNECTIONS
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|
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Patent #:
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|
Issue Dt:
|
11/04/2014
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Application #:
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13759102
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Filing Dt:
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02/05/2013
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Publication #:
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Pub Dt:
|
06/13/2013
| | | | |
Title:
|
METHOD FOR COMPENSATING FOR VARIATIONS IN STRUCTURES OF AN INTEGRATED CIRCUIT
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|
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Patent #:
|
|
Issue Dt:
|
08/20/2013
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Application #:
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13759146
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Filing Dt:
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02/05/2013
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Publication #:
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Pub Dt:
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06/13/2013
| | | | |
Title:
|
METHOD AND STRUCTURE FOR DIFFERENTIAL SILICIDE AND RECESSED OR RAISED SOURCE/DRAIN TO IMPROVE FIELD EFFECT TRANSISTOR
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|
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Patent #:
|
|
Issue Dt:
|
02/03/2015
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Application #:
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13759209
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Filing Dt:
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02/05/2013
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Publication #:
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Pub Dt:
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08/07/2014
| | | | |
Title:
|
INTEGRATED CIRCUITS HAVING REPLACEMENT GATE STRUCTURES AND METHODS FOR FABRICATING THE SAME
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|
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Patent #:
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|
Issue Dt:
|
06/09/2015
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Application #:
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13759311
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Filing Dt:
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02/05/2013
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Publication #:
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|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
Wide Bandwidth Resonant Global Clock Distribution
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
13759429
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Filing Dt:
|
02/05/2013
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Publication #:
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Pub Dt:
|
06/06/2013
| | | | |
Title:
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STRUCTURE AND METHOD FOR REDUCTION OF VT-W EFFECT IN HIGH-K METAL GATE DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
11/26/2013
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Application #:
|
13759636
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Filing Dt:
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02/05/2013
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Publication #:
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Pub Dt:
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08/29/2013
| | | | |
Title:
|
GATE-ALL AROUND SEMICONDUCTOR NANOWIRE FETS ON BULK SEMICONDUCTOR WAFERS
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|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
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Application #:
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13759641
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Filing Dt:
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02/05/2013
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Publication #:
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Pub Dt:
|
08/29/2013
| | | | |
Title:
|
PAD-LESS GATE-ALL AROUND SEMICONDUCTOR NANOWIRE FETS ON BULK SEMICONDUCTOR WAFERS
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|
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Patent #:
|
|
Issue Dt:
|
11/04/2014
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Application #:
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13759649
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Filing Dt:
|
02/05/2013
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Publication #:
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Pub Dt:
|
07/25/2013
| | | | |
Title:
|
IMAGER MICROLENS STRUCTURE HAVING INTERFACIAL REGION FOR ADHESION OF PROTECTIVE LAYER
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|
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Patent #:
|
|
Issue Dt:
|
04/22/2014
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Application #:
|
13759697
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Filing Dt:
|
02/05/2013
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Title:
|
VARIABLE RESISTANCE SWITCH FOR WIDE BANDWIDTH RESONANT GLOBAL CLOCK DISTRIBUTION
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|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
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Application #:
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13760190
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Filing Dt:
|
02/06/2013
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Publication #:
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|
Pub Dt:
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06/13/2013
| | | | |
Title:
|
DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY USING BODY BIAS TO CLEAR DATA AT POWER-UP
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
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Application #:
|
13760277
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Filing Dt:
|
02/06/2013
|
Publication #:
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|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
PLANAR SEMICONDUCTOR GROWTH ON III-V MATERIAL
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|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
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Application #:
|
13760373
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Filing Dt:
|
02/06/2013
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Publication #:
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|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
SUPERFILLED METAL CONTACT VIAS FOR SEMICONDUCTOR DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
02/04/2014
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Application #:
|
13760391
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Filing Dt:
|
02/06/2013
|
Publication #:
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|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
CORROSION SENSORS
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|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
13760488
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Filing Dt:
|
02/06/2013
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
ELECTRONIC FUSE HAVING A DAMAGED REGION
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|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
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Application #:
|
13761358
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Filing Dt:
|
02/07/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
HIGH FREQUENCY QUADRATURE PLL CIRCUIT AND METHOD
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|
|
Patent #:
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|
Issue Dt:
|
11/17/2015
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Application #:
|
13761430
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Filing Dt:
|
02/07/2013
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Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
DIODE STRUCTURE AND METHOD FOR FINFET TECHNOLOGIES
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|
|
Patent #:
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|
Issue Dt:
|
01/06/2015
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Application #:
|
13761453
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Filing Dt:
|
02/07/2013
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Publication #:
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Pub Dt:
|
08/07/2014
| | | | |
Title:
|
Diode Structure and Method for Gate All Around Silicon Nanowire Technologies
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Patent #:
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|
Issue Dt:
|
04/14/2015
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Application #:
|
13761476
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Filing Dt:
|
02/07/2013
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Publication #:
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Pub Dt:
|
08/07/2014
| | | | |
Title:
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DIODE STRUCTURE AND METHOD FOR WIRE-LAST NANOMESH TECHNOLOGIES
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Patent #:
|
|
Issue Dt:
|
12/01/2015
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Application #:
|
13762216
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Filing Dt:
|
02/07/2013
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Publication #:
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Pub Dt:
|
10/24/2013
| | | | |
Title:
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COMBINED SOFT DETECTION/SOFT DECODING IN TAPE DRIVE STORAGE CHANNELS
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|
Patent #:
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Issue Dt:
|
03/18/2014
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Application #:
|
13762445
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Filing Dt:
|
02/08/2013
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Publication #:
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Pub Dt:
|
06/13/2013
| | | | |
Title:
|
TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE TRANSISTOR
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Patent #:
|
|
Issue Dt:
|
01/26/2016
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Application #:
|
13762450
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Filing Dt:
|
02/08/2013
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Publication #:
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Pub Dt:
|
08/14/2014
| | | | |
Title:
|
LATERAL EXTENDED DRAIN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LEDMOSFET) WITH TAPERED AIRGAP FIELD PLATES
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|
Patent #:
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|
Issue Dt:
|
02/03/2015
|
Application #:
|
13762980
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Filing Dt:
|
02/08/2013
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Publication #:
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|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
FIELD EFFECT TRANSISTORS (FETS) AND METHODS OF MANUFACTURE
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|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
13763136
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Filing Dt:
|
02/08/2013
|
Publication #:
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Pub Dt:
|
06/20/2013
| | | | |
Title:
|
METHOD, STRUCTURE, AND DESIGN STRUCTURE FOR A THROUGH-SILICON-VIA WILKINSON POWER DIVIDER
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Patent #:
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Issue Dt:
|
06/17/2014
|
Application #:
|
13763312
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Filing Dt:
|
02/08/2013
|
Publication #:
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Pub Dt:
|
08/15/2013
| | | | |
Title:
|
FEED-FORWARD EQUALIZER ARCHITECTURES
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|
Patent #:
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|
Issue Dt:
|
02/24/2015
|
Application #:
|
13763659
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Filing Dt:
|
02/09/2013
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Publication #:
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|
Pub Dt:
|
08/15/2013
| | | | |
Title:
|
TIME DOMAIN ANALOG MULTIPLICATION TECHNIQUES FOR ADJUSTING TAP WEIGHTS OF FEED-FORWARD EQUALIZERS
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|
Patent #:
|
|
Issue Dt:
|
09/16/2014
|
Application #:
|
13764169
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Filing Dt:
|
02/11/2013
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Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
NANOWIRE STRESS SENSORS AND STRESS SENSOR INTEGRATED CIRCUITS, DESIGN STRUCTURES FOR A STRESS SENSOR INTEGRATED CIRCUIT, AND RELATED METHODS
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|
Patent #:
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Issue Dt:
|
06/16/2015
|
Application #:
|
13764355
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Filing Dt:
|
02/11/2013
|
Publication #:
|
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Pub Dt:
|
07/04/2013
| | | | |
Title:
|
METHODS OF FABRICATING TRENCH GENERATED DEVICE STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
04/14/2015
|
Application #:
|
13764860
|
Filing Dt:
|
02/12/2013
|
Publication #:
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Pub Dt:
|
04/24/2014
| | | | |
Title:
|
SRAM GLOBAL PRECHARGE, DISCHARGE, AND SENSE
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|
|
Patent #:
|
|
Issue Dt:
|
07/05/2016
|
Application #:
|
13765105
|
Filing Dt:
|
02/12/2013
|
Publication #:
|
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Pub Dt:
|
06/13/2013
| | | | |
Title:
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DEEP TRENCH DECOUPLING CAPACITOR AND METHODS OF FORMING
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|
Patent #:
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|
Issue Dt:
|
05/27/2014
|
Application #:
|
13765304
|
Filing Dt:
|
02/12/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
METHOD AND SYSTEM FOR COMPUTING FOURIER SERIES COEFFICIENTS FOR MASK LAYOUTS USING FFT
|
|