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04/17/2001
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09458877
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12/10/1999
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Title:
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CONDUCTIVE LINE FEATURES FOR ENHANCED RELIABILITY OF MULTI-LAYER CERAMIC SUBSTRATES
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07/10/2001
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09459167
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12/10/1999
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Title:
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SUB-QUARTER-MICRON COPPER INTERCONNECTIONS WITH IMPROVED ELECTROMIGRATION RESISTANCE AND REDUCED DEFECT SENSITIVITY
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03/12/2002
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09459552
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12/13/1999
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LAND GRID ARRAY ALIGNMENT AND ENGAGEMENT DESIGN
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07/16/2002
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09460700
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12/14/1999
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Title:
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METHOD FOR REMOVAL OF HARD MASK USED TO DEFINE NOBLE METAL ELECTRODE
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04/22/2003
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09460843
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12/14/1999
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SYSTEM AND METHOD FOR RECOVERING FROM DESIGN ERRORS IN INTEGRATED CIRCUITS
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09/25/2001
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09461365
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12/15/1999
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REFRACTIVE OPTICAL SYSTEM THAT CONVERTS A LASER BEAM TO A COLLIMATED FLAT-TOP BEAM
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04/17/2001
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09461557
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12/14/1999
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COMPOSITION FOR INCREASING ACTIVITY OF A NO-CLEAN FLUX
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03/05/2002
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09464510
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12/15/1999
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Title:
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METHOD FOR MAKING PUNCHES USING MULTI-LAYER CERAMIC TECHNOLOGY
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01/07/2003
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09464925
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12/16/1999
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02/07/2002
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ELECTRICAL TEST TOOL HAVING EASILY REPLACEABLE ELECTRICAL PROBE
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09/24/2002
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09465609
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12/17/1999
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Title:
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METHOD FOR MAKING A MEMORY CARD ADAPTER INSERTABLE INTO A MOTHERBOARD MEMORY CARD SOCKET COMPRISING A MEMORY CARD RECEIVING SOCKET HAVING THE SAME CONFIGURATION AS THE MOTHERBOARD MEMORY CARD SOCKET
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05/14/2002
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09466495
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12/17/1999
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ELECTRICALLY PROGRAMMABLE ANTIFUSES AND METHODS FOR FORMING THE SAME
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01/22/2002
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09466605
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12/17/1999
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METHOD OF FORMING A TRENCH CAPACITOR DRAM CELL
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01/01/2002
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09466607
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12/17/1999
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BASEPLATE FOR CHIP BURN-IN AND/OF TESTING, AND METHOD THEREOF
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NONE
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09467207
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12/20/1999
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06/20/2002
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Title:
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DUAL DAMASCENE INTERCONNECT STRUCTURE USING LOW STRESS FLOUROSILICATE INSULATOR WITH COPPER CONDUCTORS
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01/27/2004
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09467537
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12/20/1999
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SEMICONDUCTOR DEVICE HAVING AN ELECTRICALLY MODULATED CONDUCTION CHANNEL
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10/09/2001
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09470408
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12/22/1999
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Title:
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METHOD AND APPARATUS FOR DERIVATIVE CONTROLLED PHASE LOCKED LOOP SYSTEMS
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05/04/2004
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09471679
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12/23/1999
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NON-PLANAR SURFACE FOR SEMICONDUCTOR CHIPS
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02/11/2003
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09471680
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12/23/1999
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COPPER PLATED INVAR WITH ACID PRECLEAN
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10/08/2002
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09472136
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12/23/1999
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Title:
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NOVEL DECOUPLING CAPACITOR METHOD AND STRUCTURE USING METAL BASED CARRIER
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Patent #:
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06/26/2001
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09473635
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12/28/1999
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Title:
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METHOD OF DESIGNING AND STRUCTURE FOR VISUAL AND ELECTRICAL TEST OF SEMICONDUCTOR DEVICES
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01/28/2003
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09473908
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12/28/1999
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SEMICONDUCTOR INTEGRATED CIRCUITS
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08/07/2001
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09473909
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12/28/1999
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Title:
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ELECTROPLATING APPARATUS AND METHOD USING A COMPRESSIBLE CONTACT
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12/18/2001
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09474912
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12/28/1999
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Title:
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CONDUCTIVE ADHESIVE HAVING A PALLADIUM MATRIX INTERFACE BETWEEN TWO METAL SURFACES
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01/15/2002
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09475712
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12/30/1999
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Title:
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METHOD OF ANNEALING COPPER METALLURGY
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12/31/2002
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09476275
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01/03/2000
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Title:
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METHOD FOR PATTERNING SENSITIVE ORGANIC THIN FILMS
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01/01/2002
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09477294
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01/04/2000
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Title:
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CABLE SCREEN CONNECTION METHOD AND CABLE GROMMET
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09/28/2004
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09479109
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01/07/2000
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GUIDES LITHOGRAPHICALLY FABRICATED ON SEMICONDUCTOR DEVICES
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Patent #:
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06/26/2001
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09480033
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01/10/2000
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Title:
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PROCESS FOR FORMING A SILICON-GERMANIUM BASE OF A HETEROJUNCTION BIPOLAR TRANSISTOR
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Issue Dt:
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11/13/2001
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09480442
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Filing Dt:
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01/10/2000
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Title:
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TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATIONS THEREOF
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Issue Dt:
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07/09/2002
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09482547
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01/13/2000
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Title:
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FLAT INTERFACE FOR A METAL-SILICON CONTACT BARRIER FILM
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Issue Dt:
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02/27/2001
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09484783
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01/18/2000
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Title:
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SNAP TOGETHER PCMCIA CARDS WITH LASER TACK WELDED SEAMS
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Patent #:
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Issue Dt:
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10/23/2001
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09487747
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01/19/2000
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Title:
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METHOD OF FABRICATING AN ELECTRONIC PACKAGE WITH INTERCONNECTED CHIPS
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02/18/2003
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09489277
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01/21/2000
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Title:
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DEUTERIUM RESERVOIRS AND INGRESS PATHS
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Issue Dt:
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07/17/2001
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Application #:
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09494415
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01/31/2000
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Title:
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Process for building borderless bitline, wordline and DRAM structure
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Patent #:
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Issue Dt:
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09/24/2002
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09495876
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02/02/2000
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Title:
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GEOMETRIC PHASE ANALYSIS FOR OVERLAY MEASUREMENT
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05/07/2002
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09499577
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02/07/2000
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CAPACITOR AND METHOD FOR FORMING SAME
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08/06/2002
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09499621
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02/07/2000
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LAYERED ORGANIC-INORGANIC PEROVSKITES HAVING METAL-DEFICIENT INORGANIC FRAMEWORKS
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01/15/2002
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09501226
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02/10/2000
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Title:
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METHOD UTILIZING CMP TO FABRICATE DOUBLE GATE MOSFETS WITH CONDUCTIVE SIDEWALL CONTACTS
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05/08/2001
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09501393
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02/09/2000
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Title:
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Write through function for a memory
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07/17/2001
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09501649
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02/10/2000
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Title:
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Crackstop and oxygen barrier for low-K dielectric integrated circuits
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06/12/2001
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09501920
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02/10/2000
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Title:
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METHOD FOR MAKING SEMICONDUCTOR DEVICES HAVING BACKSIDE PROBING CAPABILITY
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08/31/2004
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09502729
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02/11/2000
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DIFFUSION BARRIER LAYER AND SEMICONDUCTOR DEVICE CONTAINING SAME
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12/05/2000
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09504031
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02/14/2000
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Method for repair of photomasks
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Issue Dt:
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11/19/2002
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09507522
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02/18/2000
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Title:
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Hydroxycarborane photoresists and process for using same in bilayer thin film imaging lithography
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01/22/2002
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09507996
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02/22/2000
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Apparatus for polarization conversion
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05/27/2003
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09508890
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06/19/2000
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Title:
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OPTICAL LITHOGRAPHY BEYOND CONVENTIONAL RESOLUTION LIMITS
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05/15/2001
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09510326
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02/22/2000
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Field programmable memory array
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12/04/2001
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09511165
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02/24/2000
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Title:
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Simultaneous multiple silicon on insulator (SOI) wafer production
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12/23/2008
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09512400
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02/24/2000
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ELECTRICALLY CONDUCTING ADHESIVES FOR VIA FILL APPLICATIONS
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09/11/2001
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09514106
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02/28/2000
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Thermal conductivity enhanced semiconductor structures and fabrication processes
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09/03/2002
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09514212
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02/28/2000
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Title:
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HIGH SILICON CONTENT MONOMERS AND POLYMERS SUITABLE FOR 193 NM BILAYER RESISTS
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08/13/2002
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09514396
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02/28/2000
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Title:
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METHOD FOR IMPROVED PASSIVE THERMAL FLOW IN SILICON ON INSULATOR DEVICES
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Patent #:
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07/16/2002
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09514511
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02/28/2000
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METHOD FOR CONTROLLING EXTRUSIONS IN ALUMINUM METAL LINES AND THE DEVICE FORMED THEREFROM
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11/27/2001
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09515033
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03/06/2000
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Title:
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Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging
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10/05/2004
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09516615
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03/01/2000
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METHOD OF FABRICATING A POLYSILICON CAPACITOR UTILIZING FET AND BIPOLAR BASE POLYSILICON LAYERS
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10/16/2001
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09516904
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03/01/2000
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Connecting devices and method for interconnceting circuit components
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12/18/2001
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09519897
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03/06/2000
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Title:
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Method and structure for reduction of contact resistance of metal silicides using a metal-germanium alloy
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02/25/2003
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09521351
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03/09/2000
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POLYCYCLIC POLYMERS CONTAINING PENDANT CYCLIC ANTHYDRIDE GROUPS
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10/31/2000
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09521481
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03/09/2000
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Title:
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Vibrational methods of deaggregation of electrically conductive polymers and precursors thereof
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04/02/2002
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09522883
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03/10/2000
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SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD
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08/28/2001
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09524661
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03/13/2000
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Multi-ported memory with asynchronous and synchronous protocol
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01/20/2004
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09525088
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03/14/2000
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Pub Dt:
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08/22/2002
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Title:
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METHOD AND STRUCTURE OF A PRECISION MIM FUSIBLE CIRCUIT ELEMENTS USING FUSES AND ANTIFUSES
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11/05/2002
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09525103
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03/14/2000
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METHODS FOR FORMING DECOUPLING CAPACITORS
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08/27/2002
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09525363
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03/15/2000
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SOI CIRCUIT DESIGN METHOD
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05/20/2003
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09525472
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03/15/2000
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METHOD OF FORMING FEATURES ON A CERAMIC SUBSTRATE USING PLATIBLE PASTES
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03/05/2002
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09525973
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03/15/2000
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METHOD OF FORMING MERGED SELF-ALIGNED SOURCE AND ONO CAPACITOR FOR SPLIT GATE NON-VOLATILE MEMORY
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04/01/2003
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09526198
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03/15/2000
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MACRO DESIGN TECHNIQUES TO ACCOMMODATE CHIP LEVEL WIRING AND CIRCUIT PLACEMENT ACROSS THE MACRO
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07/30/2002
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09526354
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03/16/2000
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BURIED METAL DUAL DAMASCENE PLATE CAPACITOR
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10/23/2001
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09526569
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03/16/2000
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Title:
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Method of forming a flip chip assembly, and a flip chip assembly formed bt the method
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10/16/2001
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09526856
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03/16/2000
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Title:
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Hierarchy and domain-balancing method and Algorithm for Serif Mask design in Microlithography
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11/19/2002
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09526857
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03/16/2000
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DOUBLE PLANAR GATED SOI MOSFET STRUCTURE
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02/11/2003
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09527501
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03/16/2000
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NON-BLOCKING DRAIN METHOD AND APPARATUS FOR USE IN PROCESSING REQUESTS ON A RESOURCE
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12/04/2001
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09528326
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03/20/2000
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Title:
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DEVICE FOR PATTERNING A SUBSTRATE WITH PATTERNING CAVITIES
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08/20/2002
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09528350
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03/17/2000
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SOI PASS GATE LEAKAGE MONITOR
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04/24/2001
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09531628
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03/21/2000
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Buried Oxide Layer In Silicon
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04/09/2002
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09531715
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03/21/2000
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Title:
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Intentional asymmetry imposed during fabrication and/or accessof magnetic tunnel junction devices
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12/18/2001
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09532128
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03/21/2000
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Title:
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Soi voltage dependent negative-saturation-resistance resistor ballasting element for esd protection of receivers and driver circuitry
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09532811
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Filing Dt:
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03/21/2000
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Title:
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Processes for reduced topography capacitors
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09533196
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Filing Dt:
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03/23/2000
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Title:
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Polymer with transient liquid phase bondable particles
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09533402
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Filing Dt:
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03/22/2000
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Title:
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ELECTRONIC PACKAGE AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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01/23/2001
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Application #:
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09534423
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Filing Dt:
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03/23/2000
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Title:
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Memory and system configuration for programming a redundancy address in an electric system
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09536503
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Filing Dt:
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03/27/2000
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Title:
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SELF-ALIGNED DYNAMIC THRESHOLD CMOS DEVICE
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09537206
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Filing Dt:
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03/29/2000
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Title:
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WAFER EDGE CLEANING UTILIZING POLISH PAD MATERIAL
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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09537498
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Filing Dt:
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03/29/2000
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Title:
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WORD LINE DRIVER FOR DYNAMIC RANDOM ACCESS MEMORIES
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09537959
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Filing Dt:
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03/28/2000
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Title:
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STRUCTURE FOR PREVENTING ADHESIVE BLEED ONTO SURFACES
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Patent #:
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Issue Dt:
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11/29/2005
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Application #:
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09539020
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Filing Dt:
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03/30/2000
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Title:
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REMOTE IP SIMULATION MODELING
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Patent #:
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Issue Dt:
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01/15/2002
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Application #:
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09539897
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Filing Dt:
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03/31/2000
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Title:
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System and method for the distribution of automotive services
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09540412
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Filing Dt:
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03/31/2000
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Title:
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METHOD OF MAKING A PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09541018
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Filing Dt:
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03/31/2000
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Title:
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Method for electroplating a film onto a substrate
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09541196
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Filing Dt:
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04/03/2000
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Title:
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Two-supply protection circuit
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09542025
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Filing Dt:
|
04/03/2000
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Title:
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METHODS AND ARRANGEMENTS FOR AUTOMATIC SYNTHESIS OF SYSTEMS-ON-CHIP
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09542442
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Filing Dt:
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04/04/2000
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Title:
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TWO MOMENT RC DELAY METRIC FOR PERFORMANCE OPTIMIZATION
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09547335
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Filing Dt:
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04/11/2000
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Title:
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STORAGE-CAPACITOR ELECTRODE AND INTERCONNECT
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09547893
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Filing Dt:
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04/12/2000
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Title:
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SILICON ON INSULATOR FIELD EFFECT TRANSISTOR HAVING SHARED BODY CONTACT
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09549911
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Filing Dt:
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04/14/2000
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Title:
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Structural support for direct lid attach
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09551168
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Filing Dt:
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04/17/2000
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Publication #:
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Pub Dt:
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07/11/2002
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Title:
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A POLY-POLY/MOS CAPACITOR HAVING A GATE ENCAPSULATING FIRST ELECTRODE LAYER
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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09552410
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Filing Dt:
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04/19/2000
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Title:
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STABILITY TEST FOR SILICON ON INSULATOR SRAM MEMORY CELLS UTILIZING BITLINE PRECHARGE STRESS OPERATIONS TO STRESS MEMORY CELLS UNDER TEST
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09553581
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Filing Dt:
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04/20/2000
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Title:
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COPPER STUD STRUCTURE WITH REFRACTORY METAL LINER
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Patent #:
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Issue Dt:
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05/25/2004
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Application #:
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09553715
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Filing Dt:
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04/20/2000
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Title:
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PRINTED CIRCUIT BOARD WITH EMBEDDED DECOUPLING CAPACITANCE AND METHOD FOR PRODUCING SAME
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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09553997
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Filing Dt:
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04/20/2000
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Title:
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PRECURSOR SOURCE MIXTURES
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