|
|
Patent #:
|
|
Issue Dt:
|
07/19/2011
|
Application #:
|
12871700
|
Filing Dt:
|
08/30/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
SYSTEMS AND DEVICES INCLUDING MULTI-GATE TRANSISTORS AND METHODS OF USING, MAKING, AND OPERATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12871755
|
Filing Dt:
|
08/30/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
MODIFIED READ OPERATION FOR NON-VOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/27/2011
|
Application #:
|
12871838
|
Filing Dt:
|
08/30/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
METHODS OF FORMING DISPERSIONS OF NANOPARTICLES, AND METHODS OF FORMING FLASH MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
12872092
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES WITH IMPROVED CONTACTS AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
12872137
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES WITH LOW CONTACT RESISTANCE AND METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
12872219
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES WITH CURRENT ROUTING AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
12872368
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
MEMORY CELL STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12872564
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
METHODS OF REMOVING A METAL NITRIDE MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/14/2013
|
Application #:
|
12872587
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
MEMORY DEVICES AND METHODS OF OPERATING MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2015
|
Application #:
|
12872608
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
METHODS OF SELECTIVELY FORMING A MATERIAL USING PARYLENE COATING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
12872638
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
BUFFER DIE IN STACKS OF MEMORY DIES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
12872705
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
METHODS OF FORMING PLURALITIES OF VERTICAL TRANSISTORS, AND METHODS OF FORMING MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12872732
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
OPTICAL COMPENSATION DEVICES, SYSTEMS, AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/28/2012
|
Application #:
|
12872803
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
NAND MEMORY CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
12872814
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
TRANSISTORS HAVING A CONTROL GATE AND ONE OR MORE CONDUCTIVE STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
12872854
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
CURRENT GENERATOR CIRCUIT AND METHOD FOR REDUCED POWER CONSUMPTION AND FAST RESPONSE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12872864
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES WITH POINT CONTACTS AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/25/2013
|
Application #:
|
12872913
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
CHANNEL SKEWING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2013
|
Application #:
|
12872945
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
PHASE CHANGE MEMORY STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/09/2013
|
Application #:
|
12872969
|
Filing Dt:
|
08/31/2010
|
Publication #:
|
|
Pub Dt:
|
03/01/2012
| | | | |
Title:
|
STRIPE-BASED NON-VOLATILE MULTILEVEL MEMORY OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2012
|
Application #:
|
12873335
|
Filing Dt:
|
09/01/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
PHASE CHANGE MEMORY ELEMENTS USING ENERGY CONVERSION LAYERS, MEMORY ARRAYS AND SYSTEMS INCLUDING SAME, AND METHODS OF MAKING AND USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
12874076
|
Filing Dt:
|
09/01/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
SURFACE DEPRESSIONS FOR DIE-TO-DIE INTERCONNECTS AND ASSOCIATED SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2017
|
Application #:
|
12874360
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
SOLID STATE LIGHTING DIES WITH QUANTUM EMITTERS AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2016
|
Application #:
|
12874396
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
BACK-TO-BACK SOLID STATE LIGHTING DEVICES AND ASSOCIATED METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2014
|
Application #:
|
12874644
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
METHODS FOR WAFER-LEVEL PACKAGING OF MICROFEATURE DEVICES AND MICROFEATURE DEVICES FORMED USING SUCH METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2013
|
Application #:
|
12874781
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
METHODS OF FORMING FEATURES OF INTEGRATED CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
12874811
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
METHOD, APPARATUS AND SYSTEM FOR DYNAMIC RANGE ESTIMATION OF IMAGED SCENES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
12874938
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
03/08/2012
| | | | |
Title:
|
MEMORIES AND METHODS FOR SHARING A SIGNAL NODE FOR THE RECEIPT AND PROVISION OF NON-DATA SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12875007
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
DIODES, AND METHODS OF FORMING DIODES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12875028
|
Filing Dt:
|
09/02/2010
|
Publication #:
|
|
Pub Dt:
|
12/23/2010
| | | | |
Title:
|
PACKAGED IC DEVICE COMPRISING AN EMBEDDED FLEX CIRCUIT ON LEADFRAME, AND METHODS OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
12875303
|
Filing Dt:
|
09/03/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
CONCENTRIC OR NESTED CONTAINER CAPACITOR STRUCTURE FOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
12875721
|
Filing Dt:
|
09/03/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
LATENCY COUNTER, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
12875828
|
Filing Dt:
|
09/03/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS OD MEMORY DEVICES WITH DIFFERENT SIZES OF GATELINE TRENCHES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2012
|
Application #:
|
12875958
|
Filing Dt:
|
09/03/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING SUCH DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2012
|
Application #:
|
12876703
|
Filing Dt:
|
09/07/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
LATENCY COUNTER, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2012
|
Application #:
|
12877044
|
Filing Dt:
|
09/07/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
TECHNIQUES FOR SENSING A SEMICONDUCTOR MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2012
|
Application #:
|
12877827
|
Filing Dt:
|
09/08/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE COMPRISING TRANSISTOR STRUCTURES AND METHODS FOR FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
12877874
|
Filing Dt:
|
09/08/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
METHODS AND APPARATUS FOR SORTING AND/OR DEPOSITING NANOTUBES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12878391
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
ERROR DETECTION, DOCUMENTATION, AND CORRECTION IN A FLASH MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
12878569
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
METHOD AND SYSTEM FOR LITHOGRAPHIC SIMULATION AND VERIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
12878815
|
Filing Dt:
|
09/09/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
EPITAXIAL FORMATION STRUCTURES AND ASSOCIATED METHODS OF MANUFACTURING SOLID STATE LIGHTING DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/31/2011
|
Application #:
|
12879465
|
Filing Dt:
|
09/10/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
METHOD AND APPARATUS PROVIDING INTEGRATED CIRCUIT HAVING REDISTRIBUTION LAYER WITH RECESSED CONNECTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2011
|
Application #:
|
12879939
|
Filing Dt:
|
09/10/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
PERIODIC SIGNAL SYNCHRONIZATION APPARATUS, SYSTEMS, AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/04/2012
|
Application #:
|
12880336
|
Filing Dt:
|
09/13/2010
|
Publication #:
|
|
Pub Dt:
|
12/30/2010
| | | | |
Title:
|
COMBINED PARALLEL/SERIAL STATUS REGISTER READ
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2012
|
Application #:
|
12880984
|
Filing Dt:
|
09/13/2010
|
Publication #:
|
|
Pub Dt:
|
01/06/2011
| | | | |
Title:
|
METHODS OF MAKING SELF-ALIGNED NANO-STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12883893
|
Filing Dt:
|
09/16/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
ANALOG DELAY LINES AND ADAPTIVE BIASING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2013
|
Application #:
|
12885012
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SPIN TORQUE TRANSFER MEMORY CELL STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2012
|
Application #:
|
12885054
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SPIN TORQUE TRANSFER MEMORY CELL STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12885100
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SPIN TORQUE TRANSFER MEMORY CELL STRUCTURES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12885220
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
02/24/2011
| | | | |
Title:
|
SYSTEM AND METHOD FOR CAPTURING DATA SIGNALS USING A DATA STROBE SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12885251
|
Filing Dt:
|
09/17/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
HOST MEMORY INTERFACE FOR A PARALLEL PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12885781
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
TEST MODE FOR MULTI-CHIP INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/22/2011
|
Application #:
|
12885827
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
METHODS OF SELECTIVELY GROWING NICKEL-CONTAINING MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/09/2012
|
Application #:
|
12886199
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
INTERCONNECT REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2013
|
Application #:
|
12886283
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
METHODS OF FORMING MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2012
|
Application #:
|
12886377
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
INTEGRATORS FOR DELTA-SIGMA MODULATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/03/2013
|
Application #:
|
12886459
|
Filing Dt:
|
09/20/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2014
|
Application #:
|
12887053
|
Filing Dt:
|
09/21/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
MULTI PATH POWER FOR CMOS IMAGERS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2012
|
Application #:
|
12887074
|
Filing Dt:
|
09/21/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
SWITCHING CIRCUITS, LATCHES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/04/2012
|
Application #:
|
12887226
|
Filing Dt:
|
09/21/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
DEVICES AND METHODS FOR REDUCING EFFECTS OF DEVICE MISMATCH IN TEMPERATURE SENSOR CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12887906
|
Filing Dt:
|
09/22/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
METHODS TO REDUCE THE CRITICAL DIMENSION OF SEMICONDUCTOR DEVICES AND RELATED SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2012
|
Application #:
|
12888219
|
Filing Dt:
|
09/22/2010
|
Publication #:
|
|
Pub Dt:
|
03/22/2012
| | | | |
Title:
|
REACTIVE METAL IMPLATED OXIDE BASED MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2014
|
Application #:
|
12888765
|
Filing Dt:
|
09/23/2010
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
ACCESS LINE MANAGEMENT IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12888911
|
Filing Dt:
|
09/23/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
METHODS OF FABRICATING MICROELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
12889069
|
Filing Dt:
|
09/23/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
LOW-TEMPERATURE GROWN HIGH QUALITY ULTRA-THIN COTIO3 GATE DIELECTRICS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12889104
|
Filing Dt:
|
09/23/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
CURRENT MODE DATA SENSING AND PROPAGATION USING VOLTAGE AMPLIFIER
|
|
|
Patent #:
|
|
Issue Dt:
|
06/05/2012
|
Application #:
|
12889372
|
Filing Dt:
|
09/23/2010
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
PHASE CHANGE MEMORY STATE DETERMINATION USING THRESHOLD EDGE DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
|
Application #:
|
12889461
|
Filing Dt:
|
09/24/2010
|
Publication #:
|
|
Pub Dt:
|
01/13/2011
| | | | |
Title:
|
MEMORY CONTROLLER SELF-CALIBRATION FOR REMOVING SYSTEMIC INFLUENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2012
|
Application #:
|
12889527
|
Filing Dt:
|
09/24/2010
|
Publication #:
|
|
Pub Dt:
|
02/10/2011
| | | | |
Title:
|
METHOD AND APPARATUS PROVIDING COLOR INTERPOLATION IN COLOR FILTER ARRAYS USING EDGE DETECTION AND CORRECTION TERMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/13/2012
|
Application #:
|
12890836
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
SYSTEMS AND METHODS FOR LOWERING INTERCONNECT CAPACITANCE THROUGH ADJUSTMENT OF RELATIVE SIGNAL LEVELS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12891248
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
ISOLATION TRENCHES FOR MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/24/2012
|
Application #:
|
12891273
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
LOCKED LOOPS, BIAS GENERATORS, CHARGE PUMPS AND METHODS FOR GENERATING CONTROL VOLTAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2012
|
Application #:
|
12891407
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS AND TRANSISTORS, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS AND TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2012
|
Application #:
|
12891644
|
Filing Dt:
|
09/27/2010
|
Publication #:
|
|
Pub Dt:
|
03/31/2011
| | | | |
Title:
|
METHOD AND SYSTEM FOR LOCAL MEMORY ADDRESSING IN SINGLE INSTRUCTION, MULTIPLE DATA COMPUTER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12892499
|
Filing Dt:
|
09/28/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
EXPOSURE CONTROL FOR IMAGE SENSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2012
|
Application #:
|
12892684
|
Filing Dt:
|
09/28/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING CONTACTS FOR A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2012
|
Application #:
|
12892691
|
Filing Dt:
|
09/28/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING MEMORY DEVICES BY PERFORMING HALOGEN ION IMPLANTATION AND DIFFUSION PROCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2013
|
Application #:
|
12893807
|
Filing Dt:
|
09/29/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
VAPOR DEPOSITION METHODS FOR FORMING A METAL-CONTAINING LAYER ON A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2013
|
Application #:
|
12893992
|
Filing Dt:
|
09/29/2010
|
Publication #:
|
|
Pub Dt:
|
03/29/2012
| | | | |
Title:
|
ELECTRONIC DEVICES, MEMORY DEVICES AND MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/23/2013
|
Application #:
|
12894633
|
Filing Dt:
|
09/30/2010
|
Publication #:
|
|
Pub Dt:
|
01/20/2011
| | | | |
Title:
|
METHOD OF FORMING PITCH MULTIPLIED CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2013
|
Application #:
|
12894920
|
Filing Dt:
|
09/30/2010
|
Title:
|
ERROR DETECTION OR CORRECTION OF A PORTION OF A CODEWORD IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2012
|
Application #:
|
12895535
|
Filing Dt:
|
09/30/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
METHODS OF FORMING DIELECTRIC MATERIAL-CONTAINING STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
12895574
|
Filing Dt:
|
09/30/2010
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
SECURITY PROTECTION FOR MEMORY CONTENT OF PROCESSOR MAIN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
12895627
|
Filing Dt:
|
09/30/2010
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
VALIDATING PERSISTENT MEMORY CONTENT FOR PROCESSOR MAIN MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2011
|
Application #:
|
12895988
|
Filing Dt:
|
10/01/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2013
|
Application #:
|
12896487
|
Filing Dt:
|
10/01/2010
|
Publication #:
|
|
Pub Dt:
|
04/05/2012
| | | | |
Title:
|
MEMORY ARRAYS AND METHODS OF OPERATING MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
12896549
|
Filing Dt:
|
10/01/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
Electron induced chemical etching and deposition for local circuit repair
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
12897260
|
Filing Dt:
|
10/04/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
VARIABLE SECTOR-COUNT ECC
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2012
|
Application #:
|
12897399
|
Filing Dt:
|
10/04/2010
|
Publication #:
|
|
Pub Dt:
|
04/07/2011
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING SENSE AMPLIFIERS SUPPLIED WITH AN OVER-DRIVE VOLTAGE IN A NORMAL MODE AND SUPPLIED WITH A STEP-DOWN VOLTAGE IN A REFRESH MODE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
12897645
|
Filing Dt:
|
10/04/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
SYSTEM AND METHOD FOR AUTOMATICALLY CALIBRATING A TEMPERATURE SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2012
|
Application #:
|
12897999
|
Filing Dt:
|
10/05/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
CAPACITORLESS DRAM ON BULK SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
12/20/2011
|
Application #:
|
12898070
|
Filing Dt:
|
10/05/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
FLASH MEMORY DEVICE WITH REDUNDANT COLUMNS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
|
Application #:
|
12898891
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2012
|
Application #:
|
12898896
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
WAFER LEVEL PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
12899293
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2012
|
Application #:
|
12899436
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
DRAM ARRAYS, VERTICAL TRANSISTOR STRUCTURES, AND METHODS OF FORMING TRANSISTOR STRUCTURES AND DRAM ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
12899444
|
Filing Dt:
|
10/06/2010
|
Publication #:
|
|
Pub Dt:
|
04/12/2012
| | | | |
Title:
|
DIFFERENTIAL AMPLIFIERS, CLOCK GENERATOR CIRCUITS, DELAY LINES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2012
|
Application #:
|
12900286
|
Filing Dt:
|
10/07/2010
|
Publication #:
|
|
Pub Dt:
|
01/27/2011
| | | | |
Title:
|
RECONFIGURABLE CONNECTIONS FOR STACKED SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2011
|
Application #:
|
12901319
|
Filing Dt:
|
10/08/2010
|
Publication #:
|
|
Pub Dt:
|
02/03/2011
| | | | |
Title:
|
PRECHARGE CONTROL CIRCUITS AND METHODS FOR MEMORY HAVING BUFFERED WRITE COMMANDS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2012
|
Application #:
|
12901811
|
Filing Dt:
|
10/11/2010
|
Publication #:
|
|
Pub Dt:
|
03/10/2011
| | | | |
Title:
|
METHOD AND APPARATUS FOR SYNCHRONIZING WITH A CLOCK SIGNAL
|
|