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06/30/2011
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10/15/2013
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09/13/2012
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09/18/2012
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03/08/2011
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08/25/2011
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03/12/2013
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09/13/2012
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08/27/2013
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03/08/2011
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09/13/2012
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THYRISTORS
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06/17/2014
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03/09/2011
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06/30/2011
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HIGH DENSITY NOR FLASH ARRAY ARCHITECTURE
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05/22/2012
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06/30/2011
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10/11/2011
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03/09/2011
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07/07/2011
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11/13/2012
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06/30/2011
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06/30/2011
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03/22/2016
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09/13/2012
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10/08/2013
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03/10/2011
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07/07/2011
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06/30/2011
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10/23/2018
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03/11/2011
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05/03/2012
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DATA SIGNAL MIRRORING
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03/11/2011
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05/03/2012
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COPYBACK OPERATIONS
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01/19/2016
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03/11/2011
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09/13/2012
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03/11/2011
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09/13/2012
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SYSTEMS, DEVICES, MEMORY CONTROLLERS, AND METHODS FOR MEMORY INITIALIZATION
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06/19/2012
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03/14/2011
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08/25/2011
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MEMORY DEVICE REFERENCE CELL PROGRAMMING METHOD AND APPARATUS
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12/11/2012
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03/14/2011
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06/30/2011
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02/26/2013
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03/14/2011
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07/07/2011
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01/14/2014
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03/14/2011
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09/20/2012
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06/05/2012
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03/14/2011
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08/25/2011
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RANDOM TELEGRAPH SIGNAL NOISE REDUCTION SCHEME FOR SEMICONDUCTOR MEMORIES
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10/08/2013
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03/14/2011
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07/07/2011
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03/14/2011
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07/07/2011
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03/13/2012
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03/15/2011
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07/07/2011
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06/26/2012
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03/15/2011
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07/07/2011
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04/26/2016
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03/15/2011
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09/20/2012
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03/15/2011
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07/07/2011
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EPITAXIAL SILICON GROWTH
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10/29/2013
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03/15/2011
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07/07/2011
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07/07/2011
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07/07/2011
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MEMORY CELL OPERATION
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03/16/2011
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09/20/2012
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07/07/2011
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09/20/2012
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07/24/2012
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07/07/2011
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07/14/2011
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12/17/2013
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07/07/2011
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07/07/2011
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07/12/2012
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03/20/2012
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03/21/2011
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07/14/2011
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MICROELECTRONIC DEVICES
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11/12/2013
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08/11/2011
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03/22/2011
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07/14/2011
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03/22/2011
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07/14/2011
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09/27/2012
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07/14/2011
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11/15/2016
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07/14/2011
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07/14/2011
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07/14/2011
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07/14/2011
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07/14/2011
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07/14/2011
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07/14/2011
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09/27/2012
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Title:
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DEVICES HAVING DIFFERENT EFFECTIVE SERIES RESISTANCE STATES AND METHODS FOR CONTROLLING SUCH DEVICES
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Patent #:
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Issue Dt:
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03/12/2013
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Application #:
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13072445
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
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07/14/2011
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Title:
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SEMICONDUCTOR DEVICE HAVING BACKSIDE REDISTRIBUTION LAYERS
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Patent #:
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Issue Dt:
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12/23/2014
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Application #:
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13072478
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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NON-VOLATILE MEMORY PROGRAMMING
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Patent #:
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Issue Dt:
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12/11/2012
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Application #:
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13072504
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Filing Dt:
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03/25/2011
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Publication #:
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Pub Dt:
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09/27/2012
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Title:
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MULTI-LEVEL MEMORY CELL
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Patent #:
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Issue Dt:
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02/12/2013
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Application #:
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13073317
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/21/2011
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Title:
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METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE
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Patent #:
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Issue Dt:
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02/10/2015
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Application #:
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13073360
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/14/2011
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Title:
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NAND INTERFACE
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Patent #:
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Issue Dt:
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03/13/2012
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Application #:
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13073496
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/14/2011
| | | | |
Title:
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METHODS OF OPERATING A MEMORY SYSTEM
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Patent #:
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Issue Dt:
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07/03/2012
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Application #:
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13073595
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/14/2011
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Title:
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METHODS, DEVICES, AND SYSTEMS RELATING TO MEMORY CELLS HAVING A FLOATING BODY
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Patent #:
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Issue Dt:
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06/19/2012
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Application #:
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13073624
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/14/2011
| | | | |
Title:
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CAPACITOR-LESS MEMORY CELL, DEVICE, SYSTEM AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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05/01/2018
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Application #:
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13073768
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Filing Dt:
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03/28/2011
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Publication #:
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Pub Dt:
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07/14/2011
| | | | |
Title:
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BUS TRANSLATOR
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Patent #:
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Issue Dt:
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01/13/2015
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Application #:
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13074642
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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ARRAYS OF MEMORY CELLS AND METHODS OF FORMING AN ARRAY OF VERTICALLY STACKED TIERS OF MEMORY CELLS
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Patent #:
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Issue Dt:
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06/26/2012
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Application #:
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13074785
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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07/21/2011
| | | | |
Title:
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DIGITAL LOCKED LOOPS AND METHODS WITH CONFIGURABLE OPERATING PARAMETERS
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Patent #:
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Issue Dt:
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10/29/2013
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Application #:
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13074852
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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METHODS FOR FORMING A SEMICONDUCTOR STRUCTURE
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Patent #:
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Issue Dt:
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01/29/2013
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Application #:
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13074938
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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07/21/2011
| | | | |
Title:
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SEMICONDUCTOR ASSEMBLIES AND METHODS OF MANUFACTURING SUCH ASSEMBLIES INCLUDING TRENCH AND CHANNEL INTERSECTS WITH THROUGH-HOLE IN THE MOLD MATERIAL
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Patent #:
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Issue Dt:
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12/10/2013
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Application #:
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13074945
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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MEASUREMENT INITIALIZATION CIRCUITRY
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Patent #:
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Issue Dt:
|
03/17/2015
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Application #:
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13074972
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Filing Dt:
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03/29/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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COMMAND PATHS, APPARATUSES AND METHODS FOR PROVIDING A COMMAND TO A DATA BLOCK
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Patent #:
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Issue Dt:
|
10/01/2013
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Application #:
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13076505
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Filing Dt:
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03/31/2011
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Publication #:
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Pub Dt:
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07/21/2011
| | | | |
Title:
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STACKED SEMICONDUCTOR COMPONENTS HAVING CONDUCTIVE INTERCONNECTS
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Patent #:
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Issue Dt:
|
11/22/2011
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Application #:
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13077533
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Filing Dt:
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03/31/2011
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Publication #:
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Pub Dt:
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07/21/2011
| | | | |
Title:
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BAND-GAP REFERENCE VOLTAGE DETECTION CIRCUIT
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Patent #:
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Issue Dt:
|
06/06/2017
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Application #:
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13078274
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Filing Dt:
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04/01/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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METHODS OF FORMING VERTICAL FIELD-EFFECT TRANSISTOR WITH SELF-ALIGNED CONTACTS FOR MEMORY DEVICES WITH PLANAR PERIPHERY/ARRAY AND INTERMEDIATE STRUCTURES FORMED THEREBY
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Patent #:
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Issue Dt:
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08/21/2012
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Application #:
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13078563
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Filing Dt:
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04/01/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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ASYNCHRONOUS/SYNCHRONOUS INTERFACE
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Patent #:
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Issue Dt:
|
02/10/2015
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Application #:
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13078679
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Filing Dt:
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04/01/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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RESISTIVE SWITCHING IN MEMORY CELLS
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Patent #:
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Issue Dt:
|
11/04/2014
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Application #:
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13078771
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Filing Dt:
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04/01/2011
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Publication #:
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Pub Dt:
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07/21/2011
| | | | |
Title:
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SYSTEMS, METHODS AND DEVICES FOR LIMITING CURRENT CONSUMPTION BY A DIFFERENT RAMP RATE UPON POWER-UP
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Patent #:
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Issue Dt:
|
04/30/2013
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Application #:
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13079364
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Filing Dt:
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04/04/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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STABLE ELECTROLESS FINE PITCH INTERCONNECT PLATING
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Patent #:
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Issue Dt:
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06/12/2012
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Application #:
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13079643
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Filing Dt:
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04/04/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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DYNAMIC SOFT PROGRAM TRIMS
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Patent #:
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Issue Dt:
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07/14/2015
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Application #:
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13079652
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Filing Dt:
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04/04/2011
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Publication #:
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Pub Dt:
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10/04/2012
| | | | |
Title:
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CONFINED CELL STRUCTURES AND METHODS OF FORMING CONFINED CELL STRUCTURES
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Patent #:
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Issue Dt:
|
03/05/2013
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Application #:
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13080205
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Filing Dt:
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04/05/2011
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Title:
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PATTERNED SEMICONDUCTOR BASES, AND PATTERNING METHODS
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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13080299
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Filing Dt:
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04/05/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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ERROR DETECTION AND CORRECTION SCHEME FOR A MEMORY DEVICE
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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13080376
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Filing Dt:
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04/05/2011
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Publication #:
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Pub Dt:
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09/22/2011
| | | | |
Title:
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OPTICAL INTERCONNECT IN HIGH-SPEED MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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07/10/2012
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Application #:
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13080489
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Filing Dt:
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04/05/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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DRAM UNIT CELLS, CAPACITORS, METHODS OF FORMING DRAM UNIT CELLS, AND METHODS OF FORMING CAPACITORS
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Patent #:
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Issue Dt:
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05/12/2015
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Application #:
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13081260
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Filing Dt:
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04/06/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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METHOD AND APPARATUS FOR PRE-CHARGING DATA LINES IN A MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
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10/01/2013
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Application #:
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13081920
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Filing Dt:
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04/07/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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METHODS AND DEVICES FOR MEMORY READS WITH PRECHARGED DATA LINES
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Patent #:
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Issue Dt:
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09/11/2012
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Application #:
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13082965
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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08/04/2011
| | | | |
Title:
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METHOD FOR MEMORY CELL ERASURE WITH A PROGRAMMING MONITOR OF REFERENCE CELLS
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Patent #:
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Issue Dt:
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07/09/2013
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Application #:
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13083155
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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INCORPORATING IMPURITIES USING A DISCONTINUOUS MASK
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Patent #:
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Issue Dt:
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12/29/2015
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Application #:
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13083269
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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DATA DEDUPLICATION
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Patent #:
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Issue Dt:
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09/16/2014
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Application #:
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13083341
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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ENCODING AND DECODING TECHNIQUES USING LOW-DENSITY PARITY CHECK CODES
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Patent #:
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Issue Dt:
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11/27/2012
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Application #:
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13083350
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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MULTILAYER SELECT DEVICES AND METHODS RELATED THERETO
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Patent #:
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Issue Dt:
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04/02/2013
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Application #:
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13083354
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Filing Dt:
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04/08/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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METHODS OF PATTERNING PLATINUM-CONTAINING MATERIAL
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Patent #:
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Issue Dt:
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08/28/2012
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Application #:
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13083782
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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PERIPHERAL GATE STACKS AND RECESSED ARRAY GATES
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Patent #:
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Issue Dt:
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07/28/2015
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Application #:
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13083836
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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Forming High Aspect Ratio Isolation Structures
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Patent #:
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Issue Dt:
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06/11/2013
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Application #:
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13083868
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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BARRIER LAYER FOR INTEGRATED CIRCUIT CONTACTS
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Patent #:
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Issue Dt:
|
05/08/2012
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Application #:
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13083975
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
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07/28/2011
| | | | |
Title:
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EMBEDDED PROCESSOR
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Patent #:
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Issue Dt:
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05/27/2014
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Application #:
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13084011
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
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10/11/2012
| | | | |
Title:
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MEMORY CELLS, METHODS OF FORMING MEMORY CELLS AND METHODS OF FORMING MEMORY ARRAYS
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Patent #:
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Issue Dt:
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05/22/2012
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Application #:
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13084108
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Filing Dt:
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04/11/2011
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Publication #:
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Pub Dt:
|
08/04/2011
| | | | |
Title:
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MEMORY DEVICES AND METHODS OF THEIR OPERATION INCLUDING SELECTIVE COMPACTION VERIFY OPERATIONS
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