|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
14156487
|
Filing Dt:
|
01/16/2014
|
Publication #:
|
|
Pub Dt:
|
07/16/2015
| | | | |
Title:
|
ON-CHIP TEST FOR INTEGRATED AC COUPLING CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
14156489
|
Filing Dt:
|
01/16/2014
|
Publication #:
|
|
Pub Dt:
|
07/16/2015
| | | | |
Title:
|
LOCAL THINNING OF SEMICONDUCTOR FINS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14156798
|
Filing Dt:
|
01/16/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ANALYTICS DRIVEN ASSESSMENT OF TRANSACTIONAL RISK DAILY LIMIT EXCEPTIONS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14156821
|
Filing Dt:
|
01/16/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
TRANSACTIONAL RISK DAILY LIMIT UPDATE ALARM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2015
|
Application #:
|
14157098
|
Filing Dt:
|
01/16/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
METHODS FOR FABRICATION OF AN AIR GAP-CONTAINING INTERCONNECT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
14157755
|
Filing Dt:
|
01/17/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
14157851
|
Filing Dt:
|
01/17/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
FINFET SPACER FORMATION BY ORIENTED IMPLANTATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
14157962
|
Filing Dt:
|
01/17/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
INTEGRATED MICRO-INVERTER AND THIN FILM SOLAR MODULE AND MANUFACTURING PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2016
|
Application #:
|
14158539
|
Filing Dt:
|
01/17/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING AN ASYMMETRIC FEATURE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
14158904
|
Filing Dt:
|
01/20/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
METHODS FOR SELECTIVE REVERSE MASK PLANARIZATION AND INTERCONNECT STRUCTURES FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2015
|
Application #:
|
14158917
|
Filing Dt:
|
01/20/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING ENHANCED VARIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2017
|
Application #:
|
14159027
|
Filing Dt:
|
01/20/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
Structure and Method to Form Passive Devices in ETSOI Process Flow
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2016
|
Application #:
|
14160630
|
Filing Dt:
|
01/05/2023
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
FIELD EFFECT TRANSISTOR (FET) WITH SELF-ALIGNED DOUBLE GATES ON BULK SILICON SUBSTRATE, METHODS OF FORMING, AND RELATED DESIGN STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
14160846
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
04/30/2015
| | | | |
Title:
|
APPARATUS AND METHOD TO RECOVER A DATA SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
14160909
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
05/14/2015
| | | | |
Title:
|
THICK AND THIN DATA VOLUME MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
14160918
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
IDENTIFYING AND MITIGATING ELECTROMIGRATION FAILURES IN SIGNAL NETS OF AN INTEGRATED CIRCUIT CHIP DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
14160927
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
05/14/2015
| | | | |
Title:
|
THICK AND THIN DATA VOLUME MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
|
Application #:
|
14161228
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
THROUGH PRINTED CIRCUIT BOARD (PCB) VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
14161309
|
Filing Dt:
|
01/22/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
STRUCTURE AND METHOD TO DETERMINE THROUGH SILICON VIA BUILD INTEGRITY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2016
|
Application #:
|
14161738
|
Filing Dt:
|
01/23/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
WAFER THINNING ENDPOINT DETECTION FOR TSV TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2014
|
Application #:
|
14161896
|
Filing Dt:
|
01/23/2014
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
Title:
|
SEMICONDUCTOR CHIP REPAIR BY STACKING OF A BASE SEMICONDUCTOR CHIP AND A REPAIR SEMICONDUCTOR CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2014
|
Application #:
|
14162256
|
Filing Dt:
|
01/23/2014
|
Publication #:
|
|
Pub Dt:
|
05/15/2014
| | | | |
Title:
|
SELF-ALIGNED EMITTER-BASE IN ADVANCED BiCMOS TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2015
|
Application #:
|
14162403
|
Filing Dt:
|
01/23/2014
|
Publication #:
|
|
Pub Dt:
|
07/23/2015
| | | | |
Title:
|
SEMICONDUCTOR FINS ON A TRENCH ISOLATION REGION IN A BULK SEMICONDUCTOR SUBSTRATE AND A METHOD OF FORMING THE SEMICONDUCTOR FINS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2016
|
Application #:
|
14164310
|
Filing Dt:
|
01/27/2014
|
Publication #:
|
|
Pub Dt:
|
05/22/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14164555
|
Filing Dt:
|
01/27/2014
|
Publication #:
|
|
Pub Dt:
|
07/24/2014
| | | | |
Title:
|
ADHESION LAYER AND MULTIPHASE ULTRA-LOW k DIELECTRIC MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
14164687
|
Filing Dt:
|
01/27/2014
|
Publication #:
|
|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
LEVEL-ESTIMATION IN MULTI-LEVEL CELL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2016
|
Application #:
|
14165607
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
01/22/2015
| | | | |
Title:
|
SEGMENTED THIN FILM SOLAR CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
14165621
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
01/08/2015
| | | | |
Title:
|
BALL GRID ARRAY CONFIGURATION FOR RELIABLE TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
14165633
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
04/23/2015
| | | | |
Title:
|
STORAGE AND RETRIEVAL OF HIGH IMPORTANCE PAGES IN AN ACTIVE MEMORY SHARING ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
14165762
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
11/27/2014
| | | | |
Title:
|
VALIDATION OF CACHE LOCKING USING INSTRUCTION FETCH AND EXECUTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
14166078
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
04/23/2015
| | | | |
Title:
|
PROXIMITY BASED DUAL AUTHENTICATION FOR A WIRELESS NETWORK
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14166155
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
07/30/2015
| | | | |
Title:
|
STRUCTURE AND PROCESS TO DECOUPLE DEEP TRENCH CAPACITORS AND WELL ISOLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2015
|
Application #:
|
14166219
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
LOCALLY ISOLATED PROTECTED BULK FINFET SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14166274
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14167298
|
Filing Dt:
|
01/29/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2016
|
Application #:
|
14167499
|
Filing Dt:
|
01/29/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
JUNCTION FIELD EFFECT TRANSISTOR WITH AN EPITAXIALLY GROWN GATE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2015
|
Application #:
|
14168133
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
07/30/2015
| | | | |
Title:
|
OPTICAL MODEL EMPLOYING PHASE TRANSMISSION VALUES FOR SUB-RESOLUTION ASSIST FEATURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
|
Application #:
|
14168208
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
14168471
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
FIXED CURVATURE FORCE LOADING OF MECHANICALLY SPALLED FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
14169318
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURES WITH PAIR(S) OF VERTICAL FIELD EFFECT TRANSISTORS, EACH PAIR HAVING A SHARED SOURCE/DRAIN REGION AND METHODS OF FORMING THE STRUCTURES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14169632
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ANALYTICS-DRIVEN PRODUCT RECOMMENDATION FOR FINANCIAL SERVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
14170205
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
04/09/2015
| | | | |
Title:
|
Moving Checkpoint-Based High-Availability Log and Data Directly From a Producer Cache to a Consumer Cache
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
14170708
|
Filing Dt:
|
02/03/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
TRANSPARENT CONDUCTIVE ELECTRODE STACK CONTAINING CARBON-CONTAINING MATERIAL
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14171107
|
Filing Dt:
|
02/03/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
EFFICIENT WAKEUP OF POWER GATED DOMAINS THROUGH CHARGE SHARING AND RECYCLING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14171836
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ACCELERATING MICROPROCESSOR CORE WAKE UP VIA CHARGE FROM CAPACITANCE TANK WITHOUT INTRODUCING NOISE ON POWER GRID OF RUNNING MICROPROCESSOR CORES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
14171899
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ACCELERATING THE MICROPROCESSOR CORE WAKEUP BY PREDICTIVELY EXECUTING A SUBSET OF THE POWER-UP SEQUENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
14172365
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
FinFET DEVICE CONTAINING A COMPOSITE SPACER STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/21/2016
|
Application #:
|
14172550
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
TRANSMITTER SERIALIZER LATENCY TRIM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2016
|
Application #:
|
14172618
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
RECEIVER DESERIALIZER LATENCY TRIM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
14172922
|
Filing Dt:
|
02/05/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
AUTOMATIC IDENTIFICATION OF INFORMATION USEFUL FOR GENERATION-BASED FUNCTIONAL VERIFICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
14173296
|
Filing Dt:
|
02/05/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
SHALLOW TRENCH ISOLATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
14174868
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DISLOCATION ENGINEERING USING A SCANNED LASER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
14174869
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DISLOCATION ENGINEERING USING A SCANNED LASER
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
14174887
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
PLATED TRENCH CAPACITOR STRUCTURES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14174920
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
08/13/2015
| | | | |
Title:
|
DIAMOND SHAPED EPITAXY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
|
Application #:
|
14175116
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
07/10/2014
| | | | |
Title:
|
A COAXIAL PROBE STRUCTURE OF ELONGATED ELECTRICAL CONDUCTORS PROJECTING FROM A SUPPORT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
14175587
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
METHOD OF FORMING SUBSTRATE CONTACT FOR SEMICONDUCTOR ON INSULATOR (SOI) SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2014
|
Application #:
|
14176460
|
Filing Dt:
|
02/10/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
TAPERED VIA AND MIM CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14176526
|
Filing Dt:
|
02/10/2014
|
Title:
|
TOUGHNESS, ADHESION AND SMOOTH METAL LINES OF POROUS LOW K DIELECTRIC INTERCONNECT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
14176552
|
Filing Dt:
|
02/10/2014
|
Title:
|
SILICON WAVEGUIDE ON BULK SILICON SUBSTRATE AND METHODS OF FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
14177260
|
Filing Dt:
|
02/11/2014
|
Publication #:
|
|
Pub Dt:
|
08/13/2015
| | | | |
Title:
|
OPTIMIZATION OF A LASER ANNEAL BEAM PATH FOR MAXIMIZING CHIP YIELD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
14177481
|
Filing Dt:
|
02/11/2014
|
Publication #:
|
|
Pub Dt:
|
08/13/2015
| | | | |
Title:
|
SELF-ALIGNED LINER FORMED ON METAL SEMICONDUCTOR ALLOY CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2016
|
Application #:
|
14177530
|
Filing Dt:
|
02/11/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
Method and Structure to Improve the Conductivity of Narrow Copper Filled Vias
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2016
|
Application #:
|
14178955
|
Filing Dt:
|
02/12/2014
|
Publication #:
|
|
Pub Dt:
|
08/13/2015
| | | | |
Title:
|
STRESS BALANCING OF CIRCUITS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14179035
|
Filing Dt:
|
02/12/2014
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
Title:
|
MEASUREMENT OF CMOS DEVICE CHANNEL STRAIN BY X-RAY DIFFRACTION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
14179707
|
Filing Dt:
|
02/13/2014
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
SMALL FOOTPRINT PHASE CHANGE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2016
|
Application #:
|
14181616
|
Filing Dt:
|
02/14/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
UNIVERSAL SOLDER JOINTS FOR 3D PACKAGING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
14181832
|
Filing Dt:
|
02/17/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
GRAPHENE TRANSISTOR WITH A SUBLITHOGRAPHIC CHANNEL WIDTH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
14181960
|
Filing Dt:
|
02/17/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
PHOTORESIST COLLAPSE METHOD FOR FORMING A PHYSICAL UNCLONABLE FUNCTION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2014
|
Application #:
|
14182242
|
Filing Dt:
|
02/17/2014
|
Publication #:
|
|
Pub Dt:
|
06/12/2014
| | | | |
Title:
|
IMPLANT DAMAGE CONTROL BY IN-SITU C DOPING DURING SIGE EPITAXY FOR DEVICE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2016
|
Application #:
|
14182459
|
Filing Dt:
|
02/18/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
DIODE BIASED BODY CONTACTED TRANSISTOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14182685
|
Filing Dt:
|
02/18/2014
|
Publication #:
|
|
Pub Dt:
|
10/23/2014
| | | | |
Title:
|
DATA PROCESSING SYSTEM WITH REAL-TIME DATA CENTER AIR FLOW SIMULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2017
|
Application #:
|
14183989
|
Filing Dt:
|
02/19/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
WAFER HANDLER AND METHODS OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
14184058
|
Filing Dt:
|
02/19/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
EVALUATING SEMICONDUCTOR WAFERS FOR PITCH WALKING AND/OR EPITAXIAL MERGE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/16/2016
|
Application #:
|
14185079
|
Filing Dt:
|
02/20/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
BALANCING SENSITIVITIES WITH RESPECT TO TIMING CLOSURE FOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
14185506
|
Filing Dt:
|
02/20/2014
|
Publication #:
|
|
Pub Dt:
|
08/20/2015
| | | | |
Title:
|
SYNTHESIZING LOW MASK ERROR ENHANCEMENT FACTOR LITHOGRAPHY SOLUTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
14186512
|
Filing Dt:
|
02/21/2014
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
LATERAL BIPOLAR TRANSISTOR AND CMOS HYBRID TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
14187392
|
Filing Dt:
|
02/24/2014
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
LOCAL INTERCONNECTS COMPATIBLE WITH REPLACEMENT GATE STRUCTURES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14188028
|
Filing Dt:
|
02/24/2014
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
CONTINUOUS METAL SEMICONDUCTOR ALLOY VIA FOR INTERCONNECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
14189108
|
Filing Dt:
|
02/25/2014
|
Publication #:
|
|
Pub Dt:
|
06/19/2014
| | | | |
Title:
|
Thick On-Chip High-Performance Wiring Structures
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
14189682
|
Filing Dt:
|
02/25/2014
|
Publication #:
|
|
Pub Dt:
|
07/10/2014
| | | | |
Title:
|
MEASURING CURRENT AND RESISTANCE USING COMBINED DIODES/RESISTOR STRUCTURE TO MONITOR INTEGRATED CIRCUIT MANUFACTURING PROCESS VARIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
14190514
|
Filing Dt:
|
02/26/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
SYSTEM INVOLVING ELECTRICALLY REPROGRAMMABLE FUSES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
14190611
|
Filing Dt:
|
02/26/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
FINFET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14190723
|
Filing Dt:
|
02/26/2014
|
Publication #:
|
|
Pub Dt:
|
08/27/2015
| | | | |
Title:
|
LIMITING SKEW BETWEEN DIFFERENT DEVICE TYPES TO MEET PERFORMANCE REQUIREMENTS OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2014
|
Application #:
|
14191626
|
Filing Dt:
|
02/27/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
DEVICE STRUCTURES COMPATIBLE WITH FIN-TYPE FIELD-EFFECT TRANSISTOR TECHNOLOGIES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
14191857
|
Filing Dt:
|
02/27/2014
|
Publication #:
|
|
Pub Dt:
|
08/27/2015
| | | | |
Title:
|
REDUCING THERMAL ENERGY TRANSFER DURING CHIP-JOIN PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
14194036
|
Filing Dt:
|
02/28/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
ADVANCED LOW K CAP FILM FORMATION PROCESS FOR NANO ELECTRONIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/05/2016
|
Application #:
|
14194762
|
Filing Dt:
|
03/02/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
HYBRID CMOS NANOWIRE MESH DEVICE AND FINFET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2015
|
Application #:
|
14194766
|
Filing Dt:
|
03/02/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
HYBRID CMOS NANOWIRE MESH DEVICE AND PDSOI DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
14195272
|
Filing Dt:
|
03/03/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
FINFET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14195952
|
Filing Dt:
|
03/04/2014
|
Publication #:
|
|
Pub Dt:
|
09/10/2015
| | | | |
Title:
|
ELECTRICAL FUSE WITH BOTTOM CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2016
|
Application #:
|
14196835
|
Filing Dt:
|
03/04/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
ANTIFERROMAGNETIC STORAGE DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14197366
|
Filing Dt:
|
03/05/2014
|
Publication #:
|
|
Pub Dt:
|
01/08/2015
| | | | |
Title:
|
SHOPPING OPTIMIZER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/01/2015
|
Application #:
|
14197643
|
Filing Dt:
|
03/05/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
Integrated Circuit Having Back Gating, Improved Isolation and Reduced Well Resistance and Method to Fabricate Same
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2014
|
Application #:
|
14197762
|
Filing Dt:
|
03/05/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
STRUCTURE FOR SELF-ALIGNED SILICIDE CONTACTS TO AN UPSIDE-DOWN FET BY EPITAXIAL SOURCE AND DRAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
14198711
|
Filing Dt:
|
03/06/2014
|
Publication #:
|
|
Pub Dt:
|
09/10/2015
| | | | |
Title:
|
MECHANICALLY ANCHORED BACKSIDE C4 PAD
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14200104
|
Filing Dt:
|
03/07/2014
|
Publication #:
|
|
Pub Dt:
|
09/10/2015
| | | | |
Title:
|
FINFET FORMATION WITH LATE FIN REVEAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
14200613
|
Filing Dt:
|
03/07/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT CHIP WITH PYRAMID OR CONE-SHAPED CONDUCTIVE PADS FOR FLEXIBLE C4 CONNECTIONS AND A METHOD OF FORMING THE INTEGRATED CIRCUIT CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
12/15/2015
|
Application #:
|
14202067
|
Filing Dt:
|
03/10/2014
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICE INCLUDING PASSIVATION LAYER ENCAPSULANT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/29/2015
|
Application #:
|
14202590
|
Filing Dt:
|
03/10/2014
|
Publication #:
|
|
Pub Dt:
|
09/10/2015
| | | | |
Title:
|
LEARNING ARTIFICIAL NEURAL NETWORK USING TERNARY CONTENT ADDRESSABLE MEMORY (TCAM)
|
|