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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 15 of 148
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Patent #:	6358832	Issue Dt:	03/19/2002	Application #:	09641834	Filing Dt:	08/18/2000
Title:	METHOD OF FORMING BARRIER LAYERS FOR DAMASCENE INTERCONNECTS

Patent #:	6569711	Issue Dt:	05/27/2003	Application #:	09643522	Filing Dt:	08/22/2000
Title:	METHODS AND APPARATUS FOR BALANCING DIFFERENCES IN THERMAL EXPANSION IN ELECTRONIC PACKAGING

Patent #:	6538295	Issue Dt:	03/25/2003	Application #:	09645499	Filing Dt:	08/25/2000
Title:	SALICIDE DEVICE WITH BORDERLESS CONTACT BACKGROUND OF THE INVENTION

Patent #:	6312791	Issue Dt:	11/06/2001	Application #:	09648862	Filing Dt:	08/25/2000
Title:	Multilayer ceramic substrate with anchored pad

Patent #:	6518903	Issue Dt:	02/11/2003	Application #:	09649733	Filing Dt:	08/28/2000
Title:	ANALOG-TO-DIGITAL CONVERTER

Patent #:	6545935	Issue Dt:	04/08/2003	Application #:	09650011	Filing Dt:	08/29/2000
Title:	DUAL-PORT DRAM ARCHITECTURE SYSTEM

Patent #:	6654925	Issue Dt:	11/25/2003	Application #:	09650153	Filing Dt:	08/29/2000
Title:	METHOD TO DETERMINE RETRIES FOR PARALLEL ECC CORRECTION IN A PIPELINE

Patent #:	6557151	Issue Dt:	04/29/2003	Application #:	09650399	Filing Dt:	08/29/2000
Title:	DISTRIBUTED STATIC TIMING ANALYSIS

Patent #:	6487706	Issue Dt:	11/26/2002	Application #:	09651464	Filing Dt:	08/30/2000
Title:	CONTRACT METHODOLOGY FOR CONCURRENT HIERARCHICAL DESIGN

Patent #:	6370012	Issue Dt:	04/09/2002	Application #:	09652596	Filing Dt:	08/30/2000
Title:	CAPACITOR LAMINATE FOR USE IN PRINTED CIRCUIT BOARD AND AS AN INTERCONNECTOR

Patent #:	6413852	Issue Dt:	07/02/2002	Application #:	09652754	Filing Dt:	08/31/2000
Title:	METHOD OF FORMING MULTILEVEL INTERCONNECT STRUCTURE CONTAINING AIR GAPS INCLUDING UTILIZING BOTH SACRIFICIAL AND PLACEHOLDER MATERIAL

Patent #:	6521328	Issue Dt:	02/18/2003	Application #:	09654963	Filing Dt:	09/05/2000
Title:	COPPER ETCHING COMPOSITIONS AND PRODUCTS DERIVED THEREFROM

Patent #:	6343001	Issue Dt:	01/29/2002	Application #:	09655381	Filing Dt:	09/05/2000
Title:	Multilayer capacitance structure and circuit board containing the same

Patent #:	6521355	Issue Dt:	02/18/2003	Application #:	09656089	Filing Dt:	09/06/2000
Title:	OPTICAL COLOR TRACER IDENTIFIER IN METAL PASTE THAT BLEED TO GREENSHEET

Patent #:	6262873	Issue Dt:	07/17/2001	Application #:	09657081	Filing Dt:	09/07/2000
Title:	Method for providing ESD protection for an integrated circuit

Patent #:	6534848	Issue Dt:	03/18/2003	Application #:	09657194	Filing Dt:	09/07/2000
Title:	ELECTRICAL COUPLING OF A STIFFENER TO A CHIP CARRIER

Patent #:	6512269	Issue Dt:	01/28/2003	Application #:	09657315	Filing Dt:	09/07/2000
Title:	HIGH-VOLTAGE HIGH-SPEED SOI MOSFET

Patent #:	6420748	Issue Dt:	07/16/2002	Application #:	09657968	Filing Dt:	09/08/2000
Title:	BORDERLESS BITLINE AND WORDLINE DRAM STRUCTURE

Patent #:	6337375	Issue Dt:	01/08/2002	Application #:	09660851	Filing Dt:	09/13/2000
Title:	High optical contrast resin composition and electronic package utilizing same

Patent #:	6492715	Issue Dt:	12/10/2002	Application #:	09660866	Filing Dt:	09/13/2000
Title:	INTEGRATED SEMICONDUCTOR PACKAGE

Patent #:	6445638	Issue Dt:	09/03/2002	Application #:	09665016	Filing Dt:	09/19/2000
Title:	FOLDED-BITLINE DUAL-PORT DRAM ARCHITECTURE SYSTEM

Patent #:	6818992	Issue Dt:	11/16/2004	Application #:	09666325	Filing Dt:	09/21/2000
Title:	SELF-ALIGNED COPPER SILICIDE FORMATION FOR IMPROVED ADHESION/ELECTROMIGRATION

Patent #:	6292343	Issue Dt:	09/18/2001	Application #:	09666632	Filing Dt:	09/21/2000
Title:	ASIC book to provide ESD protection on an integrated circuit

Patent #:	6656019	Issue Dt:	12/02/2003	Application #:	09668142	Filing Dt:	09/25/2000
Title:	GROOVED POLISHING PADS AND METHODS OF USE

Patent #:	6658610	Issue Dt:	12/02/2003	Application #:	09669117	Filing Dt:	09/25/2000
Title:	COMPILABLE ADDRESS MAGNITUDE COMPARATOR FOR MEMORY ARRAY SELF-TESTING

Patent #:	6441602	Issue Dt:	08/27/2002	Application #:	09669529	Filing Dt:	09/26/2000
Title:	METHOD AND APPARATUS FOR DETERMINING PHASE LOCKED LOOP JITTER

Patent #:	6528883	Issue Dt:	03/04/2003	Application #:	09670411	Filing Dt:	09/26/2000
Title:	SHAPES-BASED MIGRATION OF ALUMINUM DESIGNS TO COPPER DAMASCENE

Patent #:	6429500	Issue Dt:	08/06/2002	Application #:	09670587	Filing Dt:	09/29/2000
Title:	SEMICONDUCTOR PIN DIODE FOR HIGH FREQUENCY APPLICATIONS

Patent #:	6586746	Issue Dt:	07/01/2003	Application #:	09670728	Filing Dt:	09/27/2000
Title:	MULTIPOLE ELECTROSTATIC E-BEAM DEFLECTOR

Patent #:	6509226	Issue Dt:	01/21/2003	Application #:	09670741	Filing Dt:	09/27/2000
Title:	PROCESS FOR PROTECTING ARRAY TOP OXIDE

Patent #:	6522014	Issue Dt:	02/18/2003	Application #:	09670968	Filing Dt:	09/27/2000
Title:	FABRICATION OF A METALIZED BLIND VIA

Patent #:	6345399	Issue Dt:	02/12/2002	Application #:	09671408	Filing Dt:	09/27/2000
Title:	Hard mask process to prevent surface roughness for selective dielectric etching

Patent #:	6440639	Issue Dt:	08/27/2002	Application #:	09672187	Filing Dt:	09/28/2000
Title:	HIGH-ASPECT RATIO RESIST DEVELOPMENT USING SAFE-SOLVENT MIXTURES OF ALCOHOL AND WATER

Patent #:	6509624	Issue Dt:	01/21/2003	Application #:	09675246	Filing Dt:	09/29/2000
Title:	SEMICONDUCTOR FUSES AND ANTIFUSES IN VERTICAL DRAMS

Patent #:	6794242	Issue Dt:	09/21/2004	Application #:	09675435	Filing Dt:	09/29/2000
Title:	EXTENDIBLE PROCESS FOR IMPROVED TOP OXIDE LAYER FOR DRAM ARRAY AND THE GATE INTERCONNECTS WHILE PROVIDING SELF-ALIGNED GATE CONTACTS

Patent #:	6601223	Issue Dt:	07/29/2003	Application #:	09675634	Filing Dt:	09/29/2000
Title:	SYSTEM AND METHOD FOR FAST INTERCONNECT DELAY ESTIMATION THROUGH ITERATIVE REFINEMENT

Patent #:	6524935	Issue Dt:	02/25/2003	Application #:	09675840	Filing Dt:	09/29/2000
Title:	PREPARATION OF STRAINED SI/SIGE ON INSULATOR BY HYDROGEN INDUCED LAYER TRANSFER TECHNIQUE

Patent #:	6817016	Issue Dt:	11/09/2004	Application #:	09676424	Filing Dt:	09/29/2000
Title:	DOMINANT EDGE IDENTIFICATION FOR EFFICIENT PARTITION AND DISTRIBUTION

Patent #:	6380075	Issue Dt:	04/30/2002	Application #:	09676546	Filing Dt:	09/29/2000
Title:	METHOD FOR FORMING AN OPEN-BOTTOM LINER FOR A CONDUCTOR IN AN ELECTRONIC STRUCTURE AND DEVICE FORMED

Patent #:	6664186	Issue Dt:	12/16/2003	Application #:	09676882	Filing Dt:	09/29/2000
Title:	METHOD OF FILM DEPOSITION, AND FABRICATION OF STRUCTURES

Patent #:	6668078	Issue Dt:	12/23/2003	Application #:	09676883	Filing Dt:	09/29/2000
Title:	SYSTEM AND METHOD FOR SEGMENTATION OF IMAGES OF OBJECTS THAT ARE OCCLUDED BY A SEMI-TRANSPARENT MATERIAL

Patent #:	6538299	Issue Dt:	03/25/2003	Application #:	09678315	Filing Dt:	10/03/2000
Title:	SILICON-ON-INSULATOR (SOI) TRENCH PHOTODIODE

Patent #:	6419785	Issue Dt:	07/16/2002	Application #:	09678633	Filing Dt:	10/03/2000
Title:	ENDPOINT DETECTION BY CHEMICAL REACTION

Patent #:	6725439	Issue Dt:	04/20/2004	Application #:	09678742	Filing Dt:	10/04/2000
Title:	METHOD OF AUTOMATED DESIGN AND CHECKING FOR ESD ROBUSTNESS

Patent #:	6343044	Issue Dt:	01/29/2002	Application #:	09679124	Filing Dt:	10/04/2000
Title:	Super low-power generator system for embedded applications

Patent #:	6436823	Issue Dt:	08/20/2002	Application #:	09679738	Filing Dt:	10/05/2000
Title:	METHOD FOR FORMING A TIN LAYER ON TOP OF A METAL SILICIDE LAYER IN A SEMICONDUCTOR STRUCTURE AND STRUCTURE FORMED

Patent #:	6816826	Issue Dt:	11/09/2004	Application #:	09679780	Filing Dt:	10/05/2000
Title:	FULLY EXHIBITING ASYNCHRONOUS BEHAVIOR IN A LOGIC NETWORK SIMULATION

Patent #:	6545333	Issue Dt:	04/08/2003	Application #:	09681541	Filing Dt:	04/25/2001
Title:	LIGHT CONTROLLED SILICON ON INSULATOR DEVICE

Patent #:	6596570	Issue Dt:	07/22/2003	Application #:	09681794	Filing Dt:	06/06/2001
Publication #:	US20020185675	Pub Dt:	12/12/2002
Title:	SOI DEVICE WITH REDUCED JUNCTION CAPACITANCE

Patent #:	6441462	Issue Dt:	08/27/2002	Application #:	09682016	Filing Dt:	07/10/2001
Title:	SELF-ALIGNED SIGE NPN WITH IMPROVED ESD ROBUSTNESS USING WIDE EMITTER POLYSILICON EXTENSION

Patent #:	NONE	Issue Dt:		Application #:	09682121	Filing Dt:	07/24/2001
Publication #:	US20020012851	Pub Dt:	01/31/2002
Title:	Ternary photomask and method of making the same

Patent #:	6620675	Issue Dt:	09/16/2003	Application #:	09682607	Filing Dt:	09/26/2001
Publication #:	US20030060005	Pub Dt:	03/27/2003
Title:	INCREASED CAPACITANCE TRENCH CAPACITOR

Patent #:	6430072	Issue Dt:	08/06/2002	Application #:	09682638	Filing Dt:	10/01/2001
Title:	EMBEDDED CAM TEST STRUCTURE FOR FULLY TESTING ALL MATCHLINES

Patent #:	6651229	Issue Dt:	11/18/2003	Application #:	09682707	Filing Dt:	10/09/2001
Publication #:	US20030070150	Pub Dt:	04/10/2003
Title:	GENERATION OF REFINED SWITCHING WINDOWS IN STATIC TIMING ANALYSIS

Patent #:	6469350	Issue Dt:	10/22/2002	Application #:	09682868	Filing Dt:	10/26/2001
Title:	ACTIVE WELL SCHEMES FOR SOI TECHNOLOGY

Patent #:	6458020	Issue Dt:	10/01/2002	Application #:	09683086	Filing Dt:	11/16/2001
Title:	SLURRY RECIRCULATION IN CHEMICAL MECHANICAL POLISHING

Patent #:	6834360	Issue Dt:	12/21/2004	Application #:	09683091	Filing Dt:	11/16/2001
Publication #:	US20030097615	Pub Dt:	05/22/2003
Title:	ON-CHIP LOGIC ANALYZER

Patent #:	6433609	Issue Dt:	08/13/2002	Application #:	09683105	Filing Dt:	11/19/2001
Title:	DOUBLE-GATE LOW POWER SOI ACTIVE CLAMP NETWORK FOR SINGLE POWER SUPPLY AND MULTIPLE POWER SUPPLY APPLICATIONS

Patent #:	6700163	Issue Dt:	03/02/2004	Application #:	09683278	Filing Dt:	12/07/2001
Publication #:	US20030107091	Pub Dt:	06/12/2003
Title:	SELECTIVE SILICIDE BLOCKING

Patent #:	6800905	Issue Dt:	10/05/2004	Application #:	09683328	Filing Dt:	12/14/2001
Publication #:	US20030113970	Pub Dt:	06/19/2003
Title:	IMPLANTED ASYMMETRIC DOPED POLYSILICON GATE FINFET

Patent #:	6774437	Issue Dt:	08/10/2004	Application #:	09683486	Filing Dt:	01/07/2002
Publication #:	US20030127690	Pub Dt:	07/10/2003
Title:	FIN-BASED DOUBLE POLY DYNAMIC THRESHOLD CMOS FET WITH SPACER GATE AND METHOD OF FABRICATION

Patent #:	6670654	Issue Dt:	12/30/2003	Application #:	09683498	Filing Dt:	01/09/2002
Publication #:	US20030129802	Pub Dt:	07/10/2003
Title:	SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR WITH CARBON INCORPORATION

Patent #:	6720231	Issue Dt:	04/13/2004	Application #:	09683625	Filing Dt:	01/28/2002
Publication #:	US20030141569	Pub Dt:	07/31/2003
Title:	FIN-TYPE RESISTORS

Patent #:	6583469	Issue Dt:	06/24/2003	Application #:	09683626	Filing Dt:	01/28/2002
Title:	SELF-ALIGNED DOG-BONE STRUCTURE FOR FINFET APPLICATIONS AND METHODS TO FABRICATE THE SAME

Patent #:	6624478	Issue Dt:	09/23/2003	Application #:	09683656	Filing Dt:	01/30/2002
Publication #:	US20030141548	Pub Dt:	07/31/2003
Title:	HIGH MOBILITY TRANSISTORS IN SOI AND METHOD FOR FORMING

Patent #:	7353156	Issue Dt:	04/01/2008	Application #:	09683677	Filing Dt:	02/01/2002
Publication #:	US20030149946	Pub Dt:	08/07/2003
Title:	METHOD OF SWITCHING EXTERNAL MODELS IN AN AUTOMATED SYSTEM-ON-CHIP INTEGRATED CIRCUIT DESIGN VERIFICATION SYSTEM

Patent #:	6621324	Issue Dt:	09/16/2003	Application #:	09683808	Filing Dt:	02/19/2002
Publication #:	US20030155961	Pub Dt:	08/21/2003
Title:	REDUNDANT ANTIFUSE SEGMENTS FOR IMPROVED PROGRAMMING EFFICIENCY

Patent #:	6518614	Issue Dt:	02/11/2003	Application #:	09683809	Filing Dt:	02/19/2002
Title:	EMBEDDED ONE-TIME PROGRAMMABLE NON-VOLATILE MEMORY USING PROMPT SHIFT DEVICE

Patent #:	6724029	Issue Dt:	04/20/2004	Application #:	09683831	Filing Dt:	02/21/2002
Publication #:	US20030155599	Pub Dt:	08/21/2003
Title:	TWIN-CELL FLASH MEMORY STRUCTURE AND METHOD

Patent #:	6744079	Issue Dt:	06/01/2004	Application #:	09683983	Filing Dt:	03/08/2002
Publication #:	US20030170960	Pub Dt:	09/11/2003
Title:	OPTIMIZED BLOCKING IMPURITY PLACEMENT FOR SIGE HBTS

Patent #:	7384854	Issue Dt:	06/10/2008	Application #:	09683985	Filing Dt:	03/08/2002
Publication #:	US20030168701	Pub Dt:	09/11/2003
Title:	METHOD OF FORMING LOW CAPACITANCE ESD ROBUST DIODES

Patent #:	6586818	Issue Dt:	07/01/2003	Application #:	09683986	Filing Dt:	03/08/2002
Title:	SELF-ALIGNED SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR DEVICE WITH ELECTROSTATIC DISCHARGE CREVICE COVER FOR SALICIDE DISPLACEMENT

Patent #:	6784516	Issue Dt:	08/31/2004	Application #:	09684463	Filing Dt:	10/06/2000
Title:	INSULATIVE CAP FOR LASER FUSING

Patent #:	6624651	Issue Dt:	09/23/2003	Application #:	09684849	Filing Dt:	10/06/2000
Title:	KERF CIRCUIT FOR MODELING OF BEOL CAPACITANCES

Patent #:	6821489	Issue Dt:	11/23/2004	Application #:	09685382	Filing Dt:	10/10/2000
Title:	SYSTEM AND METHOD FOR ABATING THE SIMULTANEOUS FLOW OF SILANE AND ARSINE

Patent #:	6570568	Issue Dt:	05/27/2003	Application #:	09686720	Filing Dt:	10/10/2000
Title:	SYSTEM AND METHOD FOR THE COORDINATED SIMPLIFICATION OF SURFACE AND WIRE-FRAME DESCRIPTIONS OF A GEOMETRIC MODEL

Patent #:	6700203	Issue Dt:	03/02/2004	Application #:	09686742	Filing Dt:	10/11/2000
Title:	SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION

Patent #:	6350653	Issue Dt:	02/26/2002	Application #:	09689096	Filing Dt:	10/12/2000
Title:	Embedded dram on silicon-on-insulator substrate

Patent #:	6351023	Issue Dt:	02/26/2002	Application #:	09689660	Filing Dt:	10/13/2000
Title:	Semiconductor device having ultra-sharp P-N junction and method of manufacturing the same

Patent #:	6555891	Issue Dt:	04/29/2003	Application #:	09690674	Filing Dt:	10/17/2000
Title:	SOI HYBRID STRUCTURE WITH SELECTIVE EPITAXIAL GROWTH OF SILICON

Patent #:	6642115	Issue Dt:	11/04/2003	Application #:	09690875	Filing Dt:	10/18/2000
Title:	DOUBLE-GATE FET WITH PLANARIZED SURFACES AND SELF-ALIGNED SILICIDES

Patent #:	7163864	Issue Dt:	01/16/2007	Application #:	09691353	Filing Dt:	10/18/2000
Title:	METHOD OF FABRICATING SEMICONDUCTOR SIDE WALL FIN

Patent #:	6426524	Issue Dt:	07/30/2002	Application #:	09691547	Filing Dt:	10/18/2000
Title:	FABRICATING A SQUARE SPACER

Patent #:	6890835	Issue Dt:	05/10/2005	Application #:	09692606	Filing Dt:	10/19/2000
Title:	LAYER TRANSFER OF LOW DEFECT SIGE USING AN ETCH-BACK PROCESS

Patent #:	6504204	Issue Dt:	01/07/2003	Application #:	09693047	Filing Dt:	10/21/2000
Title:	COMPACT DUAL-PORT DRAM ARCHITECTURE SYSTEM AND METHOD FOR MAKING SAME

Patent #:	6647614	Issue Dt:	11/18/2003	Application #:	09693765	Filing Dt:	10/20/2000
Title:	METHOD OF CHANGING AN ELECTRICAL RESISTANCE OF A RESISTOR

Patent #:	6452875	Issue Dt:	09/17/2002	Application #:	09693815	Filing Dt:	10/23/2000
Title:	MULTIMEDIA SEARCH AND INDEXING FOR AUTOMATIC SELECTION OF SCENES AND/OR SOUNDS RECORDED IN A MEDIA FOR REPLAY BY SETTING AUDIO CLIP LEVELS FOR FREQUENCY RANGES OF INTEREST IN THE MEDIA

Patent #:	6310839	Issue Dt:	10/30/2001	Application #:	09693828	Filing Dt:	10/23/2000
Title:	MULTIMEDIA SEARCH AND INDEXING FOR AUTOMATIC SELECTION OF SCENES AND/OR SOUNDS RECORDED IN A MEDIA FOR REPLAY FOR ANALYZING FREQUENCY RANGES OF INTEREST IN THE MEDIA

Patent #:	6377519	Issue Dt:	04/23/2002	Application #:	09693926	Filing Dt:	10/23/2000
Title:	MULTIMEDIA SEARCH AND INDEXING FOR AUTOMATIC SELECTION OF SCENES AND/OR SOUNDS RECORDED IN A MEDIA FOR REPLAY FOR ANALYZING

Patent #:	6414914	Issue Dt:	07/02/2002	Application #:	09693966	Filing Dt:	10/23/2000
Title:	MULTIMEDIA SEARCH AND INDEXING FOR AUTOMATIC SELECTION OF SCENES AND/OR SOUNDS RECORDED IN A MEDIA FOR REPLAY USING AUDIO CUES

Patent #:	6445029	Issue Dt:	09/03/2002	Application #:	09695151	Filing Dt:	10/24/2000
Title:	NVRAM ARRAY DEVICE WITH ENHANCED WRITE AND ERASE

Patent #:	6448590	Issue Dt:	09/10/2002	Application #:	09695199	Filing Dt:	10/24/2000
Title:	MULTIPLE THRESHOLD VOLTAGE FET USING MULTIPLE WORK-FUNCTION GATE MATERIALS

Patent #:	6452240	Issue Dt:	09/17/2002	Application #:	09699651	Filing Dt:	10/30/2000
Title:	INCREASED DAMPING OF MAGNETIZATION IN MAGNETIC MATERIALS

Patent #:	6448176	Issue Dt:	09/10/2002	Application #:	09699900	Filing Dt:	10/30/2000
Title:	DUAL DAMASCENE PROCESSING FOR SEMICONDUCTOR CHIP INTERCONNECTS

Patent #:	6612028	Issue Dt:	09/02/2003	Application #:	09699977	Filing Dt:	10/30/2000
Title:	A METHOD FOR MANUFACTURING A BUILT-UP CIRCUIT BOARD

Patent #:	6498056	Issue Dt:	12/24/2002	Application #:	09702406	Filing Dt:	10/31/2000
Title:	APPARATUS AND METHOD FOR ANTIFUSE WITH ELECTROSTATIC ASSIST

Patent #:	6600224	Issue Dt:	07/29/2003	Application #:	09703062	Filing Dt:	10/31/2000
Title:	THIN FILM ATTACHMENT TO LAMINATE USING A DENDRITIC INTERCONNECTION

Patent #:	6261894	Issue Dt:	07/17/2001	Application #:	09706492	Filing Dt:	11/03/2000
Title:	Method for forming dual workfunction high-performance support mosfets in EDRAM arrays

Patent #:	6551931	Issue Dt:	04/22/2003	Application #:	09706820	Filing Dt:	11/07/2000
Title:	METHOD TO SELECTIVELY CAP INTERCONNECTS WITH INDIUM OR TIN BRONZES AND/OR OXIDES THEREOF AND THE INTERCONNECT SO CAPPED

100

Patent #:	6337253	Issue Dt:	01/08/2002	Application #:	09707305	Filing Dt:	11/07/2000
Title:	Process of making buried capacitor for silicon-on-insulator structure

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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