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Reel/Frame:039138/0001   Pages: 501
Recorded: 06/16/2016
Attorney Dkt #:F163476
Conveyance: SUPPLEMENT TO THE SECURITY AGREEMENT
Total properties: 5800
Page 15 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
7528029
Issue Dt:
05/05/2009
Application #:
11408347
Filing Dt:
04/21/2006
Publication #:
US20070249113
Pub Dt:
10/25/2007
Title:
STRESSOR INTEGRATION AND METHOD THEREOF
2
Patent #:
7491622
Issue Dt:
02/17/2009
Application #:
11409790
Filing Dt:
04/24/2006
Publication #:
US20070249160
Pub Dt:
10/25/2007
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A LAYER FORMED USING AN INDUCTIVELY COUPLED PLASMA
3
Patent #:
7631229
Issue Dt:
12/08/2009
Application #:
11410218
Filing Dt:
04/24/2006
Publication #:
US20070250741
Pub Dt:
10/25/2007
Title:
SELECTIVE BIT ERROR DETECTION AT A BUS DEVICE
4
Patent #:
7760536
Issue Dt:
07/20/2010
Application #:
11410584
Filing Dt:
04/25/2006
Publication #:
US20070247888
Pub Dt:
10/25/2007
Title:
NON-VOLATILE MEMORY CELL
5
Patent #:
7401201
Issue Dt:
07/15/2008
Application #:
11413422
Filing Dt:
04/28/2006
Publication #:
US20070255924
Pub Dt:
11/01/2007
Title:
PROCESSOR AND METHOD FOR ALTERING ADDRESS TRANSLATION
6
Patent #:
8086234
Issue Dt:
12/27/2011
Application #:
11413533
Filing Dt:
04/28/2006
Publication #:
US20070254659
Pub Dt:
11/01/2007
Title:
BROADCAST HANDOFF BETWEEN COMMUNICATION NETWORKS
7
Patent #:
7384819
Issue Dt:
06/10/2008
Application #:
11414440
Filing Dt:
04/28/2006
Publication #:
US20070254409
Pub Dt:
11/01/2007
Title:
METHOD OF FORMING STACKABLE PACKAGE
8
Patent #:
7456679
Issue Dt:
11/25/2008
Application #:
11416273
Filing Dt:
05/02/2006
Publication #:
US20070257729
Pub Dt:
11/08/2007
Title:
REFERENCE CIRCUIT AND METHOD FOR GENERATING A REFERENCE SIGNAL FROM A REFERENCE CIRCUIT
9
Patent #:
7838345
Issue Dt:
11/23/2010
Application #:
11416436
Filing Dt:
05/02/2006
Publication #:
US20070259485
Pub Dt:
11/08/2007
Title:
ELECTRONIC DEVICE INCLUDING SEMICONDUCTOR FINS AND A PROCESS FOR FORMING THE ELECTRONIC DEVICE
10
Patent #:
7829447
Issue Dt:
11/09/2010
Application #:
11419304
Filing Dt:
05/19/2006
Publication #:
US20070269969
Pub Dt:
11/22/2007
Title:
SEMICONDUCTOR STRUCTURE PATTERN FORMATION
11
Patent #:
7615866
Issue Dt:
11/10/2009
Application #:
11419798
Filing Dt:
05/23/2006
Publication #:
US20070275549
Pub Dt:
11/29/2007
Title:
CONTACT SURROUNDED BY PASSIVATION AND POLYMIDE AND METHOD THEREFOR
12
Patent #:
7580288
Issue Dt:
08/25/2009
Application #:
11420095
Filing Dt:
05/24/2006
Publication #:
US20070274116
Pub Dt:
11/29/2007
Title:
MULTI-LEVEL VOLTAGE ADJUSTMENT
13
Patent #:
7741195
Issue Dt:
06/22/2010
Application #:
11420551
Filing Dt:
05/26/2006
Publication #:
US20070275539
Pub Dt:
11/29/2007
Title:
METHOD OF STIMULATING DIE CIRCUITRY AND STRUCTURE THEREFOR
14
Patent #:
7369450
Issue Dt:
05/06/2008
Application #:
11420558
Filing Dt:
05/26/2006
Publication #:
US20070279990
Pub Dt:
12/06/2007
Title:
NONVOLATILE MEMORY HAVING LATCHING SENSE AMPLIFIER AND METHOD OF OPERATION
15
Patent #:
7279959
Issue Dt:
10/09/2007
Application #:
11420559
Filing Dt:
05/26/2006
Title:
CHARGE PUMP SYSTEM WITH REDUCED RIPPLE AND METHOD THEREFOR
16
Patent #:
7468313
Issue Dt:
12/23/2008
Application #:
11420849
Filing Dt:
05/30/2006
Publication #:
US20070281435
Pub Dt:
12/06/2007
Title:
ENGINEERING STRAIN IN THICK STRAINED-SOI SUBSTRATES
17
Patent #:
7811382
Issue Dt:
10/12/2010
Application #:
11421009
Filing Dt:
05/30/2006
Publication #:
US20070277728
Pub Dt:
12/06/2007
Title:
METHOD FOR FORMING A SEMICONDUCTOR STRUCTURE HAVING A STRAINED SILICON LAYER
18
Patent #:
7386821
Issue Dt:
06/10/2008
Application #:
11423240
Filing Dt:
06/09/2006
Publication #:
US20080005717
Pub Dt:
01/03/2008
Title:
PRIMITIVE CELL METHOD FOR FRONT END PHYSICAL DESIGN
19
Patent #:
7985122
Issue Dt:
07/26/2011
Application #:
11423760
Filing Dt:
06/13/2006
Publication #:
US20070287361
Pub Dt:
12/13/2007
Title:
METHOD OF POLISHING A LAYER USING A POLISHING PAD
20
Patent #:
7479813
Issue Dt:
01/20/2009
Application #:
11424132
Filing Dt:
06/14/2006
Publication #:
US20080122520
Pub Dt:
05/29/2008
Title:
LOW VOLTAGE CIRCUIT WITH VARIABLE SUBSTRATE BIAS
21
Patent #:
8310042
Issue Dt:
11/13/2012
Application #:
11424183
Filing Dt:
06/14/2006
Publication #:
US20060220187
Pub Dt:
10/05/2006
Title:
HEATSINK MOLDLOCKS
22
Patent #:
7881813
Issue Dt:
02/01/2011
Application #:
11424767
Filing Dt:
06/16/2006
Publication #:
US20080004752
Pub Dt:
01/03/2008
Title:
SYSTEM AND METHOD FOR SHARING RESET AND BACKGROUND COMMUNICATION ON A SINGLE MCU PIN
23
Patent #:
7292495
Issue Dt:
11/06/2007
Application #:
11427610
Filing Dt:
06/29/2006
Title:
INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION
24
Patent #:
7629220
Issue Dt:
12/08/2009
Application #:
11428038
Filing Dt:
06/30/2006
Publication #:
US20080003725
Pub Dt:
01/03/2008
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE AND STRUCTURE THEREOF
25
Patent #:
7440354
Issue Dt:
10/21/2008
Application #:
11433998
Filing Dt:
05/15/2006
Publication #:
US20070263474
Pub Dt:
11/15/2007
Title:
MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
26
Patent #:
8390354
Issue Dt:
03/05/2013
Application #:
11435917
Filing Dt:
05/17/2006
Publication #:
US20070268053
Pub Dt:
11/22/2007
Title:
Delay configurable device and methods thereof
27
Patent #:
7675806
Issue Dt:
03/09/2010
Application #:
11435942
Filing Dt:
05/17/2006
Publication #:
US20070280026
Pub Dt:
12/06/2007
Title:
LOW VOLTAGE MEMORY DEVICE AND METHOD THEREOF
28
Patent #:
7649781
Issue Dt:
01/19/2010
Application #:
11435944
Filing Dt:
05/17/2006
Publication #:
US20080043525
Pub Dt:
02/21/2008
Title:
BIT CELL REFERENCE DEVICE AND METHODS THEREOF
29
Patent #:
7778252
Issue Dt:
08/17/2010
Application #:
11436234
Filing Dt:
05/18/2006
Publication #:
US20070268991
Pub Dt:
11/22/2007
Title:
HARDWARE MONITOR OF LIN TIME BUDGET
30
Patent #:
7440335
Issue Dt:
10/21/2008
Application #:
11438890
Filing Dt:
05/23/2006
Publication #:
US20070280030
Pub Dt:
12/06/2007
Title:
CONTENTION-FREE HIERARCHICAL BIT LINE IN EMBEDDED MEMORY AND METHOD THEREOF
31
Patent #:
7650579
Issue Dt:
01/19/2010
Application #:
11441367
Filing Dt:
05/25/2006
Publication #:
US20070277133
Pub Dt:
11/29/2007
Title:
MODEL CORRESPONDENCE METHOD AND DEVICE
32
Patent #:
NONE
Issue Dt:
Application #:
11441869
Filing Dt:
05/26/2006
Publication #:
US20070274385
Pub Dt:
11/29/2007
Title:
Method of increasing coding efficiency and reducing power consumption by on-line scene change detection while encoding inter-frame
33
Patent #:
7647573
Issue Dt:
01/12/2010
Application #:
11442196
Filing Dt:
05/26/2006
Publication #:
US20070277135
Pub Dt:
11/29/2007
Title:
METHOD AND DEVICE FOR TESTING DELAY PATHS OF AN INTEGRATED CIRCUIT
34
Patent #:
7218119
Issue Dt:
05/15/2007
Application #:
11444087
Filing Dt:
05/31/2006
Title:
SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
35
Patent #:
7276435
Issue Dt:
10/02/2007
Application #:
11445657
Filing Dt:
06/02/2006
Title:
DIE LEVEL METAL DENSITY GRADIENT FOR IMPROVED FLIP CHIP PACKAGE RELIABILITY
36
Patent #:
8548400
Issue Dt:
10/01/2013
Application #:
11445981
Filing Dt:
05/31/2006
Publication #:
US20070290747
Pub Dt:
12/20/2007
Title:
SYSTEM AND METHOD FOR POLAR MODULATION USING POWER AMPLIFIER BIAS CONTROL
37
Patent #:
7599236
Issue Dt:
10/06/2009
Application #:
11448225
Filing Dt:
06/07/2006
Publication #:
US20070285986
Pub Dt:
12/13/2007
Title:
IN-CIRCUIT VT DISTRIBUTION BIT COUNTER FOR NON-VOLATILE MEMORY DEVICES
38
Patent #:
8102916
Issue Dt:
01/24/2012
Application #:
11448447
Filing Dt:
06/06/2006
Title:
DYNAMICALLY CHANGING MEDIA COMPRESSION FORMAT IN COMPRESSED DOMAIN
39
Patent #:
7892882
Issue Dt:
02/22/2011
Application #:
11450070
Filing Dt:
06/09/2006
Publication #:
US20070284704
Pub Dt:
12/13/2007
Title:
METHODS AND APPARATUS FOR A SEMICONDUCTOR DEVICE PACKAGE WITH IMPROVED THERMAL PERFORMANCE
40
Patent #:
7405102
Issue Dt:
07/29/2008
Application #:
11450667
Filing Dt:
06/09/2006
Publication #:
US20070284711
Pub Dt:
12/13/2007
Title:
METHODS AND APPARATUS FOR THERMAL MANAGEMENT IN A MULTI-LAYER EMBEDDED CHIP STRUCTURE
41
Patent #:
7420401
Issue Dt:
09/02/2008
Application #:
11453324
Filing Dt:
06/14/2006
Publication #:
US20070290731
Pub Dt:
12/20/2007
Title:
LOW PIN COUNT RESET CONFIGURATION
42
Patent #:
7723224
Issue Dt:
05/25/2010
Application #:
11453763
Filing Dt:
06/14/2006
Publication #:
US20070293033
Pub Dt:
12/20/2007
Title:
MICROELECTRONIC ASSEMBLY WITH BACK SIDE METALLIZATION AND METHOD FOR FORMING THE SAME
43
Patent #:
7611955
Issue Dt:
11/03/2009
Application #:
11454403
Filing Dt:
06/15/2006
Publication #:
US20070293013
Pub Dt:
12/20/2007
Title:
METHOD OF FORMING A BIPOLAR TRANSISTOR AND SEMICONDUCTOR COMPONENT THEREOF
44
Patent #:
7442616
Issue Dt:
10/28/2008
Application #:
11454654
Filing Dt:
06/15/2006
Publication #:
US20070290231
Pub Dt:
12/20/2007
Title:
METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR AND BIPOLAR TRANSISTOR THEREOF
45
Patent #:
7638386
Issue Dt:
12/29/2009
Application #:
11455025
Filing Dt:
06/15/2006
Publication #:
US20070293004
Pub Dt:
12/20/2007
Title:
INTEGRATED CMOS AND BIPOLAR DEVICES METHOD AND STRUCTURE
46
Patent #:
7653678
Issue Dt:
01/26/2010
Application #:
11457380
Filing Dt:
07/13/2006
Publication #:
US20080016141
Pub Dt:
01/17/2008
Title:
A DIRECT DIGITAL SYNTHESIS CIRCUIT
47
Patent #:
7411466
Issue Dt:
08/12/2008
Application #:
11457580
Filing Dt:
07/14/2006
Publication #:
US20080024239
Pub Dt:
01/31/2008
Title:
COIL-LESS OVERTONE CRYSTAL OSCILLATOR
48
Patent #:
7548102
Issue Dt:
06/16/2009
Application #:
11457668
Filing Dt:
07/14/2006
Publication #:
US20080012618
Pub Dt:
01/17/2008
Title:
DATA LATCH WITH MINIMAL SETUP TIME AND LAUNCH DELAY
49
Patent #:
7545702
Issue Dt:
06/09/2009
Application #:
11459170
Filing Dt:
07/21/2006
Publication #:
US20080022064
Pub Dt:
01/24/2008
Title:
MEMORY PIPELINING IN AN INTEGRATED CIRCUIT MEMORY DEVICE USING SHARED WORDLINES
50
Patent #:
7627795
Issue Dt:
12/01/2009
Application #:
11460086
Filing Dt:
07/26/2006
Publication #:
US20080052572
Pub Dt:
02/28/2008
Title:
PIPELINED DATA PROCESSOR WITH DETERMINISTIC SIGNATURE GENERATION
51
Patent #:
7823033
Issue Dt:
10/26/2010
Application #:
11460090
Filing Dt:
07/26/2006
Publication #:
US20080126769
Pub Dt:
05/29/2008
Title:
DATA PROCESSING WITH RECONFIGURABLE REGISTERS
52
Patent #:
7432754
Issue Dt:
10/07/2008
Application #:
11460349
Filing Dt:
07/27/2006
Publication #:
US20080024192
Pub Dt:
01/31/2008
Title:
VOLTAGE CONTROL CIRCUIT HAVING A POWER SWITCH
53
Patent #:
7619464
Issue Dt:
11/17/2009
Application #:
11460732
Filing Dt:
07/28/2006
Publication #:
US20080024204
Pub Dt:
01/31/2008
Title:
CURRENT COMPARISON BASED VOLTAGE BIAS GENERATOR FOR ELECTRONIC DATA STORAGE DEVICES
54
Patent #:
7471582
Issue Dt:
12/30/2008
Application #:
11460745
Filing Dt:
07/28/2006
Publication #:
US20080025111
Pub Dt:
01/31/2008
Title:
MEMORY CIRCUIT USING A REFERENCE FOR SENSING
55
Patent #:
7479465
Issue Dt:
01/20/2009
Application #:
11460748
Filing Dt:
07/28/2006
Publication #:
US20080026599
Pub Dt:
01/31/2008
Title:
TRANSFER OF STRESS TO A LAYER
56
Patent #:
7799644
Issue Dt:
09/21/2010
Application #:
11460782
Filing Dt:
07/28/2006
Publication #:
US20080026529
Pub Dt:
01/31/2008
Title:
TRANSISTOR WITH ASYMMETRY FOR DATA STORAGE CIRCUITRY
57
Patent #:
7747889
Issue Dt:
06/29/2010
Application #:
11461048
Filing Dt:
07/31/2006
Publication #:
US20080028253
Pub Dt:
01/31/2008
Title:
BUS HAVING A DYNAMIC TIMING BRIDGE
58
Patent #:
7391278
Issue Dt:
06/24/2008
Application #:
11461120
Filing Dt:
07/31/2006
Publication #:
US20080042769
Pub Dt:
02/21/2008
Title:
OSCILLATOR WITH STACKED AMPLIFIER
59
Patent #:
7292485
Issue Dt:
11/06/2007
Application #:
11461200
Filing Dt:
07/31/2006
Title:
SRAM HAVING VARIABLE POWER SUPPLY AND METHOD THEREFOR
60
Patent #:
7668029
Issue Dt:
02/23/2010
Application #:
11464124
Filing Dt:
08/11/2006
Publication #:
US20080037343
Pub Dt:
02/14/2008
Title:
MEMORY HAVING SENSE TIME OF VARIABLE DURATION
61
Patent #:
7564738
Issue Dt:
07/21/2009
Application #:
11464129
Filing Dt:
08/11/2006
Publication #:
US20080037357
Pub Dt:
02/14/2008
Title:
DOUBLE-RATE MEMORY
62
Patent #:
7432778
Issue Dt:
10/07/2008
Application #:
11465843
Filing Dt:
08/21/2006
Publication #:
US20070159266
Pub Dt:
07/12/2007
Title:
ARRANGEMENT AND METHOD IMPEDANCE MATCHING
63
Patent #:
7778347
Issue Dt:
08/17/2010
Application #:
11465976
Filing Dt:
08/21/2006
Publication #:
US20080043877
Pub Dt:
02/21/2008
Title:
POWER DE-RATING REDUCTION IN A TRANSMITTER
64
Patent #:
7411467
Issue Dt:
08/12/2008
Application #:
11467791
Filing Dt:
08/28/2006
Publication #:
US20080068106
Pub Dt:
03/20/2008
Title:
OVERTONE CRYSTAL OSCILLATOR AUTOMATIC CALIBRATION SYSTEM
65
Patent #:
8191085
Issue Dt:
05/29/2012
Application #:
11467988
Filing Dt:
08/29/2006
Publication #:
US20080126744
Pub Dt:
05/29/2008
Title:
METHOD AND APPARATUS FOR LOADING OR STORING MULTIPLE REGISTERS IN A DATA PROCESSING SYSTEM
66
Patent #:
7523373
Issue Dt:
04/21/2009
Application #:
11468458
Filing Dt:
08/30/2006
Publication #:
US20080082873
Pub Dt:
04/03/2008
Title:
MINIMUM MEMORY OPERATING VOLTAGE TECHNIQUE
67
Patent #:
7443223
Issue Dt:
10/28/2008
Application #:
11468815
Filing Dt:
08/31/2006
Publication #:
US20080054980
Pub Dt:
03/06/2008
Title:
LEVEL SHIFTING CIRCUIT
68
Patent #:
7553753
Issue Dt:
06/30/2009
Application #:
11469158
Filing Dt:
08/31/2006
Publication #:
US20080057696
Pub Dt:
03/06/2008
Title:
METHOD OF FORMING CRACK ARREST FEATURES IN EMBEDDED DEVICE BUILD-UP PACKAGE AND PACKAGE THEREOF
69
Patent #:
8046567
Issue Dt:
10/25/2011
Application #:
11470721
Filing Dt:
09/07/2006
Publication #:
US20070083738
Pub Dt:
04/12/2007
Title:
MULTI-THREADED PROCESSOR ARCHITECTURE
70
Patent #:
7434039
Issue Dt:
10/07/2008
Application #:
11470728
Filing Dt:
09/07/2006
Publication #:
US20070061633
Pub Dt:
03/15/2007
Title:
COMPUTER PROCESSOR CAPABLE OF RESPONDING WITH COMPARABLE EFFICIENCY TO BOTH SOFTWARE-STATE-INDEPENDENT AND STATE-DEPENDENT EVENTS
71
Patent #:
7360182
Issue Dt:
04/15/2008
Application #:
11476386
Filing Dt:
06/28/2006
Publication #:
US20060294478
Pub Dt:
12/28/2006
Title:
METHOD AND SYSTEM FOR REDUCING DELAY NOISE IN AN INTEGRATED CIRCUIT
72
Patent #:
7456798
Issue Dt:
11/25/2008
Application #:
11476387
Filing Dt:
06/28/2006
Publication #:
US20080001840
Pub Dt:
01/03/2008
Title:
STACKED LOOP ANTENNA
73
Patent #:
7724842
Issue Dt:
05/25/2010
Application #:
11476966
Filing Dt:
06/27/2006
Publication #:
US20070297537
Pub Dt:
12/27/2007
Title:
SYSTEM AND METHOD FOR EVM SELF-TEST
74
Patent #:
8582650
Issue Dt:
11/12/2013
Application #:
11486190
Filing Dt:
07/12/2006
Title:
Manipulation of media streams in the compressed domain
75
Patent #:
7428172
Issue Dt:
09/23/2008
Application #:
11487863
Filing Dt:
07/17/2006
Publication #:
US20080013384
Pub Dt:
01/17/2008
Title:
CONCURRENT PROGRAMMING AND PROGRAM VERIFICATION OF FLOATING GATE TRANSISTOR
76
Patent #:
7910441
Issue Dt:
03/22/2011
Application #:
11489793
Filing Dt:
07/19/2006
Publication #:
US20080121997
Pub Dt:
05/29/2008
Title:
MULTI-GATE SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
77
Patent #:
7388419
Issue Dt:
06/17/2008
Application #:
11490439
Filing Dt:
07/20/2006
Publication #:
US20070018712
Pub Dt:
01/25/2007
Title:
PVT VARIATION DETECTION AND COMPENSATION CIRCUIT
78
Patent #:
7262617
Issue Dt:
08/28/2007
Application #:
11493424
Filing Dt:
07/26/2006
Publication #:
US20070024300
Pub Dt:
02/01/2007
Title:
METHOD FOR TESTING INTEGRATED CIRCUIT, AND WAFER
79
Patent #:
7282929
Issue Dt:
10/16/2007
Application #:
11493686
Filing Dt:
07/25/2006
Publication #:
US20060279293
Pub Dt:
12/14/2006
Title:
APPARATUS FOR CURRENT SENSING
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Title:
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Assignor
1
FREESCALE SEMICONDUCTOR, INC.
Exec Dt:
05/25/2016
Assignee
1
MORGAN STANLEY SENIOR FUNDING, INC.
1300 THAMES STREET, 4TH FLOOR
THAMES STREET WHARF
BALTIMORE, MARYLAND 21231
Correspondence name and address
DARLENA BARI STARK
1025 VERMONT AVE NW, SUITE 1130
NATIONAL CORPORATE RESEARCH, LTD.
WASHINGTON, DC 20005

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