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09/05/2017
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07/24/2015
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01/26/2017
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11/20/2018
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07/24/2015
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01/26/2017
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12/26/2017
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14808976
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07/24/2015
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01/26/2017
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08/14/2018
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07/27/2015
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11/19/2015
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07/27/2021
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14810044
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07/27/2015
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11/19/2015
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03/21/2017
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14810092
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07/27/2015
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03/24/2016
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08/22/2017
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14810711
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07/28/2015
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02/04/2016
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01/29/2019
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14811339
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07/28/2015
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11/19/2015
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09/06/2016
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14812284
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07/29/2015
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12/03/2015
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PHASE CHANGE MEMORY STRUCTURES AND METHODS
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06/14/2016
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14813711
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07/30/2015
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11/26/2015
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INTERCONNECTIONS FOR 3D MEMORY
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04/11/2017
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14813883
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07/30/2015
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02/02/2017
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06/07/2016
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14814852
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07/31/2015
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11/26/2015
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09/05/2017
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14815560
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07/31/2015
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11/26/2015
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CONDUCTIVE INTERCONNECT STRUCTURES INCORPORATING NEGATIVE THERMAL EXPANSION MATERIALS AND ASSOCIATED SYSTMES, DEVICES, AND METHODS
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09/20/2016
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14816344
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08/03/2015
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09/19/2017
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14817458
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08/04/2015
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02/09/2017
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METHOD OF FORMING CONDUCTIVE MATERIAL OF A BURIED TRANSISTOR GATE LINE AND METHOD OF FORMING A BURIED TRANSISTOR GATE LINE
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03/13/2018
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14819652
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08/06/2015
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12/10/2015
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WRITE COMMAND OVERLAP DETECTION
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09/27/2016
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14820027
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08/06/2015
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12/03/2015
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Title:
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MEMORY ARRAY WITH A PAIR OF MEMORY-CELL STRINGS TO A SINGLE CONDUCTIVE PILLAR
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04/11/2017
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14820046
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08/06/2015
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12/10/2015
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Title:
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MEMORY CELLS FORMED WITH SEALING MATERIAL
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09/26/2017
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14820835
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08/07/2015
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12/03/2015
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Title:
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SEMICONDUCTOR DEVICE STRUCTURES WITH DOPED ELEMENTS AND METHODS OF FORMATION
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02/28/2017
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14821005
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08/07/2015
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12/10/2015
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Title:
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MEMORY DEVICE POWER MANAGERS AND METHODS
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06/07/2016
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14821550
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08/07/2015
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12/17/2015
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Title:
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PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING SEMICONDUCTOR COMPONENTS
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11/01/2016
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14822083
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08/10/2015
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12/31/2015
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METHODS OF PROGRAMMING MEMORIES
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12/06/2016
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14822272
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08/10/2015
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12/17/2015
| | | | |
Title:
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GETTERING AGENTS IN MEMORY CHARGE STORAGE STRUCTURES
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09/25/2018
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14822750
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08/10/2015
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12/03/2015
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TRANSACTIONAL MEMORY
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07/18/2017
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14824128
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08/12/2015
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12/03/2015
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MEMORY CELLS HAVING A NUMBER OF CONDUCTIVE DIFFUSION BARRIER MATERIALS AND MANUFACTURING METHODS
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04/03/2018
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14824703
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08/12/2015
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02/18/2016
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Title:
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Adaptive Rate Compression Hash Processor
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04/05/2016
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14824942
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08/12/2015
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12/03/2015
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Methods of Fabricating Integrated Structures, and Methods of Forming Vertically-Stacked Memory Cells
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01/01/2019
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14825009
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08/12/2015
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12/03/2015
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STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AND ASSOCIATED SYSTEMS AND METHODS
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08/30/2016
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14825087
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08/12/2015
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MEMORY CELLS
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07/05/2016
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14825902
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08/13/2015
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12/03/2015
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EPITAXIAL DEVICES
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05/17/2016
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14825947
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08/13/2015
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12/03/2015
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METHODS OF FORMING MEMORY CELLS WITH AIR GAPS AND OTHER LOW DIELECTRIC CONSTANT MATERIALS
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08/30/2016
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14825976
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08/13/2015
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12/03/2015
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DIFFERENTIAL DELAY COMPENSATION
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04/05/2016
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14826298
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08/14/2015
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12/03/2015
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DYNAMIC PROGRAM WINDOW DETERMINATION IN A MEMORY DEVICE
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09/20/2016
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14826447
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08/14/2015
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12/03/2015
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SEMICONDUCTOR DEVICES COMPRISING ALUMINUM OXIDE
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12/19/2017
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14826481
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08/14/2015
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03/03/2016
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06/26/2018
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14826583
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08/14/2015
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12/10/2015
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REMAPPING IN A MEMORY DEVICE
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04/04/2017
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14827024
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08/14/2015
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12/10/2015
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METHODS, DEVICES AND SYSTEMS USING OVER-RESET STATE IN A MEMORY CELL
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08/23/2016
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14827371
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08/17/2015
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12/10/2015
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SENSING OPERATIONS IN A MEMORY DEVICE
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09/12/2017
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14827695
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08/17/2015
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02/23/2017
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Integrated Structures Containing Vertically-Stacked Memory Cells
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02/21/2017
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14827763
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08/17/2015
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12/10/2015
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SEMICONDUCTOR DEVICES COMPRISING INTERCONNECT STRUCTURES AND METHODS OF FABRICATION
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07/24/2018
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14828000
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08/17/2015
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12/10/2015
| | | | |
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THRESHOLD VOLTAGE ADJUSTMENT OF A TRANSISTOR
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NONE
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14828050
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08/17/2015
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12/10/2015
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04/25/2017
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14828144
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08/17/2015
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02/23/2017
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MULTI-CHANNEL TESTING
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06/12/2018
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14828151
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08/17/2015
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02/23/2017
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ENCRYPTION OF EXECUTABLES IN COMPUTATIONAL MEMORY
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10/03/2017
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14828185
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08/17/2015
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12/10/2015
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MEMORY HAVING MEMORY CELL STRING AND COUPLING COMPONENTS
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05/03/2016
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14828662
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08/18/2015
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12/10/2015
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SHORT-CHECKING METHODS
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09/26/2017
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14828773
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08/18/2015
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12/10/2015
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Phase Change Memory Cells
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NONE
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14829729
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08/19/2015
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02/23/2017
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Title:
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MEMORY DEVICE WITH REDUCED RAW BIT ERROR RATE
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NONE
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14829818
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08/19/2015
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Pub Dt:
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12/10/2015
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Title:
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Arrays Comprising Vertically-Oriented Transistors and Integrated Circuitry Comprising a Conductive Line Buried in Silicon-Comprising Semiconductor Material
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08/22/2017
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14830517
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08/19/2015
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02/23/2017
| | | | |
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INTEGRATED STRUCTURES
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04/04/2017
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14831011
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08/20/2015
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04/07/2016
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MEMORY HAVING A CONTINUOUS CHANNEL
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02/21/2017
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14831517
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08/20/2015
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02/23/2017
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APPARATUSES AND METHODS FOR ASYMMETRIC BI-DIRECTIONAL SIGNALING INCORPORATING MULTI-LEVEL ENCODING
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11/29/2016
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14832543
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08/21/2015
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12/17/2015
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Title:
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BOOLEAN LOGIC IN A STATE MACHINE LATTICE
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08/15/2017
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14832559
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08/21/2015
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12/10/2015
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COOPERATIVE MEMORY ERROR DETECTION AND REPAIR
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10/11/2016
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14832583
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08/21/2015
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APPARATUSES AND METHOD FOR SUPPLY VOLTAGE LEVEL DETECTION
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12/13/2016
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14833175
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08/24/2015
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12/17/2015
| | | | |
Title:
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SENSE OPERATION FLAGS IN A MEMORY DEVICE
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10/11/2016
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14833423
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08/24/2015
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Pub Dt:
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12/17/2015
| | | | |
Title:
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MEMORY CELLS WITH RECESSED ELECTRODE CONTACTS
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12/13/2016
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14833551
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08/24/2015
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Pub Dt:
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12/17/2015
| | | | |
Title:
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VOLUME SELECT FOR AFFECTING A STATE OF A NON-SELECTED MEMORY VOLUME
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08/29/2017
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14833608
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08/24/2015
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Pub Dt:
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03/03/2016
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING SEMICONDUCTOR CHIPS STACKED OVER SUBSTRATE
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02/20/2018
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14833680
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Filing Dt:
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08/24/2015
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Pub Dt:
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03/03/2016
| | | | |
Title:
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MULTIPLICATION OPERATIONS IN MEMORY
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09/04/2018
|
Application #:
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14833796
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Filing Dt:
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08/24/2015
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Publication #:
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Pub Dt:
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03/03/2016
| | | | |
Title:
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APPARATUSES AND METHODS FOR DETERMINING POPULATION COUNT
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Patent #:
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Issue Dt:
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02/28/2017
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Application #:
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14833849
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Filing Dt:
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08/24/2015
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Publication #:
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Pub Dt:
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02/18/2016
| | | | |
Title:
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MEMORY BLOCK QUALITY IDENTIFICATION IN A MEMORY
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Patent #:
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Issue Dt:
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12/04/2018
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Application #:
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14833876
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Filing Dt:
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08/24/2015
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Publication #:
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Pub Dt:
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12/17/2015
| | | | |
Title:
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ENCODING DATA IN A MODIFIED-MEMORY SYSTEM
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Patent #:
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Issue Dt:
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02/27/2018
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Application #:
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14834065
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Filing Dt:
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08/24/2015
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Publication #:
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Pub Dt:
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03/03/2016
| | | | |
Title:
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MULTIPLICATION OPERATIONS IN MEMORY
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Patent #:
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Issue Dt:
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07/05/2016
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Application #:
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14836130
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
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12/17/2015
| | | | |
Title:
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Methods of Forming Gated Devices
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Patent #:
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Issue Dt:
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02/16/2016
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Application #:
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14836257
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
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12/17/2015
| | | | |
Title:
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METHODS OF FORMING TRANSISTORS
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Patent #:
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Issue Dt:
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02/21/2017
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Application #:
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14836496
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
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12/17/2015
| | | | |
Title:
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IMAGE SENSOR DEFECT IDENTIFICATION USING OPTICAL FLARE
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Patent #:
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Issue Dt:
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08/22/2017
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Application #:
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14836555
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
|
03/03/2016
| | | | |
Title:
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SWAP OPERATIONS IN MEMORY
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Patent #:
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Issue Dt:
|
08/29/2017
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Application #:
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14836673
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
|
03/03/2016
| | | | |
Title:
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DIVISION OPERATIONS IN MEMORY
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Patent #:
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Issue Dt:
|
03/07/2017
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Application #:
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14836726
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Filing Dt:
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08/26/2015
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Publication #:
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Pub Dt:
|
03/03/2016
| | | | |
Title:
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COMPARISON OPERATIONS IN MEMORY
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Patent #:
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Issue Dt:
|
10/22/2019
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Application #:
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14837978
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Filing Dt:
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08/27/2015
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Publication #:
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Pub Dt:
|
03/02/2017
| | | | |
Title:
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METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES INCLUDING STAIR STEP STRUCTURES
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|
|
Patent #:
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|
Issue Dt:
|
07/11/2017
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Application #:
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14838738
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Filing Dt:
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08/28/2015
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Publication #:
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Pub Dt:
|
03/02/2017
| | | | |
Title:
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Integrated Circuit Structures Comprising Conductive Vias And Methods Of Forming Conductive Vias
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|
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Patent #:
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|
Issue Dt:
|
03/06/2018
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Application #:
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14838768
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Filing Dt:
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08/28/2015
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Publication #:
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Pub Dt:
|
03/02/2017
| | | | |
Title:
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SEMICONDUCTOR DEVICES INCLUDING CONDUCTIVE LINES AND METHODS OF FORMING THE SEMICONDUCTOR DEVICES
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|
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Patent #:
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|
Issue Dt:
|
08/28/2018
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Application #:
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14839173
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Filing Dt:
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08/28/2015
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Publication #:
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Pub Dt:
|
12/24/2015
| | | | |
Title:
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MEMORY DEVICES HAVING SPECIAL MODE ACCESS USING A SERIAL MESSAGE
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|
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Patent #:
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Issue Dt:
|
06/27/2017
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Application #:
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14839771
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Filing Dt:
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08/28/2015
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Publication #:
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|
Pub Dt:
|
03/03/2016
| | | | |
Title:
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SEMICONDUCTOR MEMORY DEVICE INCLUDING OUTPUT BUFFER
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|
|
Patent #:
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|
Issue Dt:
|
02/05/2019
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Application #:
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14839812
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Filing Dt:
|
08/28/2015
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Publication #:
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|
Pub Dt:
|
03/02/2017
| | | | |
Title:
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APPARATUSES AND METHODS FOR TRANSFERRING DATA FROM MEMORY ON A DATA PATH
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|
|
Patent #:
|
|
Issue Dt:
|
07/11/2017
|
Application #:
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14840459
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Filing Dt:
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08/31/2015
|
Publication #:
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|
Pub Dt:
|
03/24/2016
| | | | |
Title:
|
Semiconductor Device Having a Memory Cell and Method of Forming the Same
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|
|
Patent #:
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|
Issue Dt:
|
04/18/2017
|
Application #:
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14840733
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Filing Dt:
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08/31/2015
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Publication #:
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Pub Dt:
|
12/24/2015
| | | | |
Title:
|
MEMORY DEVICE FOR A HIERARCHICAL MEMORY ARCHITECTURE
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|
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Patent #:
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|
Issue Dt:
|
04/25/2017
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Application #:
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14841028
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Filing Dt:
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08/31/2015
|
Publication #:
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|
Pub Dt:
|
12/24/2015
| | | | |
Title:
|
Memory Systems and Memory Programming Methods
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|
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Patent #:
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|
Issue Dt:
|
03/13/2018
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Application #:
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14841277
|
Filing Dt:
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08/31/2015
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Publication #:
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Pub Dt:
|
03/02/2017
| | | | |
Title:
|
STORING INFORMATION AND UPDATING MANAGEMENT DATA IN NON-VOLATILE MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
10/04/2016
|
Application #:
|
14842124
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Filing Dt:
|
09/01/2015
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Title:
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METHODS OF OPERATING FERROELECTRIC MEMORY CELLS, AND RELATED FERROELECTRIC MEMORY CELLS
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|
|
Patent #:
|
|
Issue Dt:
|
08/28/2018
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Application #:
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14843676
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Filing Dt:
|
09/02/2015
|
Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
DIE LOCATION COMPENSATION
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|
|
Patent #:
|
|
Issue Dt:
|
06/28/2016
|
Application #:
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14843728
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Filing Dt:
|
09/02/2015
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Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
SYSTEMS AND METHODS INVOLVING MANAGING A PROBLEMATIC MEMORY CELL
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|
|
Patent #:
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|
Issue Dt:
|
03/15/2016
|
Application #:
|
14844429
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Filing Dt:
|
09/03/2015
|
Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
Memory Cells and Methods of Forming Memory Cells
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|
|
Patent #:
|
|
Issue Dt:
|
02/28/2017
|
Application #:
|
14844648
|
Filing Dt:
|
09/03/2015
|
Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
GALLIUM LANTHANIDE OXIDE FILMS
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|
|
Patent #:
|
|
Issue Dt:
|
09/06/2016
|
Application #:
|
14844722
|
Filing Dt:
|
09/03/2015
|
Publication #:
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Pub Dt:
|
12/31/2015
| | | | |
Title:
|
CONTINUOUS ADJUSTING OF SENSING VOLTAGES
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|
|
Patent #:
|
|
Issue Dt:
|
05/30/2017
|
Application #:
|
14844747
|
Filing Dt:
|
09/03/2015
|
Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
BURIED LOW-RESISTANCE METAL WORD LINES FOR CROSS-POINT VARIABLE-RESISTANCE MATERIAL MEMORIES
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|
|
Patent #:
|
|
Issue Dt:
|
02/28/2017
|
Application #:
|
14846510
|
Filing Dt:
|
09/04/2015
|
Publication #:
|
|
Pub Dt:
|
03/09/2017
| | | | |
Title:
|
APPARATUSES INCLUDING MULTIPLE READ MODES AND METHODS FOR SAME
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|
|
Patent #:
|
|
Issue Dt:
|
03/28/2017
|
Application #:
|
14846549
|
Filing Dt:
|
09/04/2015
|
Publication #:
|
|
Pub Dt:
|
03/09/2017
| | | | |
Title:
|
APPARATUSES AND METHODS FOR CHARGING A GLOBAL ACCESS LINE PRIOR TO ACCESSING A MEMORY
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|
|
Patent #:
|
|
Issue Dt:
|
09/26/2017
|
Application #:
|
14847235
|
Filing Dt:
|
09/08/2015
|
Publication #:
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Pub Dt:
|
03/09/2017
| | | | |
Title:
|
FUSE ELEMENT ASSEMBLIES
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|
|
Patent #:
|
|
Issue Dt:
|
11/14/2017
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Application #:
|
14847436
|
Filing Dt:
|
09/08/2015
|
Publication #:
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|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
METHODS OF FORMING A CHARGE-RETAINING TRANSISTOR HAVING SELECTIVELY-FORMED ISLANDS OF CHARGE-TRAPPING MATERIAL WITHIN A LATERAL RECESS
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|
|
Patent #:
|
|
Issue Dt:
|
02/13/2018
|
Application #:
|
14847807
|
Filing Dt:
|
09/08/2015
|
Publication #:
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Pub Dt:
|
03/09/2017
| | | | |
Title:
|
SEARCHING DATA IN PARALLEL USING PROCESSOR-IN-MEMORY DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
05/07/2019
|
Application #:
|
14847822
|
Filing Dt:
|
09/08/2015
|
Publication #:
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|
Pub Dt:
|
03/09/2017
| | | | |
Title:
|
METHODS AND APPARATUSES FOR SEARCHING DATA STORED IN A MEMORY ARRAY USING A REPLICATED DATA PATTERN
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|
|
Patent #:
|
|
Issue Dt:
|
08/23/2016
|
Application #:
|
14847858
|
Filing Dt:
|
09/08/2015
|
Title:
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APPARATUSES AND METHODS FOR CHARGE SHARING ACROSS DATA BUSES BASED ON RESPECTIVE LEVELS OF A DATA BUSES
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|
|
Patent #:
|
|
Issue Dt:
|
07/11/2017
|
Application #:
|
14848045
|
Filing Dt:
|
09/08/2015
|
Publication #:
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Pub Dt:
|
12/31/2015
| | | | |
Title:
|
CIRCUITS, APPARATUSES, AND METHODS FOR CORRECTING DATA ERRORS
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|
|
Patent #:
|
|
Issue Dt:
|
07/03/2018
|
Application #:
|
14848115
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Filing Dt:
|
09/08/2015
|
Publication #:
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|
Pub Dt:
|
01/07/2016
| | | | |
Title:
|
Semiconductor Constructions
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|
|
Patent #:
|
|
Issue Dt:
|
02/07/2017
|
Application #:
|
14848159
|
Filing Dt:
|
09/08/2015
|
Publication #:
|
|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
PERSISTENT CONTENT IN NONVOLATILE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2016
|
Application #:
|
14848912
|
Filing Dt:
|
09/09/2015
|
Publication #:
|
|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
METHODS OF FORMING OPENINGS IN SEMICONDUCTOR STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
04/10/2018
|
Application #:
|
14848954
|
Filing Dt:
|
09/09/2015
|
Publication #:
|
|
Pub Dt:
|
03/09/2017
| | | | |
Title:
|
ADJUSTABLE DELAY CIRCUIT FOR OPTIMIZING TIMING MARGIN
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2017
|
Application #:
|
14849280
|
Filing Dt:
|
09/09/2015
|
Publication #:
|
|
Pub Dt:
|
12/31/2015
| | | | |
Title:
|
COMPARATORS FOR DELTA-SIGMA MODULATORS
|
|