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NONE
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14849715
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09/10/2015
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12/31/2015
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Title:
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RESISTIVE MEMORY CELL
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01/09/2018
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14850662
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09/10/2015
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12/31/2015
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Title:
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MEMORY DEVICES WITH REDUCED OPERATIONAL ENERGY IN PHASE CHANGE MATERIAL AND METHODS OF OPERATION
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03/22/2016
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14850715
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09/10/2015
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01/21/2016
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VERTICAL SOLID-STATE TRANSDUCERS AND HIGH VOLTAGE SOLID-STATE TRANSDUCERS HAVING BURIED CONTACTS AND ASSOCIATED SYSTEMS AND METHODS
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08/30/2016
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14850781
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09/10/2015
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01/07/2016
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Title:
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Data Line Arrangement and Pillar Arrangement in Apparatuses
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03/28/2017
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14850824
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09/10/2015
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04/07/2016
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Title:
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Recessed Transistors Containing Ferroelectric Material
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06/27/2017
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14852232
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09/11/2015
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03/16/2017
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Title:
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MULTI CHANNEL MEMORY WITH FLEXIBLE CODE-LENGTH ECC
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06/27/2017
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14852259
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09/11/2015
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07/14/2016
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Title:
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SEMICONDUCTOR DEVICE HAVING ERROR CORRECTION CODE (ECC) CIRCUIT
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08/22/2017
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14852852
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09/14/2015
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08/11/2016
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Title:
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SEMICONDUCTOR DEVICE HAVING SHALLOW TRENCH ISOLATION STRUCTURE
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06/27/2017
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14853557
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09/14/2015
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01/07/2016
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Title:
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Memory Programming Methods and Memory Systems
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02/21/2017
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14853740
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09/14/2015
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02/25/2016
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Title:
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SEMICONDUCTOR CONSTRUCTIONS AND METHODS OF FORMING MEMORY CELLS
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07/26/2016
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14853775
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09/14/2015
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01/07/2016
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Methods of Forming Memory Structures
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06/13/2017
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14853793
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09/14/2015
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01/07/2016
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Title:
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Semiconductor Constructions Having Peripheral Regions With Spaced Apart Mesas
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10/03/2017
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14853807
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09/14/2015
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03/16/2017
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Title:
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COLLARS FOR UNDER-BUMP METAL STRUCTURES AND ASSOCIATED SYSTEMS AND METHODS
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08/09/2016
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14854212
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09/15/2015
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01/07/2016
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Title:
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Memory Cells, Methods of Forming Memory Cells and Methods of Forming Memory Arrays
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12/27/2016
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14854418
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09/15/2015
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01/07/2016
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Title:
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INDEPENDENTLY ADDRESSABLE MEMORY ARRAY ADDRESS SPACES
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09/27/2016
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14855203
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09/15/2015
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Pub Dt:
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01/07/2016
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Title:
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SHIFTING READ DATA
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08/09/2016
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14855845
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09/16/2015
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01/07/2016
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Title:
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INTEGRATED CIRCUIT FABRICATION
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09/11/2018
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14856105
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09/16/2015
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01/07/2016
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Title:
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PROGRAMMING OF MEMORY DEVICES
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02/07/2017
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14856147
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09/16/2015
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01/07/2016
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Title:
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COMMAND SIGNAL MANAGEMENT IN INTEGRATED CIRCUIT DEVICES
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08/28/2018
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14857369
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09/17/2015
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Pub Dt:
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01/07/2016
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APPARATUSES INCLUDING ELECTRODES HAVING A CONDUCTIVE BARRIER MATERIAL AND METHODS OF FORMING SAME
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09/06/2016
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14857475
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09/17/2015
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01/07/2016
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Title:
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MEMORY DEVICES AND PROGRAMMING MEMORY ARRAYS THEREOF
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01/10/2017
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14860473
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09/21/2015
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03/17/2016
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Title:
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COMPUTERIZED APPARATUS WITH A HIGH SPEED DATA BUS
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07/04/2017
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14861259
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09/22/2015
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Pub Dt:
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01/14/2016
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Title:
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THERMALLY OPTIMIZED PHASE CHANGE MEMORY CELLS AND METHODS OF FABRICATING THE SAME
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10/04/2016
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14864990
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09/25/2015
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Title:
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DATA PATH WITH CLOCK-DATA TRACKING
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06/13/2017
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14866152
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09/25/2015
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03/30/2017
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Title:
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APPARATUSES AND METHODS FOR POWER REGULATION BASED ON INPUT POWER
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08/08/2017
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14866250
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09/25/2015
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03/30/2017
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Title:
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SYSTEM AND METHOD FOR DUTY CYCLE CORRECTION
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07/16/2019
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14866371
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09/25/2015
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Pub Dt:
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03/30/2017
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Title:
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SYSTEMS AND METHODS FOR REDUCING TEMPERATURE SENSOR READING VARIATION DUE TO DEVICE MISMATCH
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07/04/2017
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14867139
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09/28/2015
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01/21/2016
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Title:
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DATA COMPRESSION AND MANAGEMENT
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05/02/2017
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14867185
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09/28/2015
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01/21/2016
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Title:
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MEMORY CELL WITH INDEPENDENTLY-SIZED ELEMENTS
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01/09/2018
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14867914
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09/28/2015
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01/21/2016
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Title:
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MULTI-TIERED SEMICONDUCTOR DEVICES AND ASSOCIATED METHODS
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08/15/2017
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14867948
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09/28/2015
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01/21/2016
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Title:
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SHIELDED VERTICALLY STACKED DATA LINE ARCHITECTURE FOR MEMORY
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10/23/2018
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14867985
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09/28/2015
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01/21/2016
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MEMORY REFRESH METHODS AND APPARATUSES
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10/17/2017
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14868047
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09/28/2015
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01/21/2016
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METHOD AND APPARATUS FOR COMPILING REGULAR EXPRESSIONS
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03/28/2017
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14868604
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09/29/2015
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04/07/2016
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THRESHOLD VOLTAGE DISTRIBUTION DETERMINATION
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01/24/2017
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14868896
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09/29/2015
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01/21/2016
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DESCENDING SET VERIFY FOR PHASE CHANGE MEMORY
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06/28/2016
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14869546
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09/29/2015
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01/21/2016
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SEMICONDUCTOR DEVICE WITH STRAINED CHANNELS
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09/06/2016
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14871723
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09/30/2015
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01/28/2016
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APPARATUSES AND METHODS FOR PROVIDING STROBE SIGNALS TO MEMORIES
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08/02/2016
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14872455
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10/01/2015
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01/28/2016
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DETERMINING A LOCATION OF A MEMORY DEVICE IN A SOLID STATE DEVICE
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08/16/2016
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14873089
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10/01/2015
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01/28/2016
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METHODS OF FORMING PATTERNS WITH A MASK FORMED UTILIZING A BRUSH LAYER
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08/01/2017
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14873893
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10/02/2015
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01/28/2016
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MEMORY DEVICES INCLUDING CAPACITOR STRUCTURES HAVING IMPROVED AREA EFFICIENCY
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01/08/2019
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14874064
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10/02/2015
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02/18/2016
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HIGH VOLTAGE SOLID-STATE TRANSDUCERS AND SOLID-STATE TRANSDUCER ARRAYS HAVING ELECTRICAL CROSS-CONNECTIONS AND ASSOCIATED SYSTEMS AND METHODS
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12/05/2017
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14874068
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10/02/2015
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04/07/2016
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COMPUTING REDUCTION AND PREFIX SUM OPERATIONS IN MEMORY
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04/10/2018
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14874151
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10/02/2015
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04/07/2016
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Title:
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MULTIDIMENSIONAL CONTIGUOUS MEMORY ALLOCATION
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03/21/2017
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14874652
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10/05/2015
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01/28/2016
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METHOD OF FORMING A SEMICONDUCTOR DEVICE COMPRISING FIRST AND SECOND NITRIDE LAYERS
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07/12/2022
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14874841
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10/05/2015
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04/06/2017
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SOLID STATE STORAGE DEVICE WITH VARIABLE LOGICAL CAPACITY BASED ON MEMORY LIFECYCLE
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06/07/2022
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14875493
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10/05/2015
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01/28/2016
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SEMICONDUCTOR DEVICE STRUCTURES WITH LINERS
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03/07/2017
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14877006
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10/07/2015
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02/04/2016
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RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS
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NONE
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14877212
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10/07/2015
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02/11/2016
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MEMORY CELL SUPPORT LATTICE
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03/27/2018
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14877360
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10/07/2015
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01/28/2016
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THROUGH-SUBSTRATE VIA (TSV) TESTING
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05/23/2017
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14877997
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10/08/2015
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01/28/2016
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SEMICONDUCTOR DEVICES INCLUDING STAIR STEP STRUCTURES, AND RELATED METHODS
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08/22/2017
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14878354
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10/08/2015
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01/28/2016
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APPARATUSES AND METHODS FOR TARGETED REFRESHING OF MEMORY
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10/18/2016
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14878452
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10/08/2015
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01/28/2016
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APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
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09/19/2017
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14879363
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10/09/2015
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02/04/2016
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SEMICONDUCTOR DEVICE STRUCTURES INLCUDING A DISTRIBUTED BRAGG REFLECTOR
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11/28/2017
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14880504
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10/12/2015
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02/04/2016
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APPARATUSES AND METHODS FOR OPERATING A MEMORY DEVICE
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03/14/2017
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14881630
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10/13/2015
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02/04/2016
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MEMORY ELEMENTS USING SELF-ALIGNED PHASE CHANGE MATERIAL LAYERS AND METHODS OF MANUFACTURING SAME
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05/16/2017
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14882088
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10/13/2015
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Pub Dt:
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04/07/2016
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MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEADS FOR STACKED DIE PACKAGES, AND ASSOCIATED SYSTEMS AND METHODS
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05/30/2017
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14883377
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10/14/2015
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Pub Dt:
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04/20/2017
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APPARATUSES AND METHODS FOR ARBITRATING A SHARED TERMINAL FOR CALIBRATION OF AN IMPEDANCE TERMINATION
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09/19/2017
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14883454
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10/14/2015
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Pub Dt:
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04/20/2017
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Title:
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APPARATUSES AND METHODS FOR ARBITRATING A SHARED TERMINAL FOR CALIBRATION OF AN IMPEDANCE TERMINATION
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07/05/2016
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14884035
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10/15/2015
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02/04/2016
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Memory Cells and Methods of Forming Memory Cells
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08/15/2017
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14885230
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Filing Dt:
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10/16/2015
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Publication #:
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Pub Dt:
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02/04/2016
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Title:
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MEMORY DEVICE ARCHITECTURE
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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14885546
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Filing Dt:
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10/16/2015
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Publication #:
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Pub Dt:
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04/21/2016
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Title:
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MULTIPLE ENDIANNESS COMPATIBILITY
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Patent #:
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Issue Dt:
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03/29/2016
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Application #:
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14886536
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Filing Dt:
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10/19/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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METHODS AND APPARATUS FOR SENSING A MEMORY CELL
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Patent #:
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Issue Dt:
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01/02/2018
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Application #:
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14887033
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Filing Dt:
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10/19/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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METHOD AND SYSTEM FOR GENERATING OBJECT CODE TO FACILITATE PREDICTIVE MEMORY RETRIEVAL
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Patent #:
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Issue Dt:
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06/06/2017
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Application #:
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14887138
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Filing Dt:
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10/19/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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SEMICONDUCTOR DEVICE INCLUDING A TEMPERATURE SENSOR CIRCUIT
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Patent #:
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Issue Dt:
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01/09/2018
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Application #:
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14887217
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Filing Dt:
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10/19/2015
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Publication #:
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Pub Dt:
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04/20/2017
| | | | |
Title:
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METHOD AND APPARATUS FOR DECODING COMMANDS
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Patent #:
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Issue Dt:
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05/15/2018
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Application #:
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14887359
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Filing Dt:
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10/20/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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INTERCONNECT STRUCTURES FOR INTEGRATED CIRCUITS AND THEIR FORMATION
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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14887951
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Filing Dt:
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10/20/2015
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Publication #:
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Pub Dt:
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04/20/2017
| | | | |
Title:
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LOGICAL ADDRESS HISTORY MANAGEMENT IN MEMORY DEVICE
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14918249
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Filing Dt:
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10/20/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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DATA PATHS USING A FIRST SIGNAL TO CAPTURE DATA AND A SECOND SIGNAL TO OUTPUT DATA AND METHODS FOR PROVIDING DATA
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Patent #:
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Issue Dt:
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11/29/2016
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Application #:
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14918346
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Filing Dt:
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10/20/2015
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Publication #:
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Pub Dt:
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02/11/2016
| | | | |
Title:
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MULTI-LEVEL SIGNALING
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Patent #:
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Issue Dt:
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12/20/2016
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Application #:
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14918364
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Filing Dt:
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10/20/2015
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Publication #:
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Pub Dt:
|
02/11/2016
| | | | |
Title:
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CONTROL OF PAGE ACCESS IN MEMORY
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Patent #:
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Issue Dt:
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08/14/2018
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Application #:
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14920018
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Filing Dt:
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10/22/2015
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Publication #:
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Pub Dt:
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02/11/2016
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Title:
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SELF-ASSEMBLED NANOSTRUCTURES INCLUDING METAL OXIDES AND SEMICONDUCTOR STRUCTURES COMPRISED THEREOF
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Patent #:
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09/04/2018
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14920394
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10/22/2015
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Pub Dt:
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04/27/2017
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Title:
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APPARATUSES AND METHODS FOR HEAT TRANSFER FROM PACKAGED SEMICONDUCTOR DIE
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Patent #:
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12/04/2018
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Application #:
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14920537
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Filing Dt:
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10/22/2015
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Pub Dt:
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06/30/2016
| | | | |
Title:
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SORT OPERATION IN MEMORY
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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14921509
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10/23/2015
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Pub Dt:
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05/05/2016
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Title:
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APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
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Patent #:
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Issue Dt:
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09/25/2018
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14921877
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10/23/2015
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Pub Dt:
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04/14/2016
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Title:
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METHOD AND APPARATUS FOR CONFIGURING WRITE PERFORMANCE FOR ELECTRICALLY WRITABLE MEMORY DEVICES
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Patent #:
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Issue Dt:
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11/05/2019
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14923269
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10/26/2015
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Pub Dt:
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04/27/2017
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Title:
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COMMAND PACKETS FOR THE DIRECT CONTROL OF NON-VOLATILE MEMORY CHANNELS WITHIN A SOLID STATE DRIVE
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Patent #:
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Issue Dt:
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10/17/2017
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14925589
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10/28/2015
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Pub Dt:
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02/18/2016
| | | | |
Title:
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FLOATING GATE MEMORY CELLS IN VERTICAL MEMORY
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Issue Dt:
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03/21/2017
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14926276
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10/29/2015
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Pub Dt:
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02/18/2016
| | | | |
Title:
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VERTICAL SOLID-STATE TRANSDUCERS HAVING BACKSIDE TERMINALS AND ASSOCIATED SYSTEMS AND METHODS
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Patent #:
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Issue Dt:
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10/22/2019
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14927061
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10/29/2015
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Pub Dt:
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05/04/2017
| | | | |
Title:
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MEMORY CELLS CONFIGURED IN MULTIPLE CONFIGURATION MODES
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Patent #:
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Issue Dt:
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04/09/2019
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14927217
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Filing Dt:
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10/29/2015
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Pub Dt:
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05/04/2017
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Title:
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Integrated Assemblies Containing Germanium
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Patent #:
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Issue Dt:
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01/17/2017
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14927316
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Filing Dt:
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10/29/2015
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Publication #:
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Pub Dt:
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03/03/2016
| | | | |
Title:
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Integrated Memory and Methods of Forming Repeating Structures
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Patent #:
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Issue Dt:
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05/05/2020
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14927329
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Filing Dt:
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10/29/2015
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Pub Dt:
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05/04/2017
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Title:
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APPARATUSES AND METHODS FOR ADJUSTING WRITE PARAMETERS BASED ON A WRITE COUNT
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Issue Dt:
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07/09/2019
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14927721
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10/30/2015
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Pub Dt:
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02/18/2016
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Title:
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SEMICONDUCTOR DEVICES AND SYSTEMS INCLUDING MEMORY CELLS AND RELATED METHODS OF FABRICATION
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10/11/2016
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14928159
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10/30/2015
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Pub Dt:
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02/18/2016
| | | | |
Title:
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METHODS OF FORMING PATTERNS FOR SEMICONDUCTOR DEVICE STRUCTURES
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12/25/2018
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14928988
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10/30/2015
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Pub Dt:
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05/04/2017
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Title:
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DATA TRANSFER TECHNIQUES FOR MULTIPLE DEVICES ON A SHARED BUS
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Issue Dt:
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06/26/2018
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14929070
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10/30/2015
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Pub Dt:
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02/25/2016
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Title:
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Constructions Comprising Rutile-Type Titanium Oxide; And Methods of Forming And Utilizing Rutile-Type Titanium Oxide
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Patent #:
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Issue Dt:
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07/12/2016
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14929853
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11/02/2015
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Pub Dt:
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02/25/2016
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Title:
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Circuit Structures, Memory Circuitry, and Methods
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06/21/2016
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14930504
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11/02/2015
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Pub Dt:
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03/10/2016
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Title:
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Methods of Forming Semiconductor Constructions
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11/06/2018
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14930524
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11/02/2015
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Pub Dt:
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02/25/2016
| | | | |
Title:
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Semiconductor Constructions; and Methods for Providing Electrically Conductive Material Within Openings
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Issue Dt:
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10/24/2017
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14931073
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11/03/2015
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Pub Dt:
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02/25/2016
| | | | |
Title:
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Methods Of Forming Capacitors
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05/09/2017
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14931152
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11/03/2015
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02/25/2016
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Title:
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Methods of Forming Memory Arrays
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12/27/2016
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14932503
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11/04/2015
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Pub Dt:
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02/25/2016
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Title:
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APPARATUS, ELECTRONIC DEVICES AND METHODS ASSOCIATED WITH AN OPERATIVE TRANSITION FROM A FIRST INTERFACE TO A SECOND INTERFACE
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05/22/2018
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14932707
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11/04/2015
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Pub Dt:
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05/04/2017
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Title:
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THREE-DIMENSIONAL MEMORY APPARATUSES AND METHODS OF USE
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11/20/2018
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14932746
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11/04/2015
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Pub Dt:
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05/04/2017
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Title:
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APPARATUSES AND METHODS INCLUDING MEMORY AND OPERATION OF SAME
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03/06/2018
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14933874
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11/05/2015
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Pub Dt:
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05/11/2017
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Title:
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APPARATUSES AND METHODS FOR CONCURRENTLY ACCESSING MULTIPLE MEMORY PLANES OF A MEMORY DURING A MEMORY ACCESS OPERATION
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01/16/2018
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14934659
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11/06/2015
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Pub Dt:
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05/11/2017
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Title:
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ENHANCED CHARGE STORAGE MATERIALS, RELATED SEMICONDUCTOR MEMORY CELLS AND SEMICONDUCTOR DEVICES, AND RELATED SYSTEMS AND METHODS
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NONE
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14935049
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11/06/2015
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Pub Dt:
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03/03/2016
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Title:
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A SEMICONDUCTOR CONSTRUCTION COMPRISING ELECTRICALLY INSULATIVE MATERIAL FILLING A TRENCH HAVING AN UPPER WIDE PORTION OVER AND JOINING A NORROW BOTTOM PORTION
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Issue Dt:
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01/24/2017
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14935196
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11/06/2015
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Title:
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RESISTIVE MEMORY ELEMENTS INCLUDING BUFFER MATERIALS, AND RELATED MEMORY CELLS, MEMORY DEVICES, ELECTRONIC SYSTEMS
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Issue Dt:
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12/11/2018
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14935744
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11/09/2015
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Pub Dt:
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03/03/2016
| | | | |
Title:
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NONCONSECUTIVE SENSING OF MULTILEVEL MEMORY CELLS
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Issue Dt:
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08/29/2017
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14935746
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11/09/2015
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Pub Dt:
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03/03/2016
| | | | |
Title:
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SUB-SECTOR WEAR LEVELING IN MEMORIES
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