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Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
07/04/2017
Application #:
14936013
Filing Dt:
11/09/2015
Publication #:
Pub Dt:
03/03/2016
Title:
SEMICONDUCTOR DEVICE STRUCTURES INCLUDING FERROELECTRIC MEMORY CELLS
2
Patent #:
Issue Dt:
12/27/2016
Application #:
14936186
Filing Dt:
11/09/2015
Publication #:
Pub Dt:
03/03/2016
Title:
SYSTEMS, METHODS AND DEVICES FOR PROGRAMMING A MULTILEVEL RESISTIVE MEMORY CELL
3
Patent #:
Issue Dt:
08/28/2018
Application #:
14936209
Filing Dt:
11/09/2015
Publication #:
Pub Dt:
03/03/2016
Title:
SYSTEMS AND METHODS FOR ACCESSING MEMORY
4
Patent #:
Issue Dt:
04/10/2018
Application #:
14936542
Filing Dt:
11/09/2015
Publication #:
Pub Dt:
05/11/2017
Title:
WIRING WITH EXTERNAL TERMINAL
5
Patent #:
Issue Dt:
02/07/2017
Application #:
14936719
Filing Dt:
11/10/2015
Publication #:
Pub Dt:
03/03/2016
Title:
MEMORY DEVICE HAVING A DIFFERENT SOURCE LINE COUPLED TO EACH OF A PLURALITY OF LAYERS OF MEMORY CELL ARRAYS
6
Patent #:
Issue Dt:
09/05/2017
Application #:
14938193
Filing Dt:
11/11/2015
Publication #:
Pub Dt:
03/03/2016
Title:
ASYNCHRONOUS/SYNCHRONOUS INTERFACE
7
Patent #:
Issue Dt:
08/14/2018
Application #:
14939076
Filing Dt:
11/12/2015
Publication #:
Pub Dt:
03/03/2016
Title:
NON-VOLATILE MEMORY WITH LPDRAM
8
Patent #:
Issue Dt:
07/04/2017
Application #:
14940248
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
03/10/2016
Title:
MEMORY SYSTEM DATA MANAGEMENT
9
Patent #:
Issue Dt:
10/03/2017
Application #:
14940327
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
03/10/2016
Title:
METHODS FOR PROVIDING REDUNDANCY IN A MEMORY ARRAY COMPRISING MAPPING PORTIONS OF DATA ASSOCIATED WITH A DEFECTIVE ADDRESS
10
Patent #:
Issue Dt:
08/09/2016
Application #:
14940935
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
03/10/2016
Title:
DETERMINING SOFT DATA FROM A HARD READ
11
Patent #:
Issue Dt:
02/07/2017
Application #:
14941088
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
03/10/2016
Title:
MULTI-BIT FERROELECTRIC MEMORY DEVICE AND METHODS OF FORMING THE SAME
12
Patent #:
NONE
Issue Dt:
Application #:
14941288
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
04/28/2016
Title:
Low-Resistance Interconnects and Methods of Making Same
13
Patent #:
Issue Dt:
07/18/2017
Application #:
14941365
Filing Dt:
11/13/2015
Publication #:
Pub Dt:
06/16/2016
Title:
METHODS, ARTICLES AND DEVICES FOR PULSE ADJUSTMENTS TO PROGRAM A MEMORY CELL
14
Patent #:
Issue Dt:
06/27/2017
Application #:
14942533
Filing Dt:
11/16/2015
Publication #:
Pub Dt:
03/10/2016
Title:
THREE-DIMENSIONAL STRUCTURED MEMORY DEVICES
15
Patent #:
Issue Dt:
08/08/2017
Application #:
14942573
Filing Dt:
11/16/2015
Publication #:
Pub Dt:
05/18/2017
Title:
VERTICAL MEMORY BLOCKS AND RELATED DEVICES AND METHODS
16
Patent #:
Issue Dt:
12/26/2017
Application #:
14942693
Filing Dt:
11/16/2015
Publication #:
Pub Dt:
03/10/2016
Title:
CMOS FABRICATION
17
Patent #:
Issue Dt:
07/18/2017
Application #:
14942701
Filing Dt:
11/16/2015
Publication #:
Pub Dt:
03/10/2016
Title:
APPARATUSES AND METHODS FOR A MEMORY DIE ARCHITECTURE INCLUDING AN INTERFACE MEMORY
18
Patent #:
Issue Dt:
10/03/2017
Application #:
14942823
Filing Dt:
11/16/2015
Publication #:
Pub Dt:
05/18/2017
Title:
METHODS OF FORMING INTEGRATED STRUCTURES
19
Patent #:
Issue Dt:
10/11/2016
Application #:
14943113
Filing Dt:
11/17/2015
Publication #:
Pub Dt:
03/10/2016
Title:
OPERATION MANAGEMENT IN A MEMORY DEVICE
20
Patent #:
Issue Dt:
10/03/2017
Application #:
14943541
Filing Dt:
11/17/2015
Publication #:
Pub Dt:
05/18/2017
Title:
ERASING MEMORY SEGMENTS IN A MEMORY BLOCK OF MEMORY CELLS USING SELECT GATE CONTROL LINE VOLTAGES
21
Patent #:
Issue Dt:
12/11/2018
Application #:
14944622
Filing Dt:
11/18/2015
Publication #:
Pub Dt:
03/10/2016
Title:
APPARATUSES INCLUDING A MEMORY ARRAY WITH SEPARATE GLOBAL READ AND WRITE LINES AND/OR SENSE AMPLIFIER REGION COLUMN SELECT LINE AND RELATED METHODS
22
Patent #:
Issue Dt:
11/14/2017
Application #:
14946486
Filing Dt:
11/19/2015
Publication #:
Pub Dt:
03/17/2016
Title:
PHOTOLITHOGRAPHY SYSTEMS AND ASSOCIATED METHODS OF OVERLAY ERROR CORRECTION
23
Patent #:
NONE
Issue Dt:
Application #:
14947122
Filing Dt:
11/20/2015
Publication #:
Pub Dt:
05/25/2017
Title:
INPUT RECEIVER CIRCUIT
24
Patent #:
Issue Dt:
11/22/2016
Application #:
14947455
Filing Dt:
11/20/2015
Publication #:
Pub Dt:
03/24/2016
Title:
MEMORY INCLUDING A SELECTOR SWITCH ON A VARIABLE RESISTANCE MEMORY CELL
25
Patent #:
Issue Dt:
01/24/2017
Application #:
14947978
Filing Dt:
11/20/2015
Publication #:
Pub Dt:
03/17/2016
Title:
STT-MRAM CELL STRUCTURE INCORPORATING PIEZOELECTRIC STRESS MATERIAL
26
Patent #:
Issue Dt:
12/25/2018
Application #:
14948074
Filing Dt:
11/20/2015
Publication #:
Pub Dt:
05/25/2017
Title:
THROUGH SUBSTRATE VIA LINER DENSIFICATION
27
Patent #:
Issue Dt:
06/27/2017
Application #:
14948097
Filing Dt:
11/20/2015
Publication #:
Pub Dt:
03/17/2016
Title:
THYRISTORS, METHODS OF PROGRAMMING THYRISTORS, AND METHODS OF FORMING THYRISTORS
28
Patent #:
Issue Dt:
04/04/2017
Application #:
14949778
Filing Dt:
11/23/2015
Publication #:
Pub Dt:
03/17/2016
Title:
Methods of Forming Semiconductor Constructions
29
Patent #:
Issue Dt:
12/26/2017
Application #:
14949807
Filing Dt:
11/23/2015
Publication #:
Pub Dt:
05/25/2017
Title:
INTEGRATED ASSEMBLIES
30
Patent #:
Issue Dt:
04/18/2017
Application #:
14950413
Filing Dt:
11/24/2015
Title:
APPARATUSES AND METHODS FOR CURRENT LIMITATION IN THRESHOLD SWITCHING MEMORIES
31
Patent #:
Issue Dt:
10/23/2018
Application #:
14952382
Filing Dt:
11/25/2015
Publication #:
Pub Dt:
05/25/2017
Title:
APPARATUSES AND METHODS FOR PROVIDING A SIGNAL WITH A DIFFERENTIAL PHASE MIXER
32
Patent #:
Issue Dt:
06/13/2017
Application #:
14952489
Filing Dt:
11/25/2015
Publication #:
Pub Dt:
05/25/2017
Title:
SEMICONDUCTOR DEVICE WITH SINGLE ENDED MAIN I/O LINE
33
Patent #:
Issue Dt:
04/09/2019
Application #:
14953698
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/31/2016
Title:
MEMORY CELLS HAVING ELECTRICALLY CONDUCTIVE NANODOTS
34
Patent #:
Issue Dt:
07/17/2018
Application #:
14954460
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/17/2016
Title:
ADAPTIVE COMMUNICATION INTERFACE
35
Patent #:
Issue Dt:
10/03/2017
Application #:
14954507
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/24/2016
Title:
MULTI-PARTITIONING OF MEMORIES
36
Patent #:
Issue Dt:
01/10/2017
Application #:
14954549
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/24/2016
Title:
EFFICIENT OPERATIONS OF COMPONENTS IN A WIRELESS COMMUNICATIONS DEVICE
37
Patent #:
Issue Dt:
01/31/2017
Application #:
14954587
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/24/2016
Title:
TIMING VIOLATION HANDLING IN A SYNCHRONOUS INTERFACE MEMORY
38
Patent #:
Issue Dt:
12/03/2019
Application #:
14954625
Filing Dt:
11/30/2015
Publication #:
Pub Dt:
03/24/2016
Title:
SEQUENTIAL MEMORY OPERATION WITHOUT DEACTIVATING ACCESS LINE SIGNALS
39
Patent #:
Issue Dt:
08/29/2017
Application #:
14955520
Filing Dt:
12/01/2015
Publication #:
Pub Dt:
06/02/2016
Title:
APPARATUSES AND METHODS FOR CONVERTING A MASK TO AN INDEX
40
Patent #:
Issue Dt:
09/11/2018
Application #:
14955680
Filing Dt:
12/01/2015
Publication #:
Pub Dt:
06/02/2016
Title:
MULTIPLE ENDIANNESS COMPATIBILITY
41
Patent #:
Issue Dt:
06/12/2018
Application #:
14955845
Filing Dt:
12/01/2015
Publication #:
Pub Dt:
06/01/2017
Title:
CAPACITOR, ARRAY OF CAPACITORS, AND DEVICE COMPRISING AN ELECTRODE
42
Patent #:
Issue Dt:
09/13/2016
Application #:
14956291
Filing Dt:
12/01/2015
Publication #:
Pub Dt:
03/31/2016
Title:
MEMORY CELLS AND METHODS OF FORMING MEMORY CELLS
43
Patent #:
Issue Dt:
10/18/2016
Application #:
14957360
Filing Dt:
12/02/2015
Publication #:
Pub Dt:
03/24/2016
Title:
APPARATUS POWER CONTROL
44
Patent #:
Issue Dt:
10/03/2017
Application #:
14957801
Filing Dt:
12/03/2015
Publication #:
Pub Dt:
03/24/2016
Title:
DATA DEDUPLICATION
45
Patent #:
Issue Dt:
01/23/2018
Application #:
14958182
Filing Dt:
12/03/2015
Publication #:
Pub Dt:
06/08/2017
Title:
FERROELECTRIC CAPACITOR, FERROELECTRIC FIELD EFFECT TRANSISTOR, AND METHOD USED IN FORMING AN ELECTRONIC COMPONENT COMPRISING CONDUCTIVE MATERIAL AND FERROELECTRIC MATERIAL
46
Patent #:
Issue Dt:
12/06/2016
Application #:
14958217
Filing Dt:
12/03/2015
Publication #:
Pub Dt:
03/24/2016
Title:
ACCESS LINE MANAGEMENT IN A MEMORY DEVICE
47
Patent #:
Issue Dt:
10/18/2016
Application #:
14958650
Filing Dt:
12/03/2015
Publication #:
Pub Dt:
03/24/2016
Title:
APPARATUSES AND METHODS FOR PROVIDING CLOCK SIGNALS
48
Patent #:
Issue Dt:
06/05/2018
Application #:
14959140
Filing Dt:
12/04/2015
Publication #:
Pub Dt:
03/31/2016
Title:
DEVICES, METHODS, AND SYSTEMS SUPPORTING ON UNIT TERMINATION
49
Patent #:
Issue Dt:
05/29/2018
Application #:
14959271
Filing Dt:
12/04/2015
Publication #:
Pub Dt:
03/24/2016
Title:
EPITAXIAL FORMATION SUPPORT STRUCTURES AND ASSOCIATED METHODS
50
Patent #:
Issue Dt:
07/10/2018
Application #:
14959500
Filing Dt:
12/04/2015
Publication #:
Pub Dt:
03/24/2016
Title:
PASS-THROUGH INTERCONNECT STRUCTURE FOR MICROELECTRONIC DIES AND ASSOCIATED SYSTEMS AND METHODS
51
Patent #:
Issue Dt:
10/02/2018
Application #:
14960953
Filing Dt:
12/07/2015
Publication #:
Pub Dt:
03/24/2016
Title:
RESISTIVE MEMORY DEVICES
52
Patent #:
Issue Dt:
09/05/2017
Application #:
14961037
Filing Dt:
12/07/2015
Publication #:
Pub Dt:
03/24/2016
Title:
PIXEL ARRAY WITH SHARED PIXELS IN A SINGLE COLUMN AND ASSOCIATED DEVICES, SYSTEMS, AND METHODS
53
Patent #:
Issue Dt:
12/12/2017
Application #:
14961042
Filing Dt:
12/07/2015
Publication #:
Pub Dt:
03/24/2016
Title:
MEMORY ARRAY WITH POWER-EFFICIENT READ ARCHITECTURE
54
Patent #:
Issue Dt:
09/25/2018
Application #:
14964096
Filing Dt:
12/09/2015
Publication #:
Pub Dt:
03/24/2016
Title:
PACKAGED MICROELECTRONIC DEVICES HAVING STACKED INTERCONNECT ELEMENTS AND METHODS FOR MANUFACTURING THE SAME
55
Patent #:
Issue Dt:
12/27/2016
Application #:
14966927
Filing Dt:
12/11/2015
Publication #:
Pub Dt:
04/07/2016
Title:
Integrated Circuitry and Methods of Forming Transistors
56
Patent #:
Issue Dt:
05/23/2017
Application #:
14967009
Filing Dt:
12/11/2015
Publication #:
Pub Dt:
06/15/2017
Title:
APPARATUSES AND METHODS FOR FORMING DIE STACKS
57
Patent #:
Issue Dt:
02/14/2017
Application #:
14967934
Filing Dt:
12/14/2015
Publication #:
Pub Dt:
04/07/2016
Title:
A CONTROLLER TO MANAGE NAND MEMORIES
58
Patent #:
Issue Dt:
10/03/2017
Application #:
14969709
Filing Dt:
12/15/2015
Publication #:
Pub Dt:
04/14/2016
Title:
METHODS OF FORMING INTEGRATED CIRCUIT DEVICES
59
Patent #:
Issue Dt:
05/16/2017
Application #:
14970380
Filing Dt:
12/15/2015
Title:
METHODS AND APPARATUSES FOR MODULATING THRESHOLD VOLTAGES OF MEMORY CELLS
60
Patent #:
Issue Dt:
09/26/2017
Application #:
14970602
Filing Dt:
12/16/2015
Publication #:
Pub Dt:
04/14/2016
Title:
MEMORY CELL ARRAY STRUCTURES AND METHODS OF FORMING THE SAME
61
Patent #:
Issue Dt:
01/02/2018
Application #:
14970911
Filing Dt:
12/16/2015
Publication #:
Pub Dt:
04/14/2016
Title:
DRIFT ACCELERATION IN RESISTANCE VARIABLE MEMORY
62
Patent #:
Issue Dt:
05/15/2018
Application #:
14971634
Filing Dt:
12/16/2015
Publication #:
Pub Dt:
06/23/2016
Title:
APPARATUS, SYSTEMS, AND METHODS TO OPERATE A MEMORY
63
Patent #:
Issue Dt:
11/28/2017
Application #:
14972152
Filing Dt:
12/17/2015
Publication #:
Pub Dt:
04/14/2016
Title:
MEMORY CELL WITH INDEPENDENTLY-SIZED ELECTRODE
64
Patent #:
Issue Dt:
10/17/2017
Application #:
14972376
Filing Dt:
12/17/2015
Publication #:
Pub Dt:
04/14/2016
Title:
ACTIVE ALIGNMENT OF OPTICAL FIBER TO CHIP USING LIQUID CRYSTALS
65
Patent #:
Issue Dt:
01/10/2017
Application #:
14973362
Filing Dt:
12/17/2015
Publication #:
Pub Dt:
04/14/2016
Title:
DETERMINING SOFT DATA FOR COMBINATIONS OF MEMORY CELLS
66
Patent #:
Issue Dt:
06/14/2016
Application #:
14973446
Filing Dt:
12/17/2015
Publication #:
Pub Dt:
04/14/2016
Title:
APPARATUSES AND METHODS INCLUDING MEMORY ACCESS IN CROSS POINT MEMORY
67
Patent #:
Issue Dt:
01/23/2018
Application #:
14973480
Filing Dt:
12/17/2015
Publication #:
Pub Dt:
04/14/2016
Title:
DETERMINING SOFT DATA FOR FRACTIONAL DIGIT MEMORY CELLS
68
Patent #:
Issue Dt:
09/06/2016
Application #:
14975410
Filing Dt:
12/18/2015
Publication #:
Pub Dt:
04/14/2016
Title:
METHODS, DEVICES AND PROCESSES FOR MULTI-STATE PHASE CHANGE DEVICES
69
Patent #:
Issue Dt:
09/05/2017
Application #:
14975746
Filing Dt:
12/19/2015
Publication #:
Pub Dt:
06/22/2017
Title:
Electronic Component Of Integrated Circuitry And A Method Of Forming A Conductive Via To A Region Of Semiconductor Material
70
Patent #:
Issue Dt:
09/13/2016
Application #:
14976343
Filing Dt:
12/21/2015
Publication #:
Pub Dt:
04/14/2016
Title:
APPARATUSES AND METHODS INCLUDING SELECTIVELY PROVIDING A SINGLE OR SEPARATE CHIP SELECT SIGNALS
71
Patent #:
Issue Dt:
09/05/2017
Application #:
14976677
Filing Dt:
12/21/2015
Publication #:
Pub Dt:
04/21/2016
Title:
PHOTONICS GRATING COUPLER AND METHOD OF MANUFACTURE
72
Patent #:
Issue Dt:
02/28/2017
Application #:
14977088
Filing Dt:
12/21/2015
Publication #:
Pub Dt:
04/21/2016
Title:
SETTING A DEFAULT READ SIGNAL BASED ON ERROR CORRECTION
73
Patent #:
Issue Dt:
02/27/2018
Application #:
14977286
Filing Dt:
12/21/2015
Publication #:
Pub Dt:
06/22/2017
Title:
CONTROL OF SENSING COMPONENTS IN ASSOCIATION WITH PERFORMING OPERATIONS
74
Patent #:
Issue Dt:
06/06/2017
Application #:
14977411
Filing Dt:
12/21/2015
Publication #:
Pub Dt:
06/09/2016
Title:
APPARATUSES AND METHODS OF READING MEMORY CELLS BASED ON RESPONSE TO A TEST PULSE
75
Patent #:
Issue Dt:
07/24/2018
Application #:
14978583
Filing Dt:
12/22/2015
Publication #:
Pub Dt:
07/07/2016
Title:
LONGEST ELEMENT LENGTH DETERMINATION IN MEMORY
76
Patent #:
Issue Dt:
08/28/2018
Application #:
14980024
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
07/07/2016
Title:
GENERATING AND EXECUTING A CONTROL FLOW
77
Patent #:
Issue Dt:
10/03/2017
Application #:
14980592
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
06/29/2017
Title:
APPARATUSES AND METHODS FOR EXITING LOW POWER STATES IN MEMORY DEVICES
78
Patent #:
Issue Dt:
07/04/2017
Application #:
14980819
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
04/28/2016
Title:
NON-VOLATILE MEMORY, SYSTEM, AND METHOD
79
Patent #:
Issue Dt:
12/26/2017
Application #:
14981180
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
06/29/2017
Title:
TEST MODE CIRCUIT FOR MEMORY APPARATUS
80
Patent #:
Issue Dt:
07/11/2017
Application #:
14981198
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
05/12/2016
Title:
INTEGRATED CIRCUITRY COMPRISING NONVOLATILE MEMORY CELLS AND METHODS OF FORMING A NONVOLATILE MEMORY CELL
81
Patent #:
Issue Dt:
12/27/2016
Application #:
14981221
Filing Dt:
12/28/2015
Publication #:
Pub Dt:
04/28/2016
Title:
APPARATUSES HAVING A FERROELECTRIC FIELD-EFFECT TRANSISTOR MEMORY ARRAY AND RELATED METHOD
82
Patent #:
Issue Dt:
04/03/2018
Application #:
14982196
Filing Dt:
12/29/2015
Publication #:
Pub Dt:
06/29/2017
Title:
STACKED SEMICONDUCTOR DIES WITH SELECTIVE CAPILLARY UNDER FILL
83
Patent #:
Issue Dt:
09/13/2016
Application #:
14982362
Filing Dt:
12/29/2015
Publication #:
Pub Dt:
05/12/2016
Title:
CONNECTIONS FOR MEMORY ELECTRODE LINES
84
Patent #:
Issue Dt:
08/23/2016
Application #:
14982810
Filing Dt:
12/29/2015
Publication #:
Pub Dt:
04/28/2016
Title:
Memory Cells, Methods of Forming Memory Cells, and Methods of Programming Memory Cells
85
Patent #:
Issue Dt:
08/16/2016
Application #:
14984354
Filing Dt:
12/30/2015
Publication #:
Pub Dt:
04/28/2016
Title:
REDISTRIBUTION LAYERS FOR MICROFEATURE WORKPIECES, AND ASSOCIATED SYSTEMS AND METHODS
86
Patent #:
NONE
Issue Dt:
Application #:
14984955
Filing Dt:
12/30/2015
Publication #:
Pub Dt:
07/06/2017
Title:
METHODS AND SYSTEMS FOR VECTOR LENGTH MANAGEMENT
87
Patent #:
Issue Dt:
09/27/2016
Application #:
14986329
Filing Dt:
12/31/2015
Publication #:
Pub Dt:
06/23/2016
Title:
APPARATUSES AND/OR METHODS FOR OPERATING A MEMORY CELL AS AN ANTI-FUSE
88
Patent #:
Issue Dt:
11/22/2016
Application #:
14986478
Filing Dt:
12/31/2015
Publication #:
Pub Dt:
04/28/2016
Title:
APPARATUSES AND METHODS FOR PROVIDING OSCILLATION SIGNALS
89
Patent #:
NONE
Issue Dt:
Application #:
14986757
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
06/02/2016
Title:
FORMING MEMORY USING HIGH POWER IMPULSE MAGNETRON SPUTTERING
90
Patent #:
Issue Dt:
01/01/2019
Application #:
14987147
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
05/12/2016
Title:
3D MEMORY
91
Patent #:
Issue Dt:
08/30/2016
Application #:
14987355
Filing Dt:
01/04/2016
Title:
INPUT BUFFER
92
Patent #:
Issue Dt:
09/05/2017
Application #:
14987370
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
04/28/2016
Title:
CHARGE STORAGE APPARATUS AND METHODS
93
Patent #:
Issue Dt:
08/30/2016
Application #:
14987613
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
04/28/2016
Title:
Semiconductor Constructions and NAND Unit Cells
94
Patent #:
Issue Dt:
09/26/2017
Application #:
14987630
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
04/28/2016
Title:
MEMORY PROGRAMMING METHODS AND MEMORY SYSTEMS
95
Patent #:
Issue Dt:
02/21/2017
Application #:
14987637
Filing Dt:
01/04/2016
Publication #:
Pub Dt:
04/28/2016
Title:
Memory Devices, Memory Device Operational Methods, and Memory Device Implementation Methods
96
Patent #:
Issue Dt:
07/09/2019
Application #:
14989097
Filing Dt:
01/06/2016
Publication #:
Pub Dt:
07/14/2016
Title:
SOURCE MATERIAL FOR ELECTRONIC DEVICE APPLICATIONS
97
Patent #:
Issue Dt:
04/24/2018
Application #:
14989264
Filing Dt:
01/06/2016
Publication #:
Pub Dt:
07/06/2017
Title:
ERROR CODE CALCULATION ON SENSING CIRCUITRY
98
Patent #:
Issue Dt:
06/27/2017
Application #:
14989556
Filing Dt:
01/06/2016
Publication #:
Pub Dt:
04/28/2016
Title:
MAGNETIC TUNNEL JUNCTIONS AND METHODS OF FORMING MAGNETIC TUNNEL JUNCTIONS
99
Patent #:
Issue Dt:
08/30/2016
Application #:
14989625
Filing Dt:
01/06/2016
Publication #:
Pub Dt:
04/28/2016
Title:
SWITCHING COMPONENTS AND MEMORY UNITS
100
Patent #:
Issue Dt:
05/09/2017
Application #:
14989678
Filing Dt:
01/06/2016
Publication #:
Pub Dt:
04/28/2016
Title:
APPARATUSES, CIRCUITS, AND METHODS FOR BIASING SIGNAL LINES
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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