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Reel/Frame:039138/0001   Pages: 501
Recorded: 06/16/2016
Attorney Dkt #:F163476
Conveyance: SUPPLEMENT TO THE SECURITY AGREEMENT
Total properties: 5800
Page 18 of 59
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59
1
Patent #:
Issue Dt:
11/16/2010
Application #:
11781610
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
01/29/2009
Title:
SOURCE/DRAIN STRESSORS FORMED USING IN-SITU EPITAXIAL GROWTH
2
Patent #:
Issue Dt:
03/22/2011
Application #:
11782319
Filing Dt:
07/24/2007
Publication #:
Pub Dt:
01/29/2009
Title:
PROCESS FOR MAKING A SEMICONDUCTOR DEVICE USING PARTIAL ETCHING
3
Patent #:
Issue Dt:
03/20/2012
Application #:
11785610
Filing Dt:
04/19/2007
Publication #:
Pub Dt:
10/23/2008
Title:
SYSTEM AND METHOD FOR OPERATING A COMMUNICATIONS SYSTEM
4
Patent #:
Issue Dt:
08/07/2012
Application #:
11788184
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/23/2008
Title:
SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER
5
Patent #:
Issue Dt:
02/09/2010
Application #:
11788216
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/23/2008
Title:
METHOD TO SELECTIVELY MODULATE GATE WORK FUNCTION THROUGH SELECTIVE GE CONDENSATION AND HIGH-K DIELECTRIC LAYER
6
Patent #:
Issue Dt:
09/04/2012
Application #:
11800204
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
METHOD TO IMPROVE SOURCE/DRAIN PARASITICS IN VERTICAL DEVICES
7
Patent #:
Issue Dt:
11/03/2009
Application #:
11803097
Filing Dt:
05/11/2007
Publication #:
Pub Dt:
11/13/2008
Title:
METHOD TO CONTROL UNIFORMITY/COMPOSITION OF METAL ELECTRODES, SILICIDES ON TOPOGRAPHY AND DEVICES USING THIS METHOD
8
Patent #:
Issue Dt:
04/26/2011
Application #:
11807745
Filing Dt:
05/29/2007
Publication #:
Pub Dt:
12/04/2008
Title:
METHOD TO FORM A VIA
9
Patent #:
Issue Dt:
08/23/2011
Application #:
11807777
Filing Dt:
05/29/2007
Publication #:
Pub Dt:
12/04/2008
Title:
METHOD FOR FORMING INTERCONNECTS FOR 3-D APPLICATIONS
10
Patent #:
Issue Dt:
05/18/2010
Application #:
11811407
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
04/17/2008
Title:
SYSTEM AND METHOD FOR ELECTROMIGRATION TOLERANT CELL SYNTHESIS
11
Patent #:
Issue Dt:
02/24/2009
Application #:
11811547
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
CURRENT-MODE MEMORY CELL
12
Patent #:
Issue Dt:
08/21/2012
Application #:
11816037
Filing Dt:
04/03/2008
Publication #:
Pub Dt:
01/29/2009
Title:
DEVICE HAVING FAILURE RECOVERY CAPABILITIES AND A METHOD FOR FAILURE RECOVERY
13
Patent #:
Issue Dt:
05/27/2014
Application #:
11816038
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
06/19/2008
Title:
LEAD-FRAME CIRCUIT PACKAGE
14
Patent #:
Issue Dt:
09/13/2011
Application #:
11816040
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
04/24/2008
Title:
CONTROL APPARATUS AND METHOD OF REGULATING POWER
15
Patent #:
Issue Dt:
08/25/2009
Application #:
11825953
Filing Dt:
07/10/2007
Publication #:
Pub Dt:
01/15/2009
Title:
DISPOSABLE ORGANIC SPACERS
16
Patent #:
Issue Dt:
04/13/2010
Application #:
11828023
Filing Dt:
07/25/2007
Publication #:
Pub Dt:
01/29/2009
Title:
TECHNIQUES FOR DETECTING OPEN INTEGRATED CIRCUIT PINS
17
Patent #:
Issue Dt:
11/03/2009
Application #:
11829153
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/29/2009
Title:
SPEEDPATH REPAIR IN AN INTEGRATED CIRCUIT
18
Patent #:
Issue Dt:
10/21/2008
Application #:
11830577
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD FOR MANUFACTURING A PASSIVE INTEGRATED MATCHING NETWORK FOR POWER AMPLIFIERS
19
Patent #:
Issue Dt:
09/21/2010
Application #:
11831394
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD
20
Patent #:
Issue Dt:
05/14/2013
Application #:
11831400
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
ISOLATION TRENCH PROCESSING FOR STRAIN CONTROL
21
Patent #:
Issue Dt:
07/10/2012
Application #:
11831651
Filing Dt:
07/31/2007
Publication #:
Pub Dt:
02/05/2009
Title:
REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE
22
Patent #:
Issue Dt:
04/17/2012
Application #:
11833360
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/14/2008
Title:
MULTI-MODE TRANSCEIVER HAVING TUNABLE HARMONIC TERMINATION CIRCUIT AND METHOD THEREFOR
23
Patent #:
Issue Dt:
05/25/2010
Application #:
11833545
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/05/2009
Title:
METHOD AND CIRCUIT FOR PREVENTING HIGH VOLTAGE MEMORY DISTURB
24
Patent #:
Issue Dt:
12/30/2008
Application #:
11834391
Filing Dt:
08/06/2007
Publication #:
Pub Dt:
01/24/2008
Title:
ELECTRONIC DEVICE INCLUDING A MEMORY ARRAY AND CONDUCTIVE LINES
25
Patent #:
Issue Dt:
09/21/2010
Application #:
11835547
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
METHOD FOR MAKING A TRANSISTOR WITH A STRESSOR
26
Patent #:
Issue Dt:
10/12/2010
Application #:
11835548
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
FINFET MEMORY CELL HAVING A FLOATING GATE AND METHOD THEREFOR
27
Patent #:
Issue Dt:
07/14/2009
Application #:
11835552
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
LEVEL SHIFTER
28
Patent #:
Issue Dt:
07/14/2009
Application #:
11835643
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A DOPED SEMICONDUCTOR LAYER
29
Patent #:
Issue Dt:
06/14/2011
Application #:
11835680
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
STRESS RELIEF OF A SEMICONDUCTOR DEVICE
30
Patent #:
Issue Dt:
06/22/2010
Application #:
11837587
Filing Dt:
08/13/2007
Title:
DEVICE AND METHOD FOR COMPENSATING FOR GROUND VOLTAGE ELEVATIONS
31
Patent #:
Issue Dt:
09/28/2010
Application #:
11838696
Filing Dt:
08/14/2007
Publication #:
Pub Dt:
02/19/2009
Title:
MODE TRANSITIONING IN A DC/DC CONVERTER USING A CONSTANT DUTY CYCLE DIFFERENCE
32
Patent #:
Issue Dt:
02/22/2011
Application #:
11846527
Filing Dt:
08/29/2007
Publication #:
Pub Dt:
03/27/2008
Title:
METHOD AND SYSTEM OF EXECUTING A SOFTWARE APPLICATION IN HIGHLY CONSTRAINED MEMORY SITUATION
33
Patent #:
Issue Dt:
11/23/2010
Application #:
11846874
Filing Dt:
08/29/2007
Publication #:
Pub Dt:
03/05/2009
Title:
INTERCONNECT IN A MULTI-ELEMENT PACKAGE
34
Patent #:
Issue Dt:
09/01/2009
Application #:
11847424
Filing Dt:
08/30/2007
Publication #:
Pub Dt:
03/05/2009
Title:
FLIP-FLOP HAVING LOGIC STATE RETENTION DURING A POWER DOWN MODE AND METHOD THEREFOR
35
Patent #:
Issue Dt:
05/10/2011
Application #:
11849124
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
01/29/2009
Title:
RF CIRCUIT WITH CONTROL UNIT TO REDUCE SIGNAL POWER UNDER APPROPRIATE CONDITIONS
36
Patent #:
Issue Dt:
10/13/2009
Application #:
11849155
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
VOLTAGE REGULATOR FOR INTEGRATED CIRCUITS
37
Patent #:
Issue Dt:
01/06/2009
Application #:
11849301
Filing Dt:
09/03/2007
Title:
METHOD OF FORMING FLIP-CHIP BUMP CARRIER TYPE PACKAGE
38
Patent #:
Issue Dt:
01/24/2012
Application #:
11849375
Filing Dt:
09/04/2007
Publication #:
Pub Dt:
03/05/2009
Title:
CACHE MEMORY AND A METHOD FOR SERVICING ACCESS REQUESTS
39
Patent #:
Issue Dt:
12/13/2011
Application #:
11849551
Filing Dt:
09/04/2007
Publication #:
Pub Dt:
03/05/2009
Title:
FAST PREDICTIVE AUTOMATIC GAIN CONTROL FOR DYNAMIC RANGE REDUCTION IN WIRELESS COMMUNICATION RECEIVER
40
Patent #:
Issue Dt:
03/03/2009
Application #:
11851380
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
04/03/2008
Title:
SYSTEM AND METHOD FOR MONITORING CLOCK SIGNAL IN AN INTEGRATED CIRCUIT
41
Patent #:
Issue Dt:
07/15/2008
Application #:
11851381
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
04/17/2008
Title:
MILLER CAPACITANCE TOLERANT BUFFER ELEMENT
42
Patent #:
Issue Dt:
11/03/2009
Application #:
11851383
Filing Dt:
09/06/2007
Publication #:
Pub Dt:
04/10/2008
Title:
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION IN A LOW-DENSITY PARITY-CHECK (LDPC) DECODER
43
Patent #:
Issue Dt:
04/27/2010
Application #:
11851857
Filing Dt:
09/07/2007
Publication #:
Pub Dt:
03/12/2009
Title:
SUBSTRATE HAVING THROUGH-WAFER VIAS AND METHOD OF FORMING
44
Patent #:
Issue Dt:
05/15/2012
Application #:
11851879
Filing Dt:
09/07/2007
Title:
EFFICIENT TRANSCODING BETWEEN FORMATS USING MACROBLOCK BUFFER
45
Patent #:
Issue Dt:
04/15/2014
Application #:
11851912
Filing Dt:
09/07/2007
Title:
ARCHITECTURE FOR MULTIPLE GRAPHICS PLANES
46
Patent #:
Issue Dt:
07/09/2013
Application #:
11851924
Filing Dt:
09/07/2007
Title:
GRAPHICS OVERLAY SYSTEM FOR MULTIPLE DISPLAYS USING COMPRESSED VIDEO
47
Patent #:
Issue Dt:
03/20/2012
Application #:
11851933
Filing Dt:
09/07/2007
Title:
METHOD FOR CONVERSION BETWEEN YUV 4:4:4 AND YUV 4:2:0
48
Patent #:
Issue Dt:
11/22/2011
Application #:
11852199
Filing Dt:
09/07/2007
Title:
PERCEPTUALLY ADAPTIVE QUANTIZATION PARAMETER SELECTION
49
Patent #:
Issue Dt:
08/17/2010
Application #:
11852396
Filing Dt:
09/10/2007
Publication #:
Pub Dt:
03/12/2009
Title:
ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
50
Patent #:
Issue Dt:
09/09/2008
Application #:
11853939
Filing Dt:
09/12/2007
Title:
VOLTAGE REGULATOR AND METHOD FOR PROVIDING A REGULATED OUTPUT
51
Patent #:
Issue Dt:
05/04/2010
Application #:
11854088
Filing Dt:
09/12/2007
Publication #:
Pub Dt:
03/12/2009
Title:
LATCH DEVICE HAVING LOW-POWER DATA RETENTION
52
Patent #:
Issue Dt:
04/14/2009
Application #:
11854363
Filing Dt:
09/12/2007
Publication #:
Pub Dt:
01/03/2008
Title:
SEMICONDUCTOR STORAGE DEVICE
53
Patent #:
Issue Dt:
06/21/2011
Application #:
11854547
Filing Dt:
09/13/2007
Publication #:
Pub Dt:
04/17/2008
Title:
SYSTEM AND METHOD FOR TESTING MEMORY BLOCKS IN AN SOC DESIGN
54
Patent #:
Issue Dt:
01/14/2014
Application #:
11854630
Filing Dt:
09/13/2007
Publication #:
Pub Dt:
03/19/2009
Title:
SIMD DOT PRODUCT OPERATIONS WITH OVERLAPPED OPERANDS
55
Patent #:
Issue Dt:
08/17/2010
Application #:
11855557
Filing Dt:
09/14/2007
Publication #:
Pub Dt:
03/19/2009
Title:
METHOD OF REMOVING DEFECTS FROM A DIELECTRIC MATERIAL IN A SEMICONDUCTOR
56
Patent #:
Issue Dt:
02/02/2010
Application #:
11855706
Filing Dt:
09/14/2007
Publication #:
Pub Dt:
03/19/2009
Title:
BUS INTERCONNECT WITH FLOW CONTROL
57
Patent #:
Issue Dt:
01/18/2011
Application #:
11857122
Filing Dt:
09/18/2007
Publication #:
Pub Dt:
01/10/2008
Title:
METHOD AND APPARATUS FOR MOBILITY ENHANCEMENT IN A SEMICONDUCTOR DEVICE
58
Patent #:
Issue Dt:
05/10/2011
Application #:
11859696
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
03/26/2009
Title:
SDRAM SHARING USING A CONTROL SURROGATE
59
Patent #:
Issue Dt:
09/28/2010
Application #:
11860125
Filing Dt:
09/24/2007
Publication #:
Pub Dt:
03/26/2009
Title:
WARPAGE CONTROL USING A PACKAGE CARRIER ASSEMBLY
60
Patent #:
Issue Dt:
06/02/2009
Application #:
11863961
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
01/24/2008
Title:
INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION
61
Patent #:
Issue Dt:
10/12/2010
Application #:
11864246
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
04/02/2009
Title:
PHASE CHANGE MEMORY STRUCTURES
62
Patent #:
Issue Dt:
05/18/2010
Application #:
11864257
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
04/02/2009
Title:
PHASE CHANGE MEMORY STRUCTURES INCLUDING PILLARS
63
Patent #:
Issue Dt:
04/06/2010
Application #:
11864274
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
04/02/2009
Title:
MOSFET STRUCTURE AND METHOD OF MANUFACTURE
64
Patent #:
Issue Dt:
03/26/2013
Application #:
11864292
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
04/02/2009
Title:
SYSTEM AND METHOD FOR MONITORING DEBUG EVENTS
65
Patent #:
Issue Dt:
04/28/2009
Application #:
11865495
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
01/24/2008
Title:
STORAGE CIRCUIT AND METHOD THEREFOR
66
Patent #:
Issue Dt:
05/11/2010
Application #:
11865991
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
04/02/2009
Title:
PROGRAMMABLE ROM USING TWO BONDED STRATA
67
Patent #:
Issue Dt:
06/19/2012
Application #:
11868711
Filing Dt:
10/08/2007
Publication #:
Pub Dt:
04/09/2009
Title:
CLOCK CIRCUIT WITH CLOCK TRANSFER CAPABILITY AND METHOD
68
Patent #:
Issue Dt:
03/31/2009
Application #:
11869750
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
05/08/2008
Title:
A COMPARATOR CIRCUIT FOR REDUCING CURRENT CONSUMPTION BY SUPPRESSING GLITCHES DURING A TRANSITIONAL PERIOD
69
Patent #:
Issue Dt:
02/15/2011
Application #:
11870259
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
04/16/2009
Title:
VARIABLE LOAD, VARIABLE OUTPUT CHARGE-BASED VOLTAGE MULTIPLIERS
70
Patent #:
Issue Dt:
12/29/2009
Application #:
11870733
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
04/16/2009
Title:
CRYSTAL OSCILLATOR CIRCUIT HAVING FAST START-UP AND METHOD THEREFOR
71
Patent #:
Issue Dt:
11/04/2008
Application #:
11873099
Filing Dt:
10/16/2007
Title:
LEVEL SHIFTER
72
Patent #:
Issue Dt:
03/10/2009
Application #:
11873424
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
07/10/2008
Title:
LEVEL SHIFTER CIRCUIT
73
Patent #:
Issue Dt:
01/11/2011
Application #:
11874400
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
TOUCH PANEL DETECTION CIRCUITRY AND METHOD OF OPERATION
74
Patent #:
Issue Dt:
03/30/2010
Application #:
11875997
Filing Dt:
10/22/2007
Publication #:
Pub Dt:
04/23/2009
Title:
INTEGRATED CIRCUIT MEMORY HAVING DYNAMICALLY ADJUSTABLE READ MARGIN AND METHOD THEREFOR
75
Patent #:
Issue Dt:
08/25/2009
Application #:
11888576
Filing Dt:
08/01/2007
Publication #:
Pub Dt:
02/05/2009
Title:
A METHOD OF MEASURING THIN LAYERS USING SIMS
76
Patent #:
Issue Dt:
10/30/2012
Application #:
11897872
Filing Dt:
08/31/2007
Publication #:
Pub Dt:
03/05/2009
Title:
ADAPTIVE FILTER FOR USE IN ECHO REDUCTION
77
Patent #:
Issue Dt:
05/10/2011
Application #:
11909394
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
10/01/2009
Title:
METHOD FOR RACE PREVENTION AND A DEVICE HAVING RACE PREVENTION CAPABILITIES
78
Patent #:
Issue Dt:
08/16/2011
Application #:
11909398
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
12/09/2010
Title:
CHARGE PUMP AND CONTROL SCHEME
79
Patent #:
Issue Dt:
02/01/2011
Application #:
11910062
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
10/30/2008
Title:
METHOD FOR NOISE REDUCTION IN A PHASE LOCKED LOOP AND A DEVICE HAVING NOISE REDUCTION CAPABILITIES
80
Patent #:
Issue Dt:
01/10/2012
Application #:
11910069
Filing Dt:
09/28/2007
Publication #:
Pub Dt:
08/14/2008
Title:
SYSTEM AND METHOD FOR REDUCING POWER CONSUMPTION OF A TRANSISTOR-BASED CIRCUIT HAVING MULTIPLE OPERATIONAL MODES CHARACTERIZED BY DIFFERENT POWER CONSUMPTION LEVEL
81
Patent #:
Issue Dt:
08/31/2010
Application #:
11910367
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
08/28/2008
Title:
VOLTAGE CONVERTER APPARATUS AND METHOD THEREFOR
82
Patent #:
Issue Dt:
04/13/2010
Application #:
11910371
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
08/14/2008
Title:
ELECTRONIC SWITCH CIRCUIT, CONVERTER AND METHOD OF OPERATION
83
Patent #:
Issue Dt:
12/21/2010
Application #:
11911805
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
08/28/2008
Title:
CURRENT DRIVER CIRCUIT AND METHOD OF OPERATION THEREFOR
84
Patent #:
Issue Dt:
03/12/2013
Application #:
11911807
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
08/28/2008
Title:
CURRENT DRIVER CIRCUIT AND METHOD OF OPERATION THEREFOR
85
Patent #:
Issue Dt:
05/04/2010
Application #:
11911930
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
09/04/2008
Title:
ADAPTIVE PROTECTION CIRCUIT FOR A POWER AMPLIFIER
86
Patent #:
Issue Dt:
07/20/2010
Application #:
11913441
Filing Dt:
11/02/2007
Publication #:
Pub Dt:
08/28/2008
Title:
INTEGRATED CIRCUIT AND A METHOD FOR DESIGNING A BOUNDARY SCAN SUPER-CELL
87
Patent #:
Issue Dt:
09/13/2011
Application #:
11914079
Filing Dt:
11/09/2007
Publication #:
Pub Dt:
08/28/2008
Title:
METHOD FOR POWER REDUCTION AND A DEVICE HAVING POWER REDUCTION CAPABILITIES
88
Patent #:
Issue Dt:
11/23/2010
Application #:
11914669
Filing Dt:
11/16/2007
Publication #:
Pub Dt:
05/21/2009
Title:
METHOD OF DISTANCING A BUBBLE AND BUBBLE DISPLACEMENT APPARATUS
89
Patent #:
Issue Dt:
03/30/2010
Application #:
11914700
Filing Dt:
11/16/2007
Publication #:
Pub Dt:
05/21/2009
Title:
METHOD AND DEVICE FOR HIGH SPEED TESTING OF AN INTEGRATED CIRCUIT
90
Patent #:
Issue Dt:
05/10/2011
Application #:
11914870
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
09/11/2008
Title:
CLEANING SOLUTION FOR A SEMICONDUCTOR WAFER
91
Patent #:
Issue Dt:
01/24/2012
Application #:
11914873
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
10/16/2008
Title:
METHOD AND DEVICE FOR PROCESSING IMAGE DATA STORED IN A FRAME BUFFER
92
Patent #:
Issue Dt:
03/09/2010
Application #:
11914878
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
08/14/2008
Title:
TREATMENT SOLUTION AND METHOD OF APPLYING A PASSIVATING LAYER
93
Patent #:
Issue Dt:
10/07/2014
Application #:
11916711
Filing Dt:
04/08/2008
Publication #:
Pub Dt:
08/21/2008
Title:
HYBRID METHOD AND DEVICE FOR TRANSMITTING PACKETS
94
Patent #:
Issue Dt:
06/02/2015
Application #:
11917108
Filing Dt:
07/18/2008
Publication #:
Pub Dt:
12/18/2008
Title:
DEVICE AND METHOD FOR MEDIA ACCESS CONTROL
95
Patent #:
Issue Dt:
07/17/2012
Application #:
11917111
Filing Dt:
07/18/2008
Publication #:
Pub Dt:
07/09/2009
Title:
METHOD AND DEVICE FOR FRAME SYNCHRONIZATION
96
Patent #:
Issue Dt:
08/30/2011
Application #:
11917888
Filing Dt:
12/17/2007
Publication #:
Pub Dt:
08/21/2008
Title:
TWISTED PAIR COMMUNICATION SYSTEM, APPARATUS AND METHOD THEREOF
97
Patent #:
Issue Dt:
05/15/2012
Application #:
11926323
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SPLIT GATE DEVICE AND METHOD FOR FORMING
98
Patent #:
Issue Dt:
06/29/2010
Application #:
11926348
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD FOR INTEGRATING NVM CIRCUITRY WITH LOGIC CIRCUITRY
99
Patent #:
Issue Dt:
01/11/2011
Application #:
11928314
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
ELECTRONIC DEVICE COMPRISING A GATE ELECTRODE INCLUDING A METAL-CONTAINING LAYER HAVING ONE OR MORE IMPURITIES
100
Patent #:
Issue Dt:
09/28/2010
Application #:
11929194
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
CIRCUIT FOR PROVIDING AN APPROXIMATELY CONSTANT RESISTANCE AND/OR CURRENT AND METHOD THEREFOR
Assignor
1
Exec Dt:
05/25/2016
Assignee
1
1300 THAMES STREET, 4TH FLOOR
THAMES STREET WHARF
BALTIMORE, MARYLAND 21231
Correspondence name and address
DARLENA BARI STARK
1025 VERMONT AVE NW, SUITE 1130
NATIONAL CORPORATE RESEARCH, LTD.
WASHINGTON, DC 20005

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