|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09878681
|
Filing Dt:
|
06/11/2001
|
Publication #:
|
|
Pub Dt:
|
04/18/2002
| | | | |
Title:
|
SILICON-ON-INSULATOR CHIP HAVING AN ISOLATION BARRIER FOR RELIABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2004
|
Application #:
|
09878804
|
Filing Dt:
|
06/11/2001
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
Title:
|
SEMICONDUCTOR CHIP HAVING BOTH COMPACT MEMORY AND HIGH PERFORMANCE LOGIC
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09878845
|
Filing Dt:
|
06/11/2001
|
Publication #:
|
|
Pub Dt:
|
10/11/2001
| | | | |
Title:
|
Transfer layer repair process for attenuated masks
|
|
|
Patent #:
|
|
Issue Dt:
|
06/03/2003
|
Application #:
|
09878930
|
Filing Dt:
|
06/12/2001
|
Publication #:
|
|
Pub Dt:
|
02/21/2002
| | | | |
Title:
|
HETEROJUNCTION BIPOLAR TRANSISTOR WITH SILICON-GERMANIUM BASE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
09879105
|
Filing Dt:
|
06/13/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) GATE STACK WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRIC AND INTEGRATED DIFFUSION BARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09879530
|
Filing Dt:
|
06/12/2001
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
Title:
|
METHOD AND STRUCTURE FOR BURIED CIRCUITS AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09879579
|
Filing Dt:
|
06/12/2001
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
Title:
|
COMPACT BODY FOR SILICON-ON-INSULATOR TRANSISTORS REQUIRING NO ADDITIONAL LAYOUT AREA
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
09879590
|
Filing Dt:
|
06/12/2001
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
Title:
|
METHOD OF MANUFACTURING DUAL GATE LOGIC DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/05/2005
|
Application #:
|
09879653
|
Filing Dt:
|
06/12/2001
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
Title:
|
UNIFIED SRAM CACHE SYSTEM FOR AN EMBEDDED DRAM SYSTEM HAVING A MICRO-CELL ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2003
|
Application #:
|
09880598
|
Filing Dt:
|
06/13/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
TIMING CIRCUIT AND METHOD FOR A COMPILABLE DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09881070
|
Filing Dt:
|
06/14/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
STRUCTURE HAVING EMBEDDED FLUSH CIRCUITRY FEATURES AND METHOD OF FABRICATING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09881466
|
Filing Dt:
|
06/14/2001
|
Publication #:
|
|
Pub Dt:
|
10/11/2001
| | | | |
Title:
|
METHOD FOR PREVENTING ADHESIVE BLEED ONTO SURFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09881817
|
Filing Dt:
|
06/18/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
METHOD OF CONTROLLING ADDITIVES IN COPPER PLATING BATHS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2006
|
Application #:
|
09882006
|
Filing Dt:
|
06/15/2001
|
Publication #:
|
|
Pub Dt:
|
04/10/2003
| | | | |
Title:
|
NOISE REMOVAL IN MULTIBYTE TEXT ENCODINGS USING STATISTICAL MODELS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/27/2002
|
Application #:
|
09882095
|
Filing Dt:
|
06/15/2001
|
Title:
|
SURFACE ENGINEERING TO PREVENT EPI GROWTH ON GATE POLY DURING SELECTIVE EPI PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2003
|
Application #:
|
09882250
|
Filing Dt:
|
06/15/2001
|
Title:
|
ANTI-SPACER STRUCTURE FOR IMPROVED GATE ACTIVATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09882749
|
Filing Dt:
|
06/15/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
HIGH-DIELECTRIC CONSTANT INSULATORS FOR FEOL CAPACITORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2003
|
Application #:
|
09883433
|
Filing Dt:
|
06/18/2001
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
Title:
|
METHOD FOR FORMING AN ANTENNA AND A RADIO FREQUENCY TRANSPONDER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09883981
|
Filing Dt:
|
06/20/2001
|
Publication #:
|
|
Pub Dt:
|
11/01/2001
| | | | |
Title:
|
Low cost shallow trench isolation using non-conformal dielectric material
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09884670
|
Filing Dt:
|
06/19/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
Divot reduction in SIMOX layers
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2006
|
Application #:
|
09884778
|
Filing Dt:
|
06/19/2001
|
Publication #:
|
|
Pub Dt:
|
12/19/2002
| | | | |
Title:
|
METHOD AND APPARATUS TO ESTABLISH CIRCUIT LAYERS INTERCONNECTIONS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09885792
|
Filing Dt:
|
06/20/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
Non-self-aligned SiGe heterojunction bipolar transistor
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
09885853
|
Filing Dt:
|
06/20/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
EXTENSION OF FATIGUE LIFE FOR C4 SOLDER BALL TO CHIP CONNECTION
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09886192
|
Filing Dt:
|
06/21/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
Data storage on a computer disk array
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
09886823
|
Filing Dt:
|
06/21/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
DOUBLE GATED VERTICAL TRANSISTOR WITH DIFFERENT FIRST AND SECOND GATE MATERIALS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09887472
|
Filing Dt:
|
06/25/2001
|
Publication #:
|
|
Pub Dt:
|
10/25/2001
| | | | |
Title:
|
Planar mixed SOI-bulk substrate for microelectronic applications
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/2004
|
Application #:
|
09887792
|
Filing Dt:
|
06/22/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
PROCESS INDEPENDENT SOURCE SYNCHRONOUS DATA CAPTURE APPARATUS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09888777
|
Filing Dt:
|
06/25/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
HIGH MOBILITY FETS USING AL2O3 AS A GATE OXIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09892026
|
Filing Dt:
|
06/26/2001
|
Publication #:
|
|
Pub Dt:
|
12/26/2002
| | | | |
Title:
|
REDUNDANT MEMORY ARRAY HAVING DUAL-USE REPAIR ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09892234
|
Filing Dt:
|
06/26/2001
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
Title:
|
POROUS DIELECTRIC MATERIAL AND ELECTRONIC DEVICES FABRICATED THEREWITH
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2003
|
Application #:
|
09892396
|
Filing Dt:
|
06/27/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
SAVING CONTENT ADDRESSABLE MEMORY POWER THROUGH CONDITIONAL COMPARISONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09893206
|
Filing Dt:
|
06/27/2001
|
Title:
|
PROCESS OF CLEANING SEMICONDUCTOR PROCESSING, HANDLING AND MANUFACTURING EQUIPMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2002
|
Application #:
|
09893208
|
Filing Dt:
|
06/27/2001
|
Title:
|
PROCESS AND APPARATUS FOR CLEANING FILTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09894336
|
Filing Dt:
|
06/28/2001
|
Title:
|
BURIED STRAP FOR DRAM USING JUNCTION ISOLATION TECHNIQUE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
09894337
|
Filing Dt:
|
06/28/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
PROCESS FOR FORMING FUSIBLE LINKS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09894692
|
Filing Dt:
|
06/28/2001
|
Publication #:
|
|
Pub Dt:
|
11/01/2001
| | | | |
Title:
|
MICRO-FLEX TECHNOLOGY IN SEMICONDUCTOR PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09894706
|
Filing Dt:
|
06/28/2001
|
Publication #:
|
|
Pub Dt:
|
11/08/2001
| | | | |
Title:
|
MICRO-FLEX TECHNOLOGY IN SEMICONDUCTOR PACKAGES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09895198
|
Filing Dt:
|
07/02/2001
|
Publication #:
|
|
Pub Dt:
|
11/01/2001
| | | | |
Title:
|
Lateral patterning
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2003
|
Application #:
|
09895624
|
Filing Dt:
|
06/28/2001
|
Title:
|
PROCESS FOR USING BILAYER PHOTORESIST
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2003
|
Application #:
|
09895650
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
THERMAL PASTE FOR LOW TEMPERATURE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
09895672
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
STRUCTURE AND METHODS FOR PROCESS INTEGRATION IN VERTICAL DRAM CELL FABRICATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09896204
|
Filing Dt:
|
06/29/2001
|
Title:
|
DUAL-RIE STRUCTURE FOR VIA/LINE INTERCONNECTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
09896538
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
THIOPHENE-CONTAINING PHOTO ACID GENERATORS FOR PHOTOLITHOGRAPHY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
09896745
|
Filing Dt:
|
06/29/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR WRITING OPERATION IN SRAM CELLS EMPLOYING PFETS PASS GATES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
09897200
|
Filing Dt:
|
07/02/2001
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
Title:
|
SEMICONDUCTOR DEVICES CONTAINING A DISCONTINUOUS CAP LAYER AND METHODS FOR FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09897868
|
Filing Dt:
|
07/02/2001
|
Title:
|
STRUCTURE AND METHOD OF FABRICATING EMBEDDED VERTICAL DRAM ARRAYS WITH SILICIDED BITLINE AND POLYSILICON INTERCONNECT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2005
|
Application #:
|
09898039
|
Filing Dt:
|
07/05/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
METHOD OF FORMING LATTICE-MATCHED STRUCTURE ON SILICON AND STRUCTURE FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09898434
|
Filing Dt:
|
07/03/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
INTEGRATED REDUNDANCY ARCHITECTURE SYSTEM FOR AN EMBEDDED DRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
09899957
|
Filing Dt:
|
07/06/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
METHOD OF CONTROLLING FLOATING BODY EFFECTS IN AN ASYMMETRICAL SOI DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09900302
|
Filing Dt:
|
07/06/2001
|
Publication #:
|
|
Pub Dt:
|
01/09/2003
| | | | |
Title:
|
Logic or circuit
|
|
|
Patent #:
|
|
Issue Dt:
|
05/21/2002
|
Application #:
|
09901848
|
Filing Dt:
|
07/09/2001
|
Publication #:
|
|
Pub Dt:
|
11/22/2001
| | | | |
Title:
|
PROCESS FOR MANUFACTURING A MULTI-LAYER CIRCUIT BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
03/20/2007
|
Application #:
|
09902140
|
Filing Dt:
|
07/10/2001
|
Publication #:
|
|
Pub Dt:
|
02/07/2002
| | | | |
Title:
|
AUTOMATIC CHECK FOR CYCLIC OPERATING CONDITIONS FOR SOI CIRCUIT SIMULATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
09902374
|
Filing Dt:
|
07/10/2001
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
METHODOLOGY FOR CRITICAL DIMENSION METROLOGY USING STEPPER FOCUS MONITOR INFORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2003
|
Application #:
|
09902830
|
Filing Dt:
|
07/11/2001
|
Publication #:
|
|
Pub Dt:
|
01/16/2003
| | | | |
Title:
|
METHOD OF FABRICATING SIO2 SPACERS AND ANNEALING CAPS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2005
|
Application #:
|
09902859
|
Filing Dt:
|
07/11/2001
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR LOW DENSITY PARITY CHECK ENCODING OF DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09903820
|
Filing Dt:
|
07/12/2001
|
Publication #:
|
|
Pub Dt:
|
11/15/2001
| | | | |
Title:
|
PROCESS OF FORMING A THICK OXIDE FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09907387
|
Filing Dt:
|
07/17/2001
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
INTEGRATED REAL-TIME DATA TRACING WITH LOW PIN COUNT OUTPUT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
09909211
|
Filing Dt:
|
07/19/2001
|
Publication #:
|
|
Pub Dt:
|
12/13/2001
| | | | |
Title:
|
METHOD OF MANUFACTURING FINE PITCH CIRCUITIZATION WITH FILLED PLATED THROUGH HOLES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2003
|
Application #:
|
09909307
|
Filing Dt:
|
07/19/2001
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
ALL-IN-ONE DISPOSABLE/PERMANENT SPACER ELEVATED SOURCE/DRAIN, SELF-ALIGNED SILICIDE CMOS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2003
|
Application #:
|
09910380
|
Filing Dt:
|
07/20/2001
|
Publication #:
|
|
Pub Dt:
|
01/23/2003
| | | | |
Title:
|
CARBON-GRADED LAYER FOR IMPROVED ADHESION OF LOW-K DIELECTRICS TO SILICON SUBSTRATES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09910981
|
Filing Dt:
|
07/23/2001
|
Title:
|
METHOD FOR MANUFACTURE OF IMPROVED DEEP TRENCH EDRAM CAPACITOR AND STRUCTURE PRODUCED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
09911069
|
Filing Dt:
|
07/23/2001
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
Title:
|
CONDUCTIVE POLYMER INTERCONNECTION CONFIGURATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09911270
|
Filing Dt:
|
07/23/2001
|
Publication #:
|
|
Pub Dt:
|
02/21/2002
| | | | |
Title:
|
CONDUCTIVE ADHESIVE HAVING A PALLADIUM MATRIX INTERFACE BETWEEN TWO METAL SURFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/11/2003
|
Application #:
|
09915061
|
Filing Dt:
|
07/25/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
GROUNDED BODY SOI SRAM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
09915437
|
Filing Dt:
|
07/26/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
METHOD OF LOGIC CIRCUIT SYNTHESIS AND DESIGN USING A DYNAMIC CIRCUIT LIBRARY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
09915932
|
Filing Dt:
|
07/26/2001
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
Title:
|
METHOD FOR FORMING ELECTROMIGRATION-RESISTANT STRUCTURES BY DOPING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09917059
|
Filing Dt:
|
07/27/2001
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
Title:
|
SENSE AMPLIFIER THRESHOLD COMPENSATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09917370
|
Filing Dt:
|
07/27/2001
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
SYSTEM FOR CONVERTING OPTICAL BEAMS TO COLLIMATED FLAT-TOP BEAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2005
|
Application #:
|
09918809
|
Filing Dt:
|
07/31/2001
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
Title:
|
ADAPTIVE PHASE LOCKED LOOP
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09918830
|
Filing Dt:
|
08/01/2001
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
Title:
|
DYNAMIC PRECHARGE DECODE SCHEME FOR FAST DRAM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09921867
|
Filing Dt:
|
08/03/2001
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
a process of fabrication an electrical interconnection element having a contact tip structure.
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2003
|
Application #:
|
09922892
|
Filing Dt:
|
08/06/2001
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
Title:
|
DEEP TRENCH BODY SOI CONTACTS WITH EPITAXIAL LAYER FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
09922893
|
Filing Dt:
|
08/06/2001
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR ADJUSTING CONTROL CIRCUIT PULL-UP MARGIN FOR CONTENT ADDRESSABLE MEMORY (CAM)
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
09924318
|
Filing Dt:
|
08/08/2001
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
METHOD OF BUILDING A CMOS STRUCTURE ON THIN SOI WITH SOURCE/DRAIN ELECTRODES FORMED BY IN SITU DOPED SELECTIVE AMORPHOUS SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09924548
|
Filing Dt:
|
08/09/2001
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
METHOD OF MANUFACTURING HIGH DIELECTRIC CONSTANT MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09924549
|
Filing Dt:
|
08/09/2001
|
Publication #:
|
|
Pub Dt:
|
02/13/2003
| | | | |
Title:
|
HIGH DIELECTRIC CONSTANT MATERIALS FORMING COMPONENTS OF DRAM SUCH AS DEEP-TRENCH CAPACITORS
AND GATE DIELECTRIC (INSULATORS) FOR SUPPORT CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09924660
|
Filing Dt:
|
08/08/2001
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
Title:
|
FLIP FERAM CELL AND METHOD TO FORM SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
|
Application #:
|
09924661
|
Filing Dt:
|
08/08/2001
|
Title:
|
ENHANCED BITLINE EQUALIZATION FOR HIERARCHICAL BITLINE ARCHITECTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09925266
|
Filing Dt:
|
08/09/2001
|
Title:
|
METHOD AND APPARATUS FOR SAMPLING DOUBLE DATA RATE MEMORY READ DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
09928212
|
Filing Dt:
|
08/10/2001
|
Publication #:
|
|
Pub Dt:
|
09/19/2002
| | | | |
Title:
|
FABRICATION OF NOTCHED GATES BY PASSIVATING PARTIALLY ETCHED GATE SIDEWALLS AND THEN USING AN ISOTROPIC ETCH
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09928965
|
Filing Dt:
|
08/14/2001
|
Publication #:
|
|
Pub Dt:
|
02/28/2002
| | | | |
Title:
|
A SEMICONDUCTOR DEVICE WITH ABRUPT SOURCE/DRAIN EXTENSIONS WITH CONTROLLABLE GATE ELECTRODE OVERLAP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2006
|
Application #:
|
09929591
|
Filing Dt:
|
08/14/2001
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR DISCONNECTING A PORTION OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
09930979
|
Filing Dt:
|
08/17/2001
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR LINKING AND/OR PATTERNING SELF-ASSEMBLED OBJECTS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2004
|
Application #:
|
09931299
|
Filing Dt:
|
08/16/2001
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
Title:
|
TOPSIDE INSTALLATION APPARATUS FOR LAND GRID ARRAY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2003
|
Application #:
|
09932002
|
Filing Dt:
|
08/17/2001
|
Publication #:
|
|
Pub Dt:
|
01/31/2002
| | | | |
Title:
|
TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATIONS THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
09933461
|
Filing Dt:
|
08/20/2001
|
Publication #:
|
|
Pub Dt:
|
09/12/2002
| | | | |
Title:
|
METHOD FOR MINIMIZING SAMPLE DAMAGE DURING THE ABLATION OF MATERIAL USING A FOCUSED ULTRASHORT PULSED LASER BEAM
|
|
|
Patent #:
|
|
Issue Dt:
|
09/20/2005
|
Application #:
|
09934864
|
Filing Dt:
|
08/22/2001
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
METHOD FOR RECOVERING AN ORGANIC SOLVENT FROM A WASTE STREAM CONTAINING SUPERCRITICAL CO2
|
|
|
Patent #:
|
|
Issue Dt:
|
08/20/2002
|
Application #:
|
09938402
|
Filing Dt:
|
08/24/2001
|
Publication #:
|
|
Pub Dt:
|
05/23/2002
| | | | |
Title:
|
APPARATUS AND METHOD FOR PRINTED CIRCUIT BOARD REPAIR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09940262
|
Filing Dt:
|
08/28/2001
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR ADDRESS DECODING OF EMBEDDED DRAM DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2003
|
Application #:
|
09940297
|
Filing Dt:
|
08/28/2001
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
METHOD OF REDUCING THE EXTRINSIC BODY RESISTANCE IN A SILICON-ON-INSULATOR BODY CONTACTED MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
07/30/2002
|
Application #:
|
09943665
|
Filing Dt:
|
08/30/2001
|
Title:
|
DUTY-CYCLE CORRECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
09945596
|
Filing Dt:
|
09/04/2001
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
LIQUID OR SUPERCRITICAL CARBON DIOXIDE COMPOSITION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
09946237
|
Filing Dt:
|
09/05/2001
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR INTEGRATING TEST COVERAGE MEASUREMENTS WITH MODEL BASED TEST GENERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
09947098
|
Filing Dt:
|
09/05/2001
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
ELECTRONIC PACKAGE HAVING A THERMAL STRETCHING LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
09948165
|
Filing Dt:
|
09/06/2001
|
Publication #:
|
|
Pub Dt:
|
01/17/2002
| | | | |
Title:
|
REMOVABLE/DISPOSABLE PLATEN TOP
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09948432
|
Filing Dt:
|
09/07/2001
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
SUBSTRATE DESIGN OF A CHIP USING A GENERIC SUBSTRATE DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
09948478
|
Filing Dt:
|
09/07/2001
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
MEMS RF SWITCH WITH LOW ACTUATION VOLTAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
09950534
|
Filing Dt:
|
10/19/2001
|
Publication #:
|
|
Pub Dt:
|
02/28/2002
| | | | |
Title:
|
PATTERNS OF ELECTRICALLY CONDUCTING POLYMERS AND THEIR APPLICATION AS ELECTRODES OR ELECTRICAL CONTACTS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09952872
|
Filing Dt:
|
09/11/2001
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
Thin film protective layer with buffering interface
|
|
|
Patent #:
|
|
Issue Dt:
|
12/10/2002
|
Application #:
|
09956367
|
Filing Dt:
|
09/19/2001
|
Title:
|
METHOD AND APPARATUS TO IMPROVE COATING QUALITY
|
|