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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10439085
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Filing Dt:
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05/15/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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MEMORY SYSTEM
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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10441609
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Filing Dt:
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05/20/2003
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Publication #:
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Pub Dt:
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03/31/2005
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Title:
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TESTING MEMORY UNITS IN A DIGITAL CIRCUIT
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10442739
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Filing Dt:
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05/21/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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PHOTOLITHOGRAPHIC MASK HAVING A STRUCTURE REGION COVERED BY A THIN PROTECTIVE COATING OF ONLY A FEW ATOMIC LAYERS AND METHODS FOR THE FABRICATION OF THE MASK INCLUDING ALCVD TO FORM THE THIN PROTECTIVE COATING
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10444542
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Filing Dt:
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05/23/2003
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Publication #:
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Pub Dt:
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11/27/2003
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Title:
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INTEGRATED MEMORY HAVING AN ACCELERATED WRITE CYCLE
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Patent #:
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Issue Dt:
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05/11/2004
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Application #:
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10446601
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Filing Dt:
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05/28/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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INTEGRATED MEMORY USING PREFETCH ARCHITECTURE AND METHOD FOR OPERATING AN INTEGRATED MEMORY
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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10446995
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Filing Dt:
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05/27/2003
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Publication #:
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Pub Dt:
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11/27/2003
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Title:
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CIRCUIT CONFIGURATION HAVING A FLOW CONTROLLER, INTEGRATED MEMORY DEVICE, AND TEST CONFIGURATION HAVING SUCH A CIRCUIT CONFIGURATION
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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10447386
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Filing Dt:
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05/29/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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METHOD FOR CLASSIFYING ERRORS IN THE LAYOUT OF A SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10452477
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Filing Dt:
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06/02/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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CIRCUIT CONFIGURATION FOR SETTING THE INPUT RESISTANCE AND THE INPUT CAPACITANCE OF AN INTEGRATED SEMICONDUCTOR CIRCUIT CHIP
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Patent #:
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Issue Dt:
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09/12/2006
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Application #:
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10452485
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Filing Dt:
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06/02/2003
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Publication #:
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Pub Dt:
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12/04/2003
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Title:
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TEST DEVICE, TEST SYSTEM AND METHOD FOR TESTING A MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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08/16/2005
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Application #:
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10460714
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Filing Dt:
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06/12/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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INTEGRATED CIRCUIT WITH VOLTAGE DIVIDER AND BUFFERED CAPACITOR
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10460715
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Filing Dt:
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06/12/2003
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Publication #:
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Pub Dt:
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01/29/2004
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Title:
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ZIPPER CONNECTOR
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10461367
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Filing Dt:
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06/16/2003
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Publication #:
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Pub Dt:
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12/16/2004
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Title:
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FERROELECTRIC MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10462419
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Filing Dt:
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06/16/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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SEMICONDUCTOR MEMORY WITH ADDRESS DECODING UNIT, AND ADDRESS LOADING METHOD
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10462512
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Filing Dt:
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06/16/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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METHOD FOR PATTERNING A LAYER OF SILICON, AND METHOD FOR FABRICATING AN INTEGRATED SEMICONDUCTOR CIRCUIT
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10462513
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Filing Dt:
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06/16/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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DRAM CELL AND SPACE-OPTIMIZED MEMORY ARRAY
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Patent #:
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Issue Dt:
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12/27/2005
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Application #:
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10462533
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Filing Dt:
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06/16/2003
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Publication #:
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Pub Dt:
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01/08/2004
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Title:
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DRAM MEMORY CELL AND MEMORY CELL ARRAY WITH FAST READ/WRITE ACCESS
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Patent #:
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Issue Dt:
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10/18/2005
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Application #:
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10463019
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Filing Dt:
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06/17/2003
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Publication #:
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Pub Dt:
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12/18/2003
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY WITH WORDLINES CONDUCTIVELY CONNECTED TO ONE ANOTHER IN PAIRS
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10464429
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Filing Dt:
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06/18/2003
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Publication #:
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Pub Dt:
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02/26/2004
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Title:
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CONNECTION OF INTEGRATED CIRCUIT TO A SUBSTRATE
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10464611
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Filing Dt:
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06/18/2003
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Publication #:
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Pub Dt:
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04/22/2004
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Title:
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VOLTAGE REGULATOR
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10465488
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Filing Dt:
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06/19/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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METHOD FOR FABRICATING A DEEP TRENCH CAPACITOR FOR DYNAMIC MEMORY CELLS
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Patent #:
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Issue Dt:
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08/23/2005
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Application #:
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10600961
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Filing Dt:
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06/20/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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METHOD FOR INCREASING THE INPUT VOLTAGE OF AN INTEGRATED CIRCUIT WITH A TWO-STAGE CHARGE PUMP, AND INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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11/16/2004
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Application #:
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10602403
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Filing Dt:
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06/23/2003
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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METHOD FOR STORING DATA, METHOD FOR READING DATA, APPARATUS FOR STORING DATA AND APPARATUS FOR READING DATA
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Patent #:
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Issue Dt:
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10/14/2008
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Application #:
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10607518
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Filing Dt:
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06/26/2003
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Publication #:
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Pub Dt:
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01/15/2004
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Title:
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METHOD FOR CHECKING THE REFRESH FUNCTION OF AN INFORMATION MEMORY
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Patent #:
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Issue Dt:
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07/17/2007
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Application #:
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10609453
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Filing Dt:
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06/27/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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POLY-O-HYDROXYAMIDE, POLYBENZOXAZOLE FROM THE POLY-O-HYDROXYAMIDE, ELECTRONIC COMPONENT INCLUDING A POLYBENZOXAZOLE, AND PROCESSES FOR PRODUCING THE SAME
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Patent #:
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Issue Dt:
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12/28/2004
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Application #:
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10609455
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Filing Dt:
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06/27/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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CONFIGURATION FOR TESTING SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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03/01/2005
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Application #:
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10609456
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Filing Dt:
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06/27/2003
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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BIS-O-AMINOPHENOLS AND PROCESSES FOR PRODUCING BIS-O-AMINOPHENOLS
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Patent #:
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Issue Dt:
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10/19/2004
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Application #:
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10609460
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Filing Dt:
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06/27/2003
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Publication #:
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Pub Dt:
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04/01/2004
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Title:
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POLY-O-HYDROXYAMIDE, POLYBENZOXAZOLE, AND ELECTRONIC COMPONENT INCLUDING A DIELECTRIC HAVING A BARRIER EFFECT AGAINST COPPER DIFFUSION, AND PROCESSES FOR PREPARING POLY-O-HYDROXYAMIDES, POLYBENZOXAZOLES, AND ELECTRONIC COMPONENTS
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10609871
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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04/08/2004
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Title:
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CONFIGURATION, PLUG-IN MOUNT AND CONTACT ELEMENT FOR FIXING AND CONTACTING SWITCHING ASSEMBLIES ON A SUBSTRATE
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Patent #:
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Issue Dt:
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03/07/2006
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Application #:
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10609873
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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01/08/2004
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Title:
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METHOD, ADAPTER CARD AND CONFIGURATION FOR AN INSTALLATION OF MEMORY MODULES
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Patent #:
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Issue Dt:
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01/02/2007
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Application #:
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10610186
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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01/01/2004
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Title:
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MEMORY CHIP WITH TEST LOGIC TAKING INTO CONSIDERATION THE ADDRESS OF A REDUNDANT WORD LINE AND METHOD FOR TESTING A MEMORY CHIP
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10610241
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Filing Dt:
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06/30/2003
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Publication #:
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Pub Dt:
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03/11/2004
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Title:
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CONNECTOR FOR A PLURALITY OF SWITCHING ASSEMBLIES WITH COMPATIBLE INTERFACES
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Patent #:
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Issue Dt:
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03/27/2007
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Application #:
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10613367
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Filing Dt:
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07/03/2003
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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TEST CIRCUIT AND METHOD FOR TESTING AN INTEGRATED MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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10/11/2005
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Application #:
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10613381
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Filing Dt:
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07/03/2003
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Publication #:
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Pub Dt:
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04/22/2004
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Title:
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LEVEL SHIFTER WITHOUT DUTYCYCLE DISTORTION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10614429
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Filing Dt:
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07/07/2003
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Publication #:
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Pub Dt:
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09/01/2005
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Title:
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Method and apparatus for producing phase shifter masks
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10619014
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Filing Dt:
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07/11/2003
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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CIRCUIT CONFIGURATION FOR CONTROLLING LOAD-DEPENDENT DRIVER STRENGTHS
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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10619125
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Filing Dt:
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07/14/2003
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Publication #:
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Pub Dt:
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07/29/2004
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Title:
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NON-VOLATILE MEMORY CELL
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Patent #:
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Issue Dt:
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12/11/2007
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Application #:
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10619157
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Filing Dt:
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07/14/2003
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Publication #:
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Pub Dt:
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08/05/2004
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Title:
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INTEGRATED MEMORY AND METHOD FOR TESTING THE MEMORY
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10619290
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Filing Dt:
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07/15/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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CIRCUIT CONFIGURATION FOR THE BIT-PARALLEL OUTPUTTING OF A DATA WORD
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Patent #:
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Issue Dt:
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06/15/2004
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Application #:
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10619970
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Filing Dt:
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07/15/2003
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10620092
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Filing Dt:
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07/15/2003
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Title:
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CIRCUIT ELEMENT WITH TIMING CONTROL
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10620570
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Filing Dt:
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07/16/2003
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Publication #:
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Pub Dt:
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01/22/2004
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Title:
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PVD METHOD AND PVD APPARATUS
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Patent #:
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Issue Dt:
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03/22/2005
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Application #:
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10620587
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Filing Dt:
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07/16/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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CONFIGURATION AND METHOD FOR CHECKING AN ADDRESS GENERATOR
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10621535
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Filing Dt:
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07/17/2003
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Publication #:
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Pub Dt:
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04/14/2005
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Title:
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METHOD FOR CORRECTING LOCAL LOADING EFFECTS IN THE ETCHING OF PHOTOMASKS
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Patent #:
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Issue Dt:
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02/20/2007
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Application #:
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10622050
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Filing Dt:
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07/17/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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WAFER LIFTING DEVICE
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Patent #:
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Issue Dt:
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01/31/2006
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Application #:
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10623067
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Filing Dt:
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07/18/2003
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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METHOD OF GENERATING A TEST PATTERN FOR SIMULATING AND/OR TESTING THE LAYOUT OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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02/22/2005
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Application #:
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10623831
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Filing Dt:
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07/21/2003
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Publication #:
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Pub Dt:
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02/12/2004
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Title:
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CIRCUIT AND METHOD FOR WRITING AND READING DATA FROM A DYNAMIC MEMORY CIRCUIT
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10623843
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Filing Dt:
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07/21/2003
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Publication #:
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Pub Dt:
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01/29/2004
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Title:
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METHOD FOR FABRICATING A BURIED BIT LINE FOR A SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
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05/03/2005
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Application #:
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10625495
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Filing Dt:
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07/23/2003
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Publication #:
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Pub Dt:
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07/08/2004
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Title:
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METHOD FOR CONNECTING AN INTEGRATED CIRCUIT TO A SUBSTRATE AND CORRESPONDING CIRCUIT ARRANGEMENT
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10626955
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Filing Dt:
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07/25/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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INTEGRATED SYNCHRONOUS MEMORY AND MEMORY CONFIGURATION HAVING A MEMORY MODULE WITH AT LEAST ONE SYNCHRONOUS MEMORY
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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10626957
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Filing Dt:
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07/25/2003
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Publication #:
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Pub Dt:
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01/29/2004
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Title:
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SEMICONDUCTOR CIRCUIT STRUCTURE AND METHOD FOR FABRICATING THE SEMICONDUCTOR CIRCUIT STRUCTURE
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10627841
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Filing Dt:
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07/25/2003
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Publication #:
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Pub Dt:
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08/12/2004
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Title:
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CIRCUIT CONFIGURATION FOR READING OUT A PROGRAMMABLE LINK
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10627906
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Filing Dt:
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07/25/2003
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Publication #:
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Pub Dt:
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04/29/2004
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Title:
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POLYMERIZABLE COMPOSITION, POLYMER, RESIST, AND PROCESS FOR ELECTRON BEAM LITHOGRAPHY
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Patent #:
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Issue Dt:
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07/19/2005
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Application #:
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10630373
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Filing Dt:
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07/30/2003
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Publication #:
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Pub Dt:
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07/01/2004
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Title:
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SEMICONDUCTOR TRENCH STRUCTURE
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10630632
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Filing Dt:
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07/29/2003
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Title:
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SEMICONDUCTOR CIRCUIT MODULE AND METHOD FOR FABRICATING SEMICONDUCTOR CIRCUIT MODULES
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10631355
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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SEMICONDUCTOR MEMORY HAVING A CONFIGURATION OF MEMORY CELLS
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10631356
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/05/2004
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Title:
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METHOD FOR TESTING A SEMICONDUCTOR MEMORY HAVING A PLURALITY OF MEMORY BANKS
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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10631587
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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07/01/2004
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Title:
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MICROELECTRONIC PROCESS AND STRUCTURE
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Patent #:
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Issue Dt:
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06/13/2006
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Application #:
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10632752
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
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Title:
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REFLECTIVE MIRROR FOR LITHOGRAPHIC EXPOSURE AND PRODUCTION METHOD
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Patent #:
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Issue Dt:
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07/25/2006
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Application #:
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10633996
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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INTEGRATED MEMORY AND METHOD FOR CHECKING THE FUNCTIONING OF AN INTEGRATED MEMORY
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Patent #:
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Issue Dt:
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06/14/2005
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Application #:
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10634242
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
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04/15/2004
| | | | |
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Title:
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METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE AND CORRESPONDING SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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02/21/2006
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Application #:
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10635140
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
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02/10/2005
| | | | |
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Title:
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METHOD OF FABRICATION OF AN FERAM CAPACITOR AND AN FERAM CAPACITOR FORMED BY THE METHOD
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10637899
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Filing Dt:
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08/08/2003
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Publication #:
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Pub Dt:
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04/15/2004
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Title:
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INTEGRATED CIRCUIT AND METHOD FOR PRODUCING A COMPOSITE COMPRISING A TESTED INTEGRATED CIRCUIT AND AN ELECTRICAL DEVICE
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Patent #:
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Issue Dt:
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08/30/2005
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Application #:
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10638599
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Filing Dt:
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08/11/2003
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Publication #:
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Pub Dt:
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03/18/2004
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Title:
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MEASUREMENT CONFIGURATION INCLUDING A VEHICLE AND METHOD FOR PERFORMING MEASUREMENTS WITH THE MEASUREMENT CONFIGURATION AT VARIOUS LOCATIONS
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10639379
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Filing Dt:
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08/12/2003
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Publication #:
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Pub Dt:
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04/22/2004
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Title:
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RAM MEMORY CIRCUIT AND METHOD FOR MEMORY OPERATION AT A MULTIPLIED DATA RATE
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Patent #:
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Issue Dt:
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11/13/2007
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Application #:
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10640230
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Filing Dt:
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08/13/2003
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Publication #:
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Pub Dt:
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02/19/2004
| | | | |
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Title:
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PHASE DETECTOR
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Patent #:
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Issue Dt:
|
10/11/2005
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Application #:
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10642063
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Filing Dt:
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08/15/2003
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Publication #:
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Pub Dt:
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06/17/2004
| | | | |
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Title:
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METHOD OF PRODUCING A SEMICONDUCTOR COMPONENT HAVING A COMPLIANT BUFFER LAYER
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Patent #:
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Issue Dt:
|
08/08/2006
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Application #:
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10642092
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Filing Dt:
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08/15/2003
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Publication #:
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Pub Dt:
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11/10/2005
| | | | |
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Title:
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METHOD FOR FABRICATING CONNECTION REGIONS OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT HAVING CONNECTION REGIONS
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Patent #:
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Issue Dt:
|
04/05/2005
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Application #:
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10645053
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Filing Dt:
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08/21/2003
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Title:
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SHIFT REGISTER CHAIN FOR TRIMMING GENERATORS FOR AN INTEGRATED SEMICONDUCTOR APPARATUS
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Patent #:
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Issue Dt:
|
01/31/2006
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Application #:
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10646166
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Filing Dt:
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08/22/2003
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Title:
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SEMICONDUCTOR MEMORY APPARATUS WITH VARIABLE CONTACT CONNECTIONS AND A CORRESPONDING SEMICONDUCTOR APPARATUS
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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10649408
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Filing Dt:
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08/27/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
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Title:
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INTEGRATED MEMORY AND METHOD FOR SETTING THE LATENCY IN THE INTEGRATED MEMORY
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Patent #:
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Issue Dt:
|
12/20/2005
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Application #:
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10651803
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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05/12/2005
| | | | |
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Title:
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SEMI-CONDUCTOR COMPONENT TESTING SYSTEM WITH A REDUCED NUMBER OF TEST CHANNELS
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Patent #:
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|
Issue Dt:
|
07/05/2005
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Application #:
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10651804
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Filing Dt:
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08/29/2003
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Title:
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SEMICONDUCTOR MEMORY ELEMENT WITH DIRECT CONNECTION OF THE I/OS TO THE ARRAY LOGIC
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Patent #:
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Issue Dt:
|
07/05/2005
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Application #:
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10651857
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
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Title:
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METHOD FOR DRIVING ONE-TIME OPERABLE ISOLATION ELEMENTS AND CIRCUIT FOR DRIVING THE ISOLATION ELEMENTS
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Patent #:
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|
Issue Dt:
|
01/11/2005
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Application #:
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10652291
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
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Title:
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METHOD AND CONFIGURATION FOR COMPENSATING FOR UNEVENNESS IN THE SURFACE OF A SUBSTRATE
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Patent #:
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|
Issue Dt:
|
05/01/2007
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Application #:
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10652520
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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05/06/2004
| | | | |
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Title:
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PROCESS AND ARRANGEMENT FOR THE SELECTIVE METALLIZATION OF 3D STRUCTURES
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|
|
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Patent #:
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|
Issue Dt:
|
06/06/2006
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Application #:
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10653537
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
|
07/08/2004
| | | | |
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Title:
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MASK FOR PROJECTING A STRUCTURE PATTERN ONTO A SEMICONDUCTOR SUBSTRATE
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|
|
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Patent #:
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|
Issue Dt:
|
07/18/2006
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Application #:
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10653589
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
|
04/29/2004
| | | | |
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Title:
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METHOD FOR PATTERNING A MASK LAYER AND SEMICONDUCTOR PRODUCT
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|
|
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Patent #:
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|
Issue Dt:
|
01/02/2007
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Application #:
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10653599
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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04/29/2004
| | | | |
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Title:
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BARRRIER LAYER AND A METHOD FOR SUPPRESSING DIFFUSION PROCESSES DURING THE PRODUCTION OF SEMICONDUCTOR DEVICES
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|
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Patent #:
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|
Issue Dt:
|
07/26/2005
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Application #:
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10653652
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
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Title:
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READ-OUT CIRCUIT FOR A DYNAMIC MEMORY CIRCUIT MEMORY CELL ARRAY AND METHOD FOR AMPLIFYING AND READING DATA STORED IN A MEMORY CELL ARRAY
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Patent #:
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Issue Dt:
|
03/21/2006
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Application #:
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10654376
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Filing Dt:
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09/03/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
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Title:
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FENCE-FREE ETCHING OF IRIDIUM BARRIER HAVING A STEEP TAPER ANGLE
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Patent #:
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Issue Dt:
|
07/19/2005
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Application #:
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10656042
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
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05/06/2004
| | | | |
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Title:
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METHOD FOR THE SOLDER-STOP STRUCTURING OF ELEVATIONS ON WAFERS
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Patent #:
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Issue Dt:
|
04/08/2008
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Application #:
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10656353
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
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05/06/2004
| | | | |
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Title:
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METHOD FOR DETERMINING THE END POINT FOR A CLEANING ETCHING PROCESS
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Patent #:
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Issue Dt:
|
07/12/2005
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Application #:
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10658741
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
|
07/01/2004
| | | | |
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Title:
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SEMI-CONDUCTOR COMPONENT WITH CLOCK RELAYING DEVICE
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Patent #:
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|
Issue Dt:
|
06/14/2005
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Application #:
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10658742
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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07/01/2004
| | | | |
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Title:
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DIGITAL SIGNAL DELAY DEVICE
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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10659693
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
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Title:
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SYNCHRONIZATION DEVICE FOR A SEMICONDUCTOR MEMORY DEVICE
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|
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Patent #:
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Issue Dt:
|
02/15/2005
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Application #:
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10659843
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
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03/25/2004
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Title:
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TEST STRUCTURE FOR MEASURING A JUNCTION RESISTANCE IN A DRAM MEMORY CELL ARRAY
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Patent #:
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|
Issue Dt:
|
03/15/2005
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Application #:
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10660091
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Filing Dt:
|
09/10/2003
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|
Publication #:
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Pub Dt:
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04/29/2004
| | | | |
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Title:
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FABRICATION METHOD FOR A SEMICONDUCTOR STRUCTURE HAVING A PARTLY FILLED TRENCH
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Patent #:
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|
Issue Dt:
|
05/23/2006
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Application #:
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10663354
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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07/08/2004
| | | | |
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Title:
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ARRANGEMENT OF SEVERAL RESISTORS JOINTLY POSITIONED IN A WELL OF A SEMICONDUCTOR DEVICE, AND A SEMICONDUCTOR DEVICE INCLUDING AT LEAST ONE SUCH ARRANGEMENT
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Patent #:
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Issue Dt:
|
10/24/2006
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Application #:
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10663448
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Filing Dt:
|
09/16/2003
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|
Publication #:
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Pub Dt:
|
07/01/2004
| | | | |
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Title:
|
SEMICONDUCTOR DEVICE TESTING APPARATUS, SEMICONDUCTOR DEVICE TESTING SYSTEM, AND SEMICONDUCTOR DEVICE TESTING METHOD FOR MEASURING AND TRIMMING THE OUTPUT IMPEDANCE OF DRIVER DEVICES
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|
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Patent #:
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|
Issue Dt:
|
06/20/2006
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Application #:
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10667552
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Filing Dt:
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09/22/2003
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|
Publication #:
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Pub Dt:
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06/17/2004
| | | | |
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Title:
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PHOTOMASK, IN PARTICULAR ALTERNATING PHASE SHIFT MASK, WITH COMPENSATION STRUCTURE
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|
|
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Patent #:
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Issue Dt:
|
09/19/2006
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Application #:
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10668375
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Filing Dt:
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09/24/2003
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|
Publication #:
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Pub Dt:
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07/01/2004
| | | | |
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Title:
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DEFECT REPAIR METHOD, IN PARTICULAR FOR REPAIRING QUARTZ DEFECTS ON ALTERNATING PHASE SHIFT MASKS
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|
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Patent #:
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|
Issue Dt:
|
06/27/2006
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Application #:
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10668683
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Filing Dt:
|
09/23/2003
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|
Publication #:
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Pub Dt:
|
07/01/2004
| | | | |
|
Title:
|
CIRCUIT DEVICE WITH CLOCK PULSE DETECTION FACILITY
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|
|
|
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Patent #:
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|
Issue Dt:
|
09/19/2006
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Application #:
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10668684
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Filing Dt:
|
09/23/2003
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|
Publication #:
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Pub Dt:
|
07/01/2004
| | | | |
|
Title:
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PROCESS FOR DESIGNING AND MANUFACTURING SEMI-CONDUCTOR MEMORY COMPONENTS, IN PARTICULAR DRAM COMPONENTS
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|
|
|
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Patent #:
|
|
Issue Dt:
|
10/17/2006
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Application #:
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10670662
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Filing Dt:
|
09/25/2003
|
|
Publication #:
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Pub Dt:
|
03/25/2004
| | | | |
|
Title:
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INTEGRATED CIRCUIT HAVING AN INPUT CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/10/2006
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Application #:
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10672145
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Filing Dt:
|
09/26/2003
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|
Publication #:
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Pub Dt:
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11/18/2004
| | | | |
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Title:
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METHOD FOR CONTROLLING SEMICONDUCTOR CHIPS AND CONTROL APPARATUS
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|
|
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Patent #:
|
|
Issue Dt:
|
04/18/2006
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Application #:
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10673964
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Filing Dt:
|
09/29/2003
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|
Publication #:
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Pub Dt:
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06/17/2004
| | | | |
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Title:
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PHOTOSENSITIVE COATING MATERIAL FOR A SUBSTRATE AND PROCESS FOR EXPOSING THE COATED SUBSTRATE
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|
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Patent #:
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|
Issue Dt:
|
09/20/2005
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Application #:
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10673965
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Filing Dt:
|
09/29/2003
|
|
Publication #:
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|
Pub Dt:
|
06/24/2004
| | | | |
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Title:
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CALIBRATION CONFIGURATION
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|
|
|
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Patent #:
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|
Issue Dt:
|
07/10/2007
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Application #:
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10675049
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Filing Dt:
|
09/30/2003
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|
Publication #:
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|
Pub Dt:
|
04/29/2004
| | | | |
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Title:
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METHOD AND FURNACE FOR THE VAPOR PHASE DEPOSITION OF COMPONENTS ONTO SEMICONDUCTOR SUBSTRATES WITH A VARIABLE MAIN FLOW DIRECTION OF THE PROCESS GAS
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|
|
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|
Patent #:
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|
Issue Dt:
|
02/08/2005
|
Application #:
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10675051
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Filing Dt:
|
09/30/2003
|
|
Publication #:
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|
Pub Dt:
|
04/01/2004
| | | | |
|
Title:
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TEST STRUCTURE FOR DETERMINING A DOPING REGION OF AN ELECTRODE CONNECTION BETWEEN A TRENCH CAPACITOR AND A SELECTION TRANSISTOR IN A MEMORY CELL ARRAY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/21/2005
|
Application #:
|
10675433
|
Filing Dt:
|
09/30/2003
|
|
Publication #:
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|
Pub Dt:
|
04/08/2004
| | | | |
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Title:
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PSEUDOSTATIC MEMORY CIRCUIT
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|
