USPTO Assignments on the Web

	United States Patent and Trademark Office
	Home\|Site Index\|Search\|Guides\|Contacts\|eBusiness\|eBiz alerts\|News\|Help

Assignments on the Web > Patent Query

Patent Assignment Details

NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:	035623/0001			Pages:	181
		Recorded:	05/08/2015
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 4024
Page 2 of 41
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Patent #:	5747866	Issue Dt:	05/05/1998	Application #:	08785322	Filing Dt:	01/21/1997
Title:	APPLICATION OF THIN CRYSTALLINE SI3N4 LINERS IN SHALLOW TRENCH ISOLATION (STI) STRUCTURES

Patent #:	6084535	Issue Dt:	07/04/2000	Application #:	08791687	Filing Dt:	01/30/1997
Title:	SYSTEM AND METHOD FOR GENERATING MANY ONES CODES WITH HAMMING DISTANCE AFTER PRECODING

Patent #:	5851733	Issue Dt:	12/22/1998	Application #:	08793310	Filing Dt:	03/12/1997
Title:	PHOTOLITHOGRAPHIC PATTERN GENERATION

Patent #:	5863705	Issue Dt:	01/26/1999	Application #:	08793546	Filing Dt:	02/21/1997
Title:	PHOTOLITHOGRAPHIC PATTERN GENERATION

Patent #:	5789794	Issue Dt:	08/04/1998	Application #:	08811327	Filing Dt:	03/04/1997
Title:	FUSE STRUCTURE FOR AN INTEGRATED CIRCUIT ELEMENT

Patent #:	5973373	Issue Dt:	10/26/1999	Application #:	08817630	Filing Dt:	03/26/1997
Title:	READ-ONLY-MEMORY CELL ARRANGEMENT USING VERTICAL MOS TRANSISTORS AND GATE DIELECTRICS OF DIFFERENT THICKNESSES AND METHOD FOR ITS PRODUCTION

Patent #:	5789302	Issue Dt:	08/04/1998	Application #:	08823668	Filing Dt:	03/24/1997
Title:	CRACK STOPS

Patent #:	5859801	Issue Dt:	01/12/1999	Application #:	08825312	Filing Dt:	03/28/1997
Title:	FLEXIBLE FUSE PLACEMENT IN REDUNANT SEMICONDUCTOR MEMORY

Patent #:	5884319	Issue Dt:	03/16/1999	Application #:	08828538	Filing Dt:	03/31/1997
Title:	PORTABLE DATA CARRIER CONFIGURATION TO BE OPERATED ON A DATA BUS AND DATA PROCESSING SYSTEM HAVING AT LEAST ONE PORTABLE DATA CARRIER CONFIGURATION

Patent #:	5925928	Issue Dt:	07/20/1999	Application #:	08828697	Filing Dt:	03/31/1997
Title:	DATA CARRIER CARD, ASSEMBLY OF AT LEAST TWO DATA CARRIER CARDS AND METHOD OF ACCESSING AT LEAST ONE OF THE DATA CARRIER CARDS

Patent #:	5926716	Issue Dt:	07/20/1999	Application #:	08829255	Filing Dt:	03/31/1997
Title:	METHOD FOR FORMING A STRUCTURE

Patent #:	5854126	Issue Dt:	12/29/1998	Application #:	08829257	Filing Dt:	03/31/1997
Title:	METHOD FOR FORMING METALLIZATION IN SEMICONDUCTOR DEVICES WITH A SELF- PLANARIZING MATERIAL

Patent #:	5766497	Issue Dt:	06/16/1998	Application #:	08829370	Filing Dt:	03/31/1997
Title:	ABLATION PATTERING OF MULTILAYERED STRUCTURES

Patent #:	6025224	Issue Dt:	02/15/2000	Application #:	08829371	Filing Dt:	03/31/1997
Title:	DEVICE WITH ASYMMETRICAL CHANNEL DOPANT PROFILE

Patent #:	6025116	Issue Dt:	02/15/2000	Application #:	08829575	Filing Dt:	03/31/1997
Title:	ETCHING OF CONTACT HOLES

Patent #:	6054345	Issue Dt:	04/25/2000	Application #:	08833557	Filing Dt:	04/07/1997
Title:	METHOD FOR FORMING DEEP DEPLETION MODE DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELL

Patent #:	5798301	Issue Dt:	08/25/1998	Application #:	08841030	Filing Dt:	04/29/1997
Title:	METHOD OF MANUFACTURING METAL INTERCONNECT STRUCTURE FOR AN INTEGRATED CIRCUIT WITH IMPROVED ELECTROMIGRATION RELIABILITY

Patent #:	5963837	Issue Dt:	10/05/1999	Application #:	08846924	Filing Dt:	04/30/1997
Title:	METHOD OF PLANARIZING THE SEMICONDUCTOR STRUCTURE

Patent #:	6492282	Issue Dt:	12/10/2002	Application #:	08846925	Filing Dt:	04/30/1997
Title:	INTEGRATED CIRCUITS AND MANUFACTURING METHODS

Patent #:	5917197	Issue Dt:	06/29/1999	Application #:	08861465	Filing Dt:	05/21/1997
Title:	INTEGRATED MULTI-LAYER TEST PADS

Patent #:	5844834	Issue Dt:	12/01/1998	Application #:	08867114	Filing Dt:	06/02/1997
Title:	SINGLE- ELECTRON MEMORY CELL CONFIGURATION

Patent #:	5822875	Issue Dt:	10/20/1998	Application #:	08867772	Filing Dt:	06/02/1997
Title:	SCANNING ELECTRON MICROSCOPIC RULER AND METHOD

Patent #:	6001684	Issue Dt:	12/14/1999	Application #:	08868555	Filing Dt:	06/04/1997
Title:	METHOD FOR FORMING A CAPACITAR

Patent #:	5817570	Issue Dt:	10/06/1998	Application #:	08870121	Filing Dt:	06/03/1997
Title:	SEMICONDUCTOR STRUCTURE FOR AN MOS TRANSISTOR AND METHOD FOR FABRICATING THE SEMICONDUCTOR STRUCTURE

Patent #:	5825686	Issue Dt:	10/20/1998	Application #:	08875955	Filing Dt:	08/11/1997
Title:	MULTI-VALUE READ-ONLY MEMORY CELL HAVING AN IMPROVED SIGNAL-TO-NOISE RATIO

Patent #:	6042993	Issue Dt:	03/28/2000	Application #:	08875957	Filing Dt:	08/07/1997
Title:	PHOTOLITHOGRAPHIC STRUCTURE GENERATION PROCESS

Patent #:	5831916	Issue Dt:	11/03/1998	Application #:	08879726	Filing Dt:	06/20/1997
Title:	IMPROVED REDUNDANT CIRCUITS AND METHODS THEREFOR

Patent #:	5844266	Issue Dt:	12/01/1998	Application #:	08879871	Filing Dt:	06/20/1997
Title:	BURIED STRAP FORMATION IN A DRAM TRENCH CAPACITOR

Patent #:	5933714	Issue Dt:	08/03/1999	Application #:	08879875	Filing Dt:	06/20/1997
Title:	DOUBLE DENSITY FUSE BANK FOR THE LASER BREAK-LINK PROGRAMMING OF AN INTEGRATED CIRCUIT

Patent #:	5899701	Issue Dt:	05/04/1999	Application #:	08882056	Filing Dt:	06/25/1997
Title:	METHOD FOR MAKING SILICA STRAIN TEST STRUCTURES

Patent #:	6074935	Issue Dt:	06/13/2000	Application #:	08882057	Filing Dt:	06/25/1997
Title:	METHOD OF REDUCING THE FORMATION OF WATERMARKS ON SEMICONDUCTOR WAFERS

Patent #:	5783476	Issue Dt:	07/21/1998	Application #:	08883356	Filing Dt:	06/26/1997
Title:	INTEGRATED CIRCUIT DEVICES INCLUDING SHALLOW TRENCH ISOLATION

Patent #:	5881013	Issue Dt:	03/09/1999	Application #:	08884081	Filing Dt:	06/27/1997
Title:	APPARATUS FOR CONTROLLING CIRCUIT RESPONSE DURING POWER-UP

Patent #:	5885137	Issue Dt:	03/23/1999	Application #:	08884118	Filing Dt:	06/27/1997
Title:	IMPROVED CHEMICAL MECHANICAL POLISHING PAD CONDITIONER

Patent #:	5915175	Issue Dt:	06/22/1999	Application #:	08884119	Filing Dt:	06/27/1997
Title:	MITIGATION OF CMP-INDUCED BPSG SURFACE DAMAGE BY AN INTEGRATED ANNEAL AND SILICON DIOXIDE DEPOSITION

Patent #:	6033977	Issue Dt:	03/07/2000	Application #:	08884729	Filing Dt:	06/30/1997
Title:	IMPROVED DUAL DAMASCENE STRUCTURE

Patent #:	6051497	Issue Dt:	04/18/2000	Application #:	08884732	Filing Dt:	06/30/1997
Title:	FORMATION OF SUB-GROUNDRULE FEATURES

Patent #:	5821592	Issue Dt:	10/13/1998	Application #:	08884853	Filing Dt:	06/30/1997
Title:	DYNAMIC RANDOM ACCESS MEMORY ARRAYS AND METHODS THEREFOR

Patent #:	5831917	Issue Dt:	11/03/1998	Application #:	08884854	Filing Dt:	06/30/1997
Title:	TECHNIQUES FOR REDUCING REDUNDANT ELEMENT FUSES IN A DYNAMIC RANDOM ACCESS MEMORY ARRAY

Patent #:	5875138	Issue Dt:	02/23/1999	Application #:	08884855	Filing Dt:	06/30/1997
Title:	DYNAMIC ACCESS MEMORY EQUALIZER CIRCUITS AND METHODS THEREFOR

Patent #:	5937288	Issue Dt:	08/10/1999	Application #:	08884860	Filing Dt:	06/30/1997
Title:	CMOS INTEGRATED CIRCUITS WITH REDUCED SUBSTRATE DEFECTS

Patent #:	6300235	Issue Dt:	10/09/2001	Application #:	08884861	Filing Dt:	06/30/1997
Title:	METHOD OF FORMING MULTI-LEVEL COPLANAR METAL/INSULATOR FILMS USING DUAL DAMASCENE WITH SACRIFICIAL FLOWABLE OXIDE

Patent #:	5899706	Issue Dt:	05/04/1999	Application #:	08884862	Filing Dt:	06/30/1997
Title:	METHOD OF REDUCING LOADING VARIATION DURING ETCH PROCESSING

Patent #:	5889420	Issue Dt:	03/30/1999	Application #:	08885329	Filing Dt:	06/30/1997
Title:	OCD WITH LOW OUTPUT CAPACITANCE

Patent #:	5858825	Issue Dt:	01/12/1999	Application #:	08893053	Filing Dt:	07/14/1997
Title:	METHODS FOR REDUCING ANOMALOUS NARROW CHANNEL EFFECT IN TRENCH-BOUNDED BURIED-CHANNEL P-MOSFETS

Patent #:	5978931	Issue Dt:	11/02/1999	Application #:	08895061	Filing Dt:	07/16/1997
Title:	VARIABLE DOMAIN REDUNDANCY REPLACEMENT CONFIGURATION FOR A MEMORY DEVICE

Patent #:	5843819	Issue Dt:	12/01/1998	Application #:	08898514	Filing Dt:	07/22/1997
Title:	SEMICONDUCTOR MEMORY DEVICE WITH TRENCH CAPACITOR AND METHOD FOR THE PRODUCTION THEREOF

Patent #:	6144088	Issue Dt:	11/07/2000	Application #:	08898734	Filing Dt:	07/23/1997
Title:	LEADFRAME FOR SEMICONDUCTOR CHIPS AND SEMICONDUCTOR MODULE HAVING THE LEAD FRAME

Patent #:	5962069	Issue Dt:	10/05/1999	Application #:	08900270	Filing Dt:	07/25/1997
Title:	PROCESS FOR FABRICATING LAYERED SUPERLATTICE MATERIALS AND AB03 TYPE METAL OXIDES WITHOUT EXPOSURE TO OXYGEN AT HIGH TEMPERATURES

Patent #:	5966624	Issue Dt:	10/12/1999	Application #:	08901986	Filing Dt:	07/29/1997
Title:	METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE HAVING A CRYSTALLINE LAYER

Patent #:	5905687	Issue Dt:	05/18/1999	Application #:	08904500	Filing Dt:	08/01/1997
Title:	FUSE REFRESH CIRCUIT

Patent #:	6150072	Issue Dt:	11/21/2000	Application #:	08916636	Filing Dt:	08/22/1997
Title:	METHOD OF MANUFACTURING A SHALLOW TRENCH ISOLATION STRUCTURE FOR A SEMICONDUCTOR DEVICE

Patent #:	5929658	Issue Dt:	07/27/1999	Application #:	08921818	Filing Dt:	09/02/1997
Title:	CURRENT-MODE SENSE AMPLIFIER

Patent #:	5870345	Issue Dt:	02/09/1999	Application #:	08923300	Filing Dt:	09/04/1997
Title:	TEMPERATURE INDEPENDENT OSCILLATOR

Patent #:	5835425	Issue Dt:	11/10/1998	Application #:	08923459	Filing Dt:	09/04/1997
Title:	DIMENSION PROGRAMMABLE FUSEBANKS AND METHODS FOR MAKING THE SAME

Patent #:	5903512	Issue Dt:	05/11/1999	Application #:	08923593	Filing Dt:	09/04/1997
Title:	CIRCUIT AND METHOD TO EXTERNALLY ADJUST INTERNAL CIRCUIT TIMING

Patent #:	5937541	Issue Dt:	08/17/1999	Application #:	08929711	Filing Dt:	09/15/1997
Title:	SEMICONDUCTOR WAFER TEMPERATURE MEASUREMENT AND CONTROL THEREOF USING GAS TEMPERATURE MEASUREMENT

Patent #:	6075383	Issue Dt:	06/13/2000	Application #:	08930535	Filing Dt:	10/27/1997
Title:	GTL OUTPUT AMPLIFIER FOR COUPLING AN INPUT SIGNAL AT THE INPUT TO A TRANSMISSION LINE AT THE OUTPUT

Patent #:	6034913	Issue Dt:	03/07/2000	Application #:	08932925	Filing Dt:	09/19/1997
Title:	APPARATUS AND METHOD FOR HIGH-SPEED WORDLINE DRIVING WITH LOW AREA OVERHEAD

Patent #:	6537418	Issue Dt:	03/25/2003	Application #:	08934101	Filing Dt:	09/19/1997
Title:	SPATIALLY UNIFORM GAS SUPPLY AND PUMP CONFIGURATION FOR LARGE WAFER DIAMETERS

Patent #:	5891807	Issue Dt:	04/06/1999	Application #:	08937526	Filing Dt:	09/25/1997
Title:	FORMATION OF A BOTTLE SHAPED TRENCH

Patent #:	5848008	Issue Dt:	12/08/1998	Application #:	08937528	Filing Dt:	09/25/1997
Title:	FLOATING BITLINE TEST MODE WITH DIGITALLY CONTROLLABLE BITLINE EQUALIZERS

Patent #:	6078534	Issue Dt:	06/20/2000	Application #:	08937570	Filing Dt:	09/25/1997
Title:	SEMICONDUCTOR MEMORY HAVING REDUNDANCY CIRCUIT

Patent #:	5959471	Issue Dt:	09/28/1999	Application #:	08937571	Filing Dt:	09/25/1997
Title:	A METHOD AND APPARATUS FOR REDUCING THE BIAS CURRENT IN A REFERENCE VOLTAGE CIRCUIT

Patent #:	5956142	Issue Dt:	09/21/1999	Application #:	08937572	Filing Dt:	09/25/1997
Title:	METHOD OF END POINT DETECTION USING A SINUSOIDAL INTERFERENCE SIGNAL FOR A WET ETCH PROCESS

Patent #:	6070004	Issue Dt:	05/30/2000	Application #:	08937764	Filing Dt:	09/25/1997
Title:	METHOD OF MAXIMIZING CHIP YIELD FOR SEMICONDUCTOR WAFERS

Patent #:	6136677	Issue Dt:	10/24/2000	Application #:	08937781	Filing Dt:	09/25/1997
Title:	METHOD OF FABRICATING SEMICONDUCTOR CHIPS WITH SILICIDE AND IMPLANTED JUNCTIONS

Patent #:	6046503	Issue Dt:	04/04/2000	Application #:	08938072	Filing Dt:	09/26/1997
Title:	METALIZATION SYSTEM HAVING AN ENHANCED THERMAL CONDUCTIVITY

Patent #:	5877994	Issue Dt:	03/02/1999	Application #:	08938073	Filing Dt:	09/26/1997
Title:	SPACE-EFFICIENT MDQ SWITCH PLACEMENT

Patent #:	5831912	Issue Dt:	11/03/1998	Application #:	08938074	Filing Dt:	09/26/1997
Title:	SEMICONDUCTOR MEMORY HAVING SPACE-EFFICIENT LAYOUT

Patent #:	6013937	Issue Dt:	01/11/2000	Application #:	08938196	Filing Dt:	09/26/1997
Title:	BUFFER LAYER FOR IMPROVING CONTROL OF LAYER THICKNESS

Patent #:	5935873	Issue Dt:	08/10/1999	Application #:	08939148	Filing Dt:	09/29/1997
Title:	DEPOSITION OF CARBON INTO NITRIDE LAYER FOR IMPROVED SELECTIVITY OF OXIDE TO NITRIDE ETCHRATE FOR SELF ALIGNED CONTACT ETCHING

Patent #:	5977635	Issue Dt:	11/02/1999	Application #:	08939208	Filing Dt:	09/29/1997
Title:	MULTI-LEVEL CONDUCTIVE STRUCTURE INCLUDING LOW CAPACITANCE MATERIAL

Patent #:	5864496	Issue Dt:	01/26/1999	Application #:	08939455	Filing Dt:	09/29/1997
Title:	HIGH DENSITY SEMICONDUCTOR MEMORY HAVING DIAGONAL BIT LINES AND DUAL WORD LINES

Patent #:	5959911	Issue Dt:	09/28/1999	Application #:	08939546	Filing Dt:	09/29/1997
Title:	APPARATUS AND METHOD FOR IMPLEMENTING A BANK INTERLOCK SCHEME AND RELATED TEST MODE FOR MULTIBANK MEMORY DEVICES

Patent #:	5807439	Issue Dt:	09/15/1998	Application #:	08939547	Filing Dt:	09/29/1997
Title:	APPARATUS AND METHOD FOR IMPROVED WASHING AND DRYING OF SEMICONDUCTOR WAFERS

Patent #:	5907771	Issue Dt:	05/25/1999	Application #:	08940233	Filing Dt:	09/30/1997
Title:	REDUCTION OF PAD EROSION

Patent #:	6376348	Issue Dt:	04/23/2002	Application #:	08940235	Filing Dt:	09/30/1997
Title:	RELIABLE POLICIDE GATE STACK WITH REDUCED SHEET RESISTANCE AND THICKNESS

Patent #:	6174756	Issue Dt:	01/16/2001	Application #:	08940236	Filing Dt:	09/30/1997
Title:	SPACERS TO BLOCK DEEP JUNCTION IMPLANTS AND SILICIDE FORMATION IN INTEGRATED CIRCUITS

Patent #:	5981332	Issue Dt:	11/09/1999	Application #:	08940237	Filing Dt:	09/30/1997
Title:	REDUCED PARASITIC LEAKAGE IN SEMICONDUCTOR DEVICES

Patent #:	5880007	Issue Dt:	03/09/1999	Application #:	08940650	Filing Dt:	09/30/1997
Title:	PLANARIZATION OF A NON-CONFORMAL DEVICE LAYER IN SEMICONDUCTOR FABRICATION

Patent #:	6232233	Issue Dt:	05/15/2001	Application #:	08940806	Filing Dt:	09/30/1997
Title:	METHODS FOR PERFORMING PLANARIZATION AND RECESS ETCHES AND APPARATUS THEREFOR

Patent #:	6127721	Issue Dt:	10/03/2000	Application #:	08940807	Filing Dt:	09/30/1997
Title:	SOFT PASSIVATION LAYER IN SEMICONDUCTOR FABRICATION

Patent #:	5928959	Issue Dt:	07/27/1999	Application #:	08940808	Filing Dt:	09/30/1997
Title:	DISHING RESISTANCE

Patent #:	5923605	Issue Dt:	07/13/1999	Application #:	08940861	Filing Dt:	09/29/1997
Title:	SPACE-EFFICIENT SEMICONDUCTOR MEMORY HAVING HIERARCHICAL COLUMN SELECT LINE ARCHITECTURE

Patent #:	5939937	Issue Dt:	08/17/1999	Application #:	08940862	Filing Dt:	09/29/1997
Title:	CONSTANT CURRENT CMOS OUTPUT DRIVER CIRCUIT WITH DUAL GATE TRANSISTOR DEVICES

Patent #:	6020091	Issue Dt:	02/01/2000	Application #:	08940891	Filing Dt:	09/30/1997
Title:	HARD ETCH MASK

Patent #:	6071820	Issue Dt:	06/06/2000	Application #:	08940892	Filing Dt:	09/30/1997
Title:	METHOD FOR PATTERNING INTEGRATED CIRCUIT CONDUCTORS

Patent #:	6066569	Issue Dt:	05/23/2000	Application #:	08940895	Filing Dt:	09/30/1997
Title:	DUAL DAMASCENE PROCESS FOR METAL LAYERS AND ORGANIC INTERMETAL LAYERS

Patent #:	5942925	Issue Dt:	08/24/1999	Application #:	08940899	Filing Dt:	09/30/1997
Title:	POWER-ON DETECTION AND ENABLING CIRCUIT WITH VERY FAST DETECTION OF POWER-OFF

Patent #:	5955380	Issue Dt:	09/21/1999	Application #:	08941093	Filing Dt:	09/30/1997
Title:	ENDPOINT DETECTION METHOD AND APPARATUS

Patent #:	6090671	Issue Dt:	07/18/2000	Application #:	08941600	Filing Dt:	09/30/1997
Title:	REDUCTION OF GATE-INDUCED DRAIN LEAKAGE IN SEMICONDUCTOR DEVICES

Patent #:	5982673	Issue Dt:	11/09/1999	Application #:	08941606	Filing Dt:	09/30/1997
Title:	SECONDARY SENSE AMPLIFIER WITH WINDOW DISCRIMINATOR FOR SELF-TIMED OPERATION

Patent #:	6096654	Issue Dt:	08/01/2000	Application #:	08942273	Filing Dt:	09/30/1997
Title:	GAPFILL OF SEMICONDUCTOR STRUCTURE USING DOPED SILICATE GLASSES

Patent #:	5966315	Issue Dt:	10/12/1999	Application #:	08942275	Filing Dt:	09/30/1997
Title:	SEMICONDUCTOR MEMORY HAVING HIERARCHICAL BIT LINE ARCHITECTURE WITH NON-UNIFORM LOCAL BIT LINES

Patent #:	5867420	Issue Dt:	02/02/1999	Application #:	08943910	Filing Dt:	09/30/1997
Title:	REDUCING OXIDATION STRESS IN THE FABRICATION OF DEVICES

Patent #:	5986464	Issue Dt:	11/16/1999	Application #:	08959257	Filing Dt:	10/29/1997
Title:	THRESHOLD LOGIC CIRCUIT WITH LOW SPACE REQUIREMENT

Patent #:	5937367	Issue Dt:	08/10/1999	Application #:	08963590	Filing Dt:	11/04/1997
Title:	METHOD FOR TESTING A MEMORY CHIP, DIVIDED INTO CELL ARRAYS, DURING ONGOING OPERATION OF A COMPUTER WHILE MAINTAINING REAL-TIME CONDITIONS

Patent #:	6303391	Issue Dt:	10/16/2001	Application #:	08975087	Filing Dt:	11/20/1997
Title:	LOW TEMPERATURE CHEMICAL VAPOR DEPOSITION PROCESS FOR FORMING BISMUTH-CONTAINING CERAMIC FILMS USEFUL IN FERROELECTRIC MEMORY DEVICES

100

Patent #:	6162564	Issue Dt:	12/19/2000	Application #:	08978354	Filing Dt:	11/25/1997
Title:	MASK BLANK AND METHOD OF PRODUCING MASK

Assignor

QIMONDA AG

Exec Dt:

10/09/2014

Assignee

INFINEON TECHNOLOGIES AG

AM CAMPEON 1-12

NEUBIBERG, GERMANY 85579

Correspondence name and address
	CPA GLOBAL LIMITED
	LIBERATION HOUSE
	CASTLE STREET
	ST HELIER, JE1 1BL JERSEY

Search Results as of: 05/23/2024 10:34 AM

If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6

Web interface last modified: August 25, 2017 v.2.6