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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 20 of 148
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1
Patent #:
6961876
Issue Dt:
11/01/2005
Application #:
09961014
Filing Dt:
09/21/2001
Publication #:
US20030061377
Pub Dt:
03/27/2003
Title:
AUTOMATIC HANDLING OF LINK FAILURES
2
Patent #:
6562662
Issue Dt:
05/13/2003
Application #:
09962817
Filing Dt:
09/25/2001
Publication #:
US20020011668
Pub Dt:
01/31/2002
Title:
ELECTRONIC PACKAGE WITH BONDED STRUCTURE AND METHOD OF MAKING
3
Patent #:
6689650
Issue Dt:
02/10/2004
Application #:
09965288
Filing Dt:
09/27/2001
Publication #:
US20030057486
Pub Dt:
03/27/2003
Title:
FIN FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED GATE
4
Patent #:
6656798
Issue Dt:
12/02/2003
Application #:
09965919
Filing Dt:
09/28/2001
Publication #:
US20030067035
Pub Dt:
04/10/2003
Title:
GATE PROCESSING METHOD WITH REDUCED GATE OXIDE CORNER AND EDGE THINNING
5
Patent #:
6646345
Issue Dt:
11/11/2003
Application #:
09966629
Filing Dt:
09/27/2001
Publication #:
US20020123220
Pub Dt:
09/05/2002
Title:
METHOD FOR FORMING CO-W-P-AU FILMS
6
Patent #:
6437443
Issue Dt:
08/20/2002
Application #:
09966834
Filing Dt:
09/27/2001
Publication #:
US20020034625
Pub Dt:
03/21/2002
Title:
MULTIPHASE LOW DIELECTRIC CONSTANT MATERIAL AND METHOD OF DEPOSITION
7
Patent #:
6479110
Issue Dt:
11/12/2002
Application #:
09966836
Filing Dt:
09/27/2001
Publication #:
US20020037442
Pub Dt:
03/28/2002
Title:
MULTIPHASE LOW DIELECTRIC CONSTANT MATERIAL AND METHOD OF DEPOSITION
8
Patent #:
6630715
Issue Dt:
10/07/2003
Application #:
09968219
Filing Dt:
10/01/2001
Publication #:
US20030064574
Pub Dt:
04/03/2003
Title:
ASYMMETRICAL MOSFET LAYOUT FOR HIGH CURRENTS AND HIGH SPEED OPERATION
9
Patent #:
NONE
Issue Dt:
Application #:
09968793
Filing Dt:
10/03/2001
Publication #:
US20030094660
Pub Dt:
05/22/2003
Title:
Method for fabricating different gate oxide thickness within the same chip
10
Patent #:
6487101
Issue Dt:
11/26/2002
Application #:
09968814
Filing Dt:
10/02/2001
Title:
USE OF SEARCH LINES AS GLOBAL BITLINES IN A CAM DESIGN
11
Patent #:
6704839
Issue Dt:
03/09/2004
Application #:
09969571
Filing Dt:
10/01/2001
Publication #:
US20020046322
Pub Dt:
04/18/2002
Title:
DATA STORAGE SYSTEM AND METHOD OF STORING DATA
12
Patent #:
6658633
Issue Dt:
12/02/2003
Application #:
09969675
Filing Dt:
10/03/2001
Publication #:
US20030093764
Pub Dt:
05/15/2003
Title:
AUTOMATED SYSTEM-ON-CHIP INTEGRATED CIRCUIT DESIGN VERIFICATION SYSTEM
13
Patent #:
6764551
Issue Dt:
07/20/2004
Application #:
09971820
Filing Dt:
10/05/2001
Publication #:
US20030066542
Pub Dt:
04/10/2003
Title:
PROCESS FOR REMOVING DOPANT IONS FROM A SUBSTRATE
14
Patent #:
6552938
Issue Dt:
04/22/2003
Application #:
09971840
Filing Dt:
10/05/2001
Publication #:
US20030067816
Pub Dt:
04/10/2003
Title:
COLUMN REDUNDANCY SYSTEM AND METHOD FOR EMBEDDED DRAM DEVICES WITH MULTIBANKING CAPABILITY
15
Patent #:
NONE
Issue Dt:
Application #:
09972622
Filing Dt:
10/09/2001
Publication #:
US20020011001
Pub Dt:
01/31/2002
Title:
HIGH DENSITY INTEGRAL TEST PROBE APPARATUS FOR TESTING ELECTRONIC DEVICES
16
Patent #:
6656693
Issue Dt:
12/02/2003
Application #:
09972958
Filing Dt:
10/10/2001
Publication #:
US20020098500
Pub Dt:
07/25/2002
Title:
SELF ASSEMBLED NANO-DEVICES USING DNA
17
Patent #:
NONE
Issue Dt:
Application #:
09974403
Filing Dt:
10/10/2001
Publication #:
US20020028554
Pub Dt:
03/07/2002
Title:
Formulation of multiple gate oxides thicknesses without exposing gate oxide or silicon surface to photoresist
18
Patent #:
6529084
Issue Dt:
03/04/2003
Application #:
09974986
Filing Dt:
10/11/2001
Title:
INTERLEAVED FEEDFORWARD VCO AND PLL
19
Patent #:
6848914
Issue Dt:
02/01/2005
Application #:
09975213
Filing Dt:
10/11/2001
Publication #:
US20030073329
Pub Dt:
04/17/2003
Title:
ELECTRICAL COUPLING OF SUBSTRATES BY CONDUCTIVE BUTTONS
20
Patent #:
6756257
Issue Dt:
06/29/2004
Application #:
09975435
Filing Dt:
10/11/2001
Publication #:
US20030104681
Pub Dt:
06/05/2003
Title:
PATTERNED SOI REGIONS ON SEMICONDUCTOR CHIPS
21
Patent #:
6538522
Issue Dt:
03/25/2003
Application #:
09977423
Filing Dt:
10/15/2001
Publication #:
US20030071692
Pub Dt:
04/17/2003
Title:
METHOD AND RING OSCILLATOR FOR EVALUATING DYNAMIC CIRCUITS
22
Patent #:
6975398
Issue Dt:
12/13/2005
Application #:
09977793
Filing Dt:
10/15/2001
Publication #:
US20030071997
Pub Dt:
04/17/2003
Title:
METHOD FOR DETERMINING SEMICONDUCTOR OVERLAY ON GROUNDRULE DEVICES
23
Patent #:
6670717
Issue Dt:
12/30/2003
Application #:
09977807
Filing Dt:
10/15/2001
Publication #:
US20030071361
Pub Dt:
04/17/2003
Title:
STRUCTURE AND METHOD FOR CHARGE SENSITIVE ELECTRICAL DEVICES
24
Patent #:
6652290
Issue Dt:
11/25/2003
Application #:
09978128
Filing Dt:
10/15/2001
Publication #:
US20020019153
Pub Dt:
02/14/2002
Title:
CONNECTING DEVICES AND METHOD FOR INTERCONNECTING CIRCUIT COMPONENTS
25
Patent #:
NONE
Issue Dt:
Application #:
09982207
Filing Dt:
10/18/2001
Publication #:
US20020022315
Pub Dt:
02/21/2002
Title:
Self-aligned damascene interconnect
26
Patent #:
6432787
Issue Dt:
08/13/2002
Application #:
09982822
Filing Dt:
10/22/2001
Publication #:
US20020028559
Pub Dt:
03/07/2002
Title:
METHOD AND APPARATUS FOR PROVIDING LOW-GIDL DUAL WORKFUNCTION GATE DOPING WITH BORDERLESS DIFFUSION CONTACT
27
Patent #:
6541351
Issue Dt:
04/01/2003
Application #:
09989585
Filing Dt:
11/20/2001
Title:
METHOD FOR LIMITING DIVOT FORMATION IN POST SHALLOW TRENCH ISOLATION PROCESSES
28
Patent #:
6858502
Issue Dt:
02/22/2005
Application #:
09989770
Filing Dt:
11/20/2001
Publication #:
US20020125475
Pub Dt:
09/12/2002
Title:
HIGH SPEED COMPOSITE P-CHANNEL SI/SIGE HETEROSTRUCTURE FOR FIELD EFFECT DEVICES
29
Patent #:
7064416
Issue Dt:
06/20/2006
Application #:
09991142
Filing Dt:
11/16/2001
Publication #:
US20030094673
Pub Dt:
05/22/2003
Title:
SEMICONDUCTOR DEVICE AND METHOD HAVING MULTIPLE SUBCOLLECTORS FORMED ON A COMMON WAFER
30
Patent #:
6559543
Issue Dt:
05/06/2003
Application #:
09991769
Filing Dt:
11/16/2001
Publication #:
US20030094696
Pub Dt:
05/22/2003
Title:
STACKED FILL STRUCTURES FOR SUPPORT OF DIELECTRIC LAYERS
31
Patent #:
6649531
Issue Dt:
11/18/2003
Application #:
09994340
Filing Dt:
11/26/2001
Publication #:
US20030100190
Pub Dt:
05/29/2003
Title:
PROCESS FOR FORMING A DAMASCENE STRUCTURE
32
Patent #:
6753606
Issue Dt:
06/22/2004
Application #:
09994954
Filing Dt:
11/27/2001
Publication #:
US20020042197
Pub Dt:
04/11/2002
Title:
METHOD AND STRUCTURE FOR REDUCTION OF CONTACT RESISTANCE OF METAL SILICIDES USING A METAL-GERMANIUM ALLOY
33
Patent #:
NONE
Issue Dt:
Application #:
09995031
Filing Dt:
11/29/2001
Publication #:
US20030098489
Pub Dt:
05/29/2003
Title:
High temperature processing compatible metal gate electrode for pFETS and methods for fabrication
34
Patent #:
6993107
Issue Dt:
01/31/2006
Application #:
09996053
Filing Dt:
11/28/2001
Publication #:
US20020136343
Pub Dt:
09/26/2002
Title:
ANALOG UNIDIRECTIONAL SERIAL LINK ARCHITECTURE
35
Patent #:
6836029
Issue Dt:
12/28/2004
Application #:
09996148
Filing Dt:
11/28/2001
Publication #:
US20030098618
Pub Dt:
05/29/2003
Title:
MICRO-ELECTROMECHANICAL SWITCH HAVING A CONDUCTIVE COMPRESSIBLE ELECTRODE
36
Patent #:
6789033
Issue Dt:
09/07/2004
Application #:
09996399
Filing Dt:
11/29/2001
Publication #:
US20030101013
Pub Dt:
05/29/2003
Title:
APPARATUS AND METHOD FOR CHARACTERIZING FEATURES AT SMALL DIMENSIONS
37
Patent #:
6420254
Issue Dt:
07/16/2002
Application #:
09996538
Filing Dt:
11/28/2001
Publication #:
US20020053740
Pub Dt:
05/09/2002
Title:
RECESSED BOND PAD
38
Patent #:
6649959
Issue Dt:
11/18/2003
Application #:
09996731
Filing Dt:
11/30/2001
Publication #:
US20020034844
Pub Dt:
03/21/2002
Title:
METHOD FOR INCREASING A VERY-LARGE-SCALE-INTEGRATED (VLSI) CAPACITOR SIZE ON BULK SILICON AND SILICON-ON-INSULATOR (SOI) WAFERS AND STRUCTURE FORMED THEREBY
39
Patent #:
6609245
Issue Dt:
08/19/2003
Application #:
09997657
Filing Dt:
11/29/2001
Publication #:
US20030101430
Pub Dt:
05/29/2003
Title:
PRIORITY COLORING FOR VLSI DESIGNS
40
Patent #:
6557163
Issue Dt:
04/29/2003
Application #:
09997904
Filing Dt:
11/30/2001
Title:
METHOD OF PHOTOLITHOGRAPHIC CRITICAL BY USING RETICLE MEASUREMENTS IN A CONTROL ALGORITHM
41
Patent #:
7087267
Issue Dt:
08/08/2006
Application #:
09998007
Filing Dt:
11/29/2001
Publication #:
US20030132121
Pub Dt:
07/17/2003
Title:
MATERIALS AND METHODS FOR IMMOBILIZATION OF CATALYSTS ON SURFACES AND FOR SELECTIVE ELECTROLESS METALLIZATION
42
Patent #:
6590259
Issue Dt:
07/08/2003
Application #:
10000198
Filing Dt:
11/02/2001
Publication #:
US20020064913
Pub Dt:
05/30/2002
Title:
SEMICONDUCTOR DEVICE OF AN EMBEDDED DRAM ON SOI SUBSTRATE
43
Patent #:
6509221
Issue Dt:
01/21/2003
Application #:
10000695
Filing Dt:
11/15/2001
Title:
METHOD FOR FORMING HIGH PERFORMANCE CMOS DEVICES WITH ELEVATED SIDEWALL SPACERS
44
Patent #:
6650021
Issue Dt:
11/18/2003
Application #:
10005951
Filing Dt:
12/03/2001
Publication #:
US20020053746
Pub Dt:
05/09/2002
Title:
RECESSED BOND PAD
45
Patent #:
6698003
Issue Dt:
02/24/2004
Application #:
10006076
Filing Dt:
12/06/2001
Publication #:
US20030110455
Pub Dt:
06/12/2003
Title:
FRAMEWORK FOR MULTIPLE-ENGINE BASED VERIFICATION TOOLS FOR INTEGRATED CIRCUITS
46
Patent #:
6602772
Issue Dt:
08/05/2003
Application #:
10006969
Filing Dt:
12/04/2001
Publication #:
US20020070675
Pub Dt:
06/13/2002
Title:
METHOD FOR NON-CONTACT STRESS EVALUATION OF WAFER GATE DIELECTRIC RELIABILITY
47
Patent #:
6803642
Issue Dt:
10/12/2004
Application #:
10008383
Filing Dt:
12/06/2001
Publication #:
US20030109109
Pub Dt:
06/12/2003
Title:
BIPOLAR DEVICE HAVING NON-UNIFORM DEPTH BASE-EMITTER JUNCTION
48
Patent #:
6967351
Issue Dt:
11/22/2005
Application #:
10011351
Filing Dt:
12/04/2001
Publication #:
US20030102518
Pub Dt:
06/05/2003
Title:
FINFET SRAM CELL USING LOW MOBILITY PLANE FOR CELL STABILITY AND METHOD FOR FORMING
49
Patent #:
6657259
Issue Dt:
12/02/2003
Application #:
10011846
Filing Dt:
12/04/2001
Publication #:
US20030102497
Pub Dt:
06/05/2003
Title:
MULTIPLE-PLANE FINFET CMOS
50
Patent #:
6722031
Issue Dt:
04/20/2004
Application #:
10012426
Filing Dt:
12/07/2001
Publication #:
US20020050402
Pub Dt:
05/02/2002
Title:
METHOD FOR MAKING PRINTED CIRCUIT BOARD HAVING LOW COEFFICIENT OF THEMAL EXPANSION POWER/GROUND PLANE
51
Patent #:
6678569
Issue Dt:
01/13/2004
Application #:
10013070
Filing Dt:
11/06/2001
Publication #:
US20020062162
Pub Dt:
05/23/2002
Title:
USER CONFIGURABLE MULTIVARIATE TIME SERIES REDUCTION TOOL CONTROL METHOD
52
Patent #:
NONE
Issue Dt:
Application #:
10013797
Filing Dt:
12/10/2001
Publication #:
US20030107111
Pub Dt:
06/12/2003
Title:
A 3-D MICROELECTRONIC STRUCTURE INCLUDING A VERTICAL THERMAL NITRIDE MASK
53
Patent #:
6635506
Issue Dt:
10/21/2003
Application #:
10014660
Filing Dt:
11/07/2001
Publication #:
US20030148550
Pub Dt:
08/07/2003
Title:
METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
54
Patent #:
7026643
Issue Dt:
04/11/2006
Application #:
10014766
Filing Dt:
12/11/2001
Publication #:
US20020164835
Pub Dt:
11/07/2002
Title:
ORGANIC N-CHANNEL SEMICONDUCTOR DEVICE OF N,N' 3,4,9,10 PERYLENE TETRACARBOXYLIC DIIMIDE
55
Patent #:
NONE
Issue Dt:
Application #:
10015224
Filing Dt:
12/13/2001
Publication #:
US20030115559
Pub Dt:
06/19/2003
Title:
Hardware validation through binary decision diagrams including functions and equalities
56
Patent #:
6613602
Issue Dt:
09/02/2003
Application #:
10015239
Filing Dt:
12/13/2001
Publication #:
US20030113950
Pub Dt:
06/19/2003
Title:
MONOLITHICALLY INTEGRATED COLD POINT THERMOELECTRIC COOLER
57
Patent #:
6559030
Issue Dt:
05/06/2003
Application #:
10015987
Filing Dt:
12/13/2001
Title:
METHOD OF FORMING A RECESSED POLYSILICON FILLED TRENCH
58
Patent #:
6442055
Issue Dt:
08/27/2002
Application #:
10016025
Filing Dt:
12/12/2001
Title:
SYSTEM AND METHOD FOR CONSERVING POWER IN A CONTENT ADDRESSABLE MEMORY BY PROVIDING AN INDEPENDENT SEARCH LINE VOLTAGE
59
Patent #:
6975199
Issue Dt:
12/13/2005
Application #:
10016090
Filing Dt:
12/13/2001
Publication #:
US20030112114
Pub Dt:
06/19/2003
Title:
EMBEDDED INDUCTOR AND METHOD OF MAKING
60
Patent #:
6777737
Issue Dt:
08/17/2004
Application #:
10016605
Filing Dt:
10/30/2001
Publication #:
US20030082876
Pub Dt:
05/01/2003
Title:
VERTICAL DRAM PUNCHTHROUGH STOP SELF-ALIGNED TO STORAGE TRENCH
61
Patent #:
6806730
Issue Dt:
10/19/2004
Application #:
10016772
Filing Dt:
12/10/2001
Publication #:
US20030107399
Pub Dt:
06/12/2003
Title:
METHOD AND SYSTEM FOR USE OF AN EMBEDDED FIELD PROGRAMMABLE GATE ARRAY INTERCONNECT FOR FLEXIBLE I/O CONNECTIVITY
62
Patent #:
6910092
Issue Dt:
06/21/2005
Application #:
10016800
Filing Dt:
12/10/2001
Publication #:
US20030110339
Pub Dt:
06/12/2003
Title:
CHIP TO CHIP INTERFACE FOR INTERCONNECTING CHIPS
63
Patent #:
6569707
Issue Dt:
05/27/2003
Application #:
10020698
Filing Dt:
10/29/2001
Publication #:
US20020045289
Pub Dt:
04/18/2002
Title:
METHOD FOR IMPROVING PERFORMANCE OF ORGANIC SEMICONDUCTORS IN BOTTOM ELECTRODE STRUCTURE
64
Patent #:
6679625
Issue Dt:
01/20/2004
Application #:
10022162
Filing Dt:
12/17/2001
Publication #:
US20030112844
Pub Dt:
06/19/2003
Title:
SCANNING HEAT FLOW PROBE
65
Patent #:
8417503
Issue Dt:
04/09/2013
Application #:
10023235
Filing Dt:
12/17/2001
Publication #:
US20030114944
Pub Dt:
06/19/2003
Title:
SYSTEM AND METHOD FOR TARGET-BASED COMPACT MODELING
66
Patent #:
6982844
Issue Dt:
01/03/2006
Application #:
10026029
Filing Dt:
12/18/2001
Publication #:
US20030112542
Pub Dt:
06/19/2003
Title:
OPTICAL APERTURE FOR DATA RECORDING HAVING TRANSMISSION ENHANCED BY SURFACE PLASMON RESONANCE
67
Patent #:
6803662
Issue Dt:
10/12/2004
Application #:
10026117
Filing Dt:
12/21/2001
Publication #:
US20030116855
Pub Dt:
06/26/2003
Title:
LOW DIELECTRIC CONSTANT MATERIAL REINFORCEMENT FOR IMPROVED ELECTROMIGRATION RELIABILITY
68
Patent #:
NONE
Issue Dt:
Application #:
10026119
Filing Dt:
12/21/2001
Publication #:
US20030116784
Pub Dt:
06/26/2003
Title:
DRAM array bit contact with relaxed pitch pattern
69
Patent #:
6770418
Issue Dt:
08/03/2004
Application #:
10026120
Filing Dt:
12/21/2001
Publication #:
US20030124453
Pub Dt:
07/03/2003
Title:
POSITIVE RESIST COMPOSITIONS CONTAINING NON-POLYMERIC SILICON ADITIVES
70
Patent #:
NONE
Issue Dt:
Application #:
10026176
Filing Dt:
12/21/2001
Publication #:
US20030116439
Pub Dt:
06/26/2003
Title:
Method for forming encapsulated metal interconnect structures in semiconductor integrated circuit devices
71
Patent #:
6818381
Issue Dt:
11/16/2004
Application #:
10026184
Filing Dt:
12/21/2001
Publication #:
US20020058204
Pub Dt:
05/16/2002
Title:
UNDERLAYER COMPOSITIONS FOR MULTILAYER LITHOGRAPHIC PROCESSES
72
Patent #:
6496356
Issue Dt:
12/17/2002
Application #:
10026873
Filing Dt:
12/21/2001
Publication #:
US20020080556
Pub Dt:
06/27/2002
Title:
MULTILAYER CAPACITANCE STRUCTURE AND CIRCUIT BOARD CONTAINING THE SAME AND METHOD OF FORMING THE SAME
73
Patent #:
7469403
Issue Dt:
12/23/2008
Application #:
10032567
Filing Dt:
01/02/2002
Publication #:
US20020188651
Pub Dt:
12/12/2002
Title:
STATIC DETECTION OF A DATARACE CONDITION FOR MULTITHREADED OBJECT-ORIENTED APPLICATIONS
74
Patent #:
6667528
Issue Dt:
12/23/2003
Application #:
10033902
Filing Dt:
01/03/2002
Publication #:
US20030122210
Pub Dt:
07/03/2003
Title:
SEMICONDUCTOR-ON-INSULATOR LATERAL P-I-N PHOTODETECTOR WITH A REFLECTING MIRROR AND BACKSIDE CONTACT AND METHOD FOR FORMING THE SAME
75
Patent #:
6653698
Issue Dt:
11/25/2003
Application #:
10034009
Filing Dt:
12/20/2001
Publication #:
US20030119292
Pub Dt:
06/26/2003
Title:
INTEGRATION OF DUAL WORKFUNCTION METAL GATE CMOS DEVICES
76
Patent #:
6842237
Issue Dt:
01/11/2005
Application #:
10035061
Filing Dt:
12/28/2001
Publication #:
US20030123052
Pub Dt:
07/03/2003
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Title:
Integration scheme for advanced BEOL metallization including low-k cap layer and method thereof
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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