|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10349248
|
Filing Dt:
|
01/21/2003
|
Publication #:
|
|
Pub Dt:
|
04/22/2004
| | | | |
Title:
|
Multi-service packet network interface
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10349377
|
Filing Dt:
|
01/21/2003
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
Title:
|
Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
|
|
|
Patent #:
|
|
Issue Dt:
|
12/08/2009
|
Application #:
|
10349450
|
Filing Dt:
|
01/22/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
SIGNAL LINE SELECTION AND POLARITY CHANGE OF NATURAL BIT ORDERING IN HIGH-SPEED SERIAL BIT STREAM MULTIPLEXING AND DEMULTIPLEXING INTEGRATED CIRCUITS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10349493
|
Filing Dt:
|
01/22/2003
|
Publication #:
|
|
Pub Dt:
|
10/14/2004
| | | | |
Title:
|
Method and apparatus for locating a mobile receiver having a position cache
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
10349560
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
BUILT-IN-SELF TEST FOR HIGH-SPEED SERIAL BIT STREAM MULTIPLEXING AND DEMULTIPLEXING CHIP SET
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2007
|
Application #:
|
10349634
|
Filing Dt:
|
01/22/2003
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
Title:
|
SYSTEM AND METHOD OF TRANSMISSION AND RECEPTION OF PROGRESSIVE CONTENT WITH ISOLATED FIELDS FOR CONVERSION TO INTERLACED DISPLAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
10349663
|
Filing Dt:
|
01/22/2003
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
Title:
|
SYSTEM AND METHOD OF TRANSMISSION AND DISPLAY OF PROGRESSIVE VIDEO WITH HINTS FOR INTERLACED DISPLAY
|
|
|
Patent #:
|
|
Issue Dt:
|
11/15/2016
|
Application #:
|
10349705
|
Filing Dt:
|
01/22/2003
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
Title:
|
SYSTEM AND METHOD OF TRANSMISSION AND RECEPTION OF VIDEO USING COMPRESSED DIFFERENTIAL TIME STAMPS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10349739
|
Filing Dt:
|
01/21/2003
|
Publication #:
|
|
Pub Dt:
|
06/12/2003
| | | | |
Title:
|
Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2012
|
Application #:
|
10350279
|
Filing Dt:
|
01/24/2003
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
Title:
|
ASYMMETRIC DIGITAL SUBSCRIBER LINE MODEM APPARATUS AND METHODS THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2006
|
Application #:
|
10350286
|
Filing Dt:
|
01/24/2003
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR IMPLEMENTING SLICE INSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
10350287
|
Filing Dt:
|
01/24/2003
|
Publication #:
|
|
Pub Dt:
|
01/01/2004
| | | | |
Title:
|
METHOD AND SYSTEM FOR SYNCHRONIZING PROCESSOR AND DMA USING OWNERSHIP FLAGS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/27/2007
|
Application #:
|
10350294
|
Filing Dt:
|
01/24/2003
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR IMPLEMENTING A CONDITIONAL ONE'S COMPLEMENT OF PARTIAL ADDRESS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2010
|
Application #:
|
10350296
|
Filing Dt:
|
01/24/2003
|
Publication #:
|
|
Pub Dt:
|
12/04/2003
| | | | |
Title:
|
METHOD AND SYSTEM FOR COPYING DMA WITH SEPARATE STRIDES BY A MODULO-N COUNTER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
10350902
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
Title:
|
CRYPTOGRAPHY ACCELERATOR INTERFACE DECOUPLING FROM CRYPTOGRAPHY PROCESSING CORES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10350907
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
Title:
|
Cryptography accelerator input interface data handling
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2008
|
Application #:
|
10350922
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
Title:
|
CRYPTOGRAPHY ACCELERATOR DATA ROUTING UNIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2003
|
Application #:
|
10350991
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
Title:
|
CAM CIRCUIT WITH SEPARATE MEMORY AND LOGIC OPERATING VOLTAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2007
|
Application #:
|
10351258
|
Filing Dt:
|
01/23/2003
|
Publication #:
|
|
Pub Dt:
|
06/24/2004
| | | | |
Title:
|
METHODS AND APPARATUS FOR ORDERING DATA IN A CRYPTOGRAPHY ACCELERATOR
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10351487
|
Filing Dt:
|
01/27/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
Scalable packet filter for a network device
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2010
|
Application #:
|
10351492
|
Filing Dt:
|
01/27/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
SHARED WEIGHTED FAIR QUEUING (WFQ) SHAPER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
10351517
|
Filing Dt:
|
01/27/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
TOPOLOGY DISCOVERY PROCESS AND MECHANISM FOR A NETWORK OF MANAGED DEVICES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10351520
|
Filing Dt:
|
01/27/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
Weighted fair queuing (WFQ) shaper
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
10352244
|
Filing Dt:
|
01/28/2003
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
UPSTREAM FREQUENCY CONTROL FOR DOCSIS BASED SATELLITE SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
10352251
|
Filing Dt:
|
01/28/2003
|
Publication #:
|
|
Pub Dt:
|
07/29/2004
| | | | |
Title:
|
UPSTREAM ADAPTIVE MODULATION IN DOCSIS BASED APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2005
|
Application #:
|
10352417
|
Filing Dt:
|
01/28/2003
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
Title:
|
MEMORY CELL WITH FUSE ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/30/2007
|
Application #:
|
10352423
|
Filing Dt:
|
01/28/2003
|
Publication #:
|
|
Pub Dt:
|
08/12/2004
| | | | |
Title:
|
ENCAPSULATION MECHANISM FOR PACKET PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2007
|
Application #:
|
10353053
|
Filing Dt:
|
01/29/2003
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
Title:
|
FILTERING AND FORWARDING FRAMES AT AN OPTICAL NETWORK NODE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
10353054
|
Filing Dt:
|
01/29/2003
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
Title:
|
FILTERING AND FORWARDING FRAMES AT AN OPTICAL LINE TERMINAL
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
10353438
|
Filing Dt:
|
01/29/2003
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
Title:
|
EYE MONITORING AND RECONSTRUCTION USING CDR AND SUB-SAMPLING ADC
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10353440
|
Filing Dt:
|
01/29/2003
|
Publication #:
|
|
Pub Dt:
|
10/28/2004
| | | | |
Title:
|
Method and system for wakeup packet detection at Gigabit speeds
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
10353939
|
Filing Dt:
|
01/30/2003
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
Title:
|
GAIN CONTROL METHODS AND SYSTEMS IN AN AMPLIFIER ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2008
|
Application #:
|
10353940
|
Filing Dt:
|
01/30/2003
|
Publication #:
|
|
Pub Dt:
|
06/03/2004
| | | | |
Title:
|
AMPLIFIER ASSEMBLY INCLUDING VARIABLE GAIN AMPLIFIER, PARALLEL PROGRAMMABLE AMPLIFIERS, AND AGC
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2005
|
Application #:
|
10354068
|
Filing Dt:
|
01/30/2003
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
Title:
|
SEMI-SUSPENDED COPLANAR WAVEGUIDE ON A PRINTED CIRCUIT BOARD
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10354159
|
Filing Dt:
|
01/30/2003
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
Title:
|
HARDWARE-EFFICIENT IMPLEMENTATION OF DYNAMIC ELEMENT MATCHING IN SIGMA-DELTA DAC'S
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2005
|
Application #:
|
10355112
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
Title:
|
MULTI-CONCENTRIC PAD ARRANGEMENTS FOR INTEGRATED CIRCUIT PADS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/2004
|
Application #:
|
10355237
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
03/04/2004
| | | | |
Title:
|
METHODS AND SYSTEMS FOR PROGRAMMABLE MEMORY USING SILICIDED POLY-SILICON FUSES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2007
|
Application #:
|
10355260
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROGRAMMING A MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
10355467
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
Title:
|
CONTENT ADDRESSABLE MEMORY CELL TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
10355472
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
Title:
|
TRANSCEIVER SYSTEM AND METHOD SUPPORTING VARIABLE RATES AND MULTIPLE PROTOCOLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/30/2007
|
Application #:
|
10355848
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
TRANSITION INSENSITIVE TIMING RECOVERY METHOD AND APPARATUS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
10356321
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/19/2004
| | | | |
Title:
|
SCALABLE CACHE COHERENT DISTRIBUTED SHARED MEMORY PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
10356323
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
EFFICIENT ROUTING OF PACKET DATA IN A SCALABLE PROCESSING RESOURCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2008
|
Application #:
|
10356324
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
Title:
|
PROCESSING OF RECEIVED DATA WITHIN A MULTIPLE PROCESSOR DEVICE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10356346
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
Bandwidth allocation fairness within a processing system of a plurality of processing devices
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10356348
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
Transmitting data from a plurality of virtual channels via a multiple processor device
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10356390
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
Multiple processor integrated circuit having configurable packet-based interfaces
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
10356661
|
Filing Dt:
|
01/31/2003
|
Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
Title:
|
PACKET DATA SERVICE OVER HYPER TRANSPORT LINK(S)
|
|
|
Patent #:
|
|
Issue Dt:
|
01/22/2008
|
Application #:
|
10357124
|
Filing Dt:
|
02/03/2003
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR EFFICIENT MATRIX MULTIPLICATION IN A DIRECT SEQUENCE CDMA SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
10357795
|
Filing Dt:
|
02/04/2003
|
Publication #:
|
|
Pub Dt:
|
01/29/2004
| | | | |
Title:
|
WIRELESS ACCESS POINT SERVICE COVERAGE AREA MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
10358222
|
Filing Dt:
|
02/05/2003
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
Title:
|
FAST-PATH IMPLEMENTATION FOR TRANSPARENT LAN SERVICES USING DOUBLE TAGGING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
10358315
|
Filing Dt:
|
02/05/2003
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
Title:
|
FAST-PATH IMPLEMENTATION FOR A DOUBLE TAGGING LOOPBACK ENGINE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10359140
|
Filing Dt:
|
02/06/2003
|
Publication #:
|
|
Pub Dt:
|
06/17/2004
| | | | |
Title:
|
ECCENTRIC SPIRAL ANTENNA AND METHOD FOR MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
10359201
|
Filing Dt:
|
02/06/2003
|
Publication #:
|
|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
SUBRANGING ANALOG TO DIGITAL CONVERTER WITH MULTI-PHASE CLOCK TIMING
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10359432
|
Filing Dt:
|
02/05/2003
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
Title:
|
Method and system for providing a hardware sort in a graphics system
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10359468
|
Filing Dt:
|
02/05/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR LOCATING MOBILE RECEIVERS USING A WIDE AREA REFERENCE NETWORK FOR PROPAGATING EPHEMERIS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10360178
|
Filing Dt:
|
02/07/2003
|
Title:
|
WIRELESS LOCAL AREA NETWORK MANAGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2009
|
Application #:
|
10360591
|
Filing Dt:
|
02/06/2003
|
Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
RADIO FREQUENCY COMMUNICATION NETWORK HAVING ADAPTIVE COMMUNICATION PARAMETERS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10360810
|
Filing Dt:
|
02/10/2003
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
Title:
|
BIASING SCHEME FOR LOW SUPPLY HEADROOM APPLICATIONS
|
|
|
Patent #:
|
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Issue Dt:
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12/02/2008
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Application #:
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10360834
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Filing Dt:
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02/06/2003
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Title:
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DIGITAL TWO-STAGE AUTOMATIC GAIN CONTROL
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Patent #:
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Issue Dt:
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03/18/2008
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Application #:
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10361255
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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02/26/2004
| | | | |
Title:
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HIGH-SPEED SERIAL BIT STREAM MULTIPLEXING AND DEMULTIPLEXING INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
|
08/18/2009
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Application #:
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10361463
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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02/12/2004
| | | | |
Title:
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SOURCE CENTERED CLOCK SUPPORTING QUAD 10 GBPS SERIAL INTERFACE
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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10361464
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Filing Dt:
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02/10/2003
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Publication #:
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Pub Dt:
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08/12/2004
| | | | |
Title:
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REDUCED POWER CONSUMPTION FOR EMBEDDED PROCESSOR
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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10364147
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Filing Dt:
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02/11/2003
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Publication #:
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Pub Dt:
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07/03/2003
| | | | |
Title:
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CONTENT ADDRESSABLE MEMORY WITH CONFIGURABLE CLASS-BASED STORAGE PARTITION
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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10365305
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Filing Dt:
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02/12/2003
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Publication #:
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Pub Dt:
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07/01/2004
| | | | |
Title:
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DATA PROCESSING HASH ALGORITHM AND POLICY MANAGEMENT
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Patent #:
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Issue Dt:
|
05/27/2008
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Application #:
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10365531
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
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08/19/2004
| | | | |
Title:
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METHOD AND APPARATUS FOR PERFORMING TRELLIS CODED MODULATION OF SIGNALS FOR TRANSMISSION ON A TDMA CHANNEL OF A CABLE NETWORK
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Patent #:
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Issue Dt:
|
01/11/2005
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Application #:
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10365913
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Filing Dt:
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02/13/2003
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Publication #:
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Pub Dt:
|
08/19/2004
| | | | |
Title:
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NON-VOLATILE MEMORY CONTROL TECHNIQUES
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|
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Patent #:
|
|
Issue Dt:
|
07/04/2006
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Application #:
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10366668
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Filing Dt:
|
02/14/2003
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Publication #:
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|
Pub Dt:
|
12/04/2003
| | | | |
Title:
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DOUBLE-CONVERSION TELEVISION TUNER USING A DELTA-SIGMA FRACTIONAL-N PLL
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|
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Patent #:
|
|
Issue Dt:
|
05/08/2007
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Application #:
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10367492
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Filing Dt:
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02/14/2003
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Publication #:
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|
Pub Dt:
|
08/19/2004
| | | | |
Title:
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DIGITAL CALCULATION OF RECEIVED SIGNAL STRENGTH INDICATION
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|
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Patent #:
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|
Issue Dt:
|
09/12/2006
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Application #:
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10369168
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Filing Dt:
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02/19/2003
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Publication #:
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|
Pub Dt:
|
02/19/2004
| | | | |
Title:
|
LOW DENSITY PARITY CHECK (LDPC) CODE DECODER USING MIN*, MIN**, MAX* OR MAX** AND THEIR RESPECTIVE INVERSES
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|
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Patent #:
|
|
Issue Dt:
|
11/13/2007
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Application #:
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10370136
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Filing Dt:
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02/19/2003
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Publication #:
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|
Pub Dt:
|
07/29/2004
| | | | |
Title:
|
STOPPING AND/OR REDUCING OSCILLATIONS IN LOW DENSITY PARITY CHECK (LDPC) DECODING
|
|
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Patent #:
|
|
Issue Dt:
|
02/15/2005
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Application #:
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10370392
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Filing Dt:
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02/19/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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5 VOLT TOLERANT IO SCHEME USING LOW-VOLTAGE DEVICES
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|
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Patent #:
|
|
Issue Dt:
|
02/28/2006
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Application #:
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10370833
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Filing Dt:
|
02/21/2003
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Title:
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METHODS AND APPARATUS FOR INJECTING AN EXTERNAL CLOCK INTO A CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2007
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Application #:
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10371237
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Filing Dt:
|
02/19/2003
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Publication #:
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|
Pub Dt:
|
11/27/2003
| | | | |
Title:
|
METHOD AND APPARATUS OPTIMIZING A RADIO LINK
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|
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Patent #:
|
|
Issue Dt:
|
03/07/2006
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Application #:
|
10372015
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Filing Dt:
|
02/20/2003
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Publication #:
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|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR COMPENSATING AN OSCILLATOR IN A LOCATION-ENABLED WIRELESS DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2010
|
Application #:
|
10372158
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Filing Dt:
|
02/21/2003
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Publication #:
|
|
Pub Dt:
|
02/26/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR IMPLEMENTING AUTO-CONFIGURABLE DEFAULT POLARITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
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Application #:
|
10372229
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Filing Dt:
|
02/25/2003
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Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
METHODS AND SYSTEMS FOR DIGITAL DITHER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
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Application #:
|
10372427
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Filing Dt:
|
02/21/2003
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Title:
|
ALL DIGITAL RADIO FREQUENCY MODULATOR
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|
|
Patent #:
|
|
Issue Dt:
|
02/15/2005
|
Application #:
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10372638
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Filing Dt:
|
02/21/2003
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Publication #:
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|
Pub Dt:
|
08/26/2004
| | | | |
Title:
|
NONLINEAR FILTER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10372778
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Filing Dt:
|
02/26/2003
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Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
Title:
|
PROGRAMMABLE GAIN AMPLIFIER WITH GLITCH MINIMIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
10374734
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Filing Dt:
|
02/24/2003
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Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
Title:
|
MULTIPLE TIME-BASE CLOCK FOR PROCESSING MULTIPLE SATELLITE SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/12/2009
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Application #:
|
10374768
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Filing Dt:
|
02/24/2003
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Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
SATELLITE SET-TOP BOX DECODER FOR SIMULTANEOUSLY SERVICING MULTIPLE INDEPENDENT PROGRAMS FOR DISPLAY ON INDEPENDENT DISPLAY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2015
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Application #:
|
10374846
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Filing Dt:
|
02/25/2003
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Publication #:
|
|
Pub Dt:
|
09/16/2004
| | | | |
Title:
|
SYSTEM AND METHOD FOR REPLACING BITSTREAM SYMBOLS WITH INTERMEDIATE SYMBOLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/2004
|
Application #:
|
10374921
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Filing Dt:
|
02/26/2003
|
Title:
|
ROW-COLUMN REPAIR TECHNIQUE FOR SEMICONDUCTOR MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
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Application #:
|
10375543
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Filing Dt:
|
02/27/2003
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Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
Title:
|
METHOD AND APPARATUS FOR CONFIGURING ARBITRARY SIZED DATA PATHS COMPRISING MULTIPLE CONTEXT PROCESSING ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
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Application #:
|
10375576
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Filing Dt:
|
02/27/2003
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Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
Title:
|
LOCAL CONTROL OF MULTIPLE CONTEXT PROCESSING ELEMENTS WITH CONFIGURATION CONTEXTS
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10377023
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Filing Dt:
|
03/03/2003
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Publication #:
|
|
Pub Dt:
|
12/11/2003
| | | | |
Title:
|
Analog CMOSFET switch with linear on resistance
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10377442
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Filing Dt:
|
02/28/2003
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Publication #:
|
|
Pub Dt:
|
09/02/2004
| | | | |
Title:
|
Quality of service (QOS) metric computation in voice over IP systems
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
10377664
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Filing Dt:
|
03/04/2003
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Publication #:
|
|
Pub Dt:
|
09/18/2003
| | | | |
Title:
|
Fastpath implementation for transparent local area network (LAN) services over multiprotocol label switching (MPLS)
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
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Application #:
|
10377833
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Filing Dt:
|
03/03/2003
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Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR EXPEDITING UPPER LAYER PROTOCOL (ULP) CONNECTION NEGOTIATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/25/2007
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Application #:
|
10378035
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Filing Dt:
|
02/27/2003
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Publication #:
|
|
Pub Dt:
|
02/12/2004
| | | | |
Title:
|
METHODS AND APPARATUS FOR INITIALIZATION VECTOR PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
10378054
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Filing Dt:
|
02/27/2003
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Publication #:
|
|
Pub Dt:
|
05/20/2004
| | | | |
Title:
|
CRYPTOGRAPHY ACCELERATOR APPLICATION PROGRAM INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
10378366
|
Filing Dt:
|
03/03/2003
|
Publication #:
|
|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
GENERIC ON-CHIP HOMING AND RESIDENT, REAL-TIME BIT EXACT TESTS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2006
|
Application #:
|
10378803
|
Filing Dt:
|
03/04/2003
|
Publication #:
|
|
Pub Dt:
|
09/11/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR PROTECTING HEADER INFORMATION USING DEDICATED CRC
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
10378937
|
Filing Dt:
|
03/05/2003
|
Publication #:
|
|
Pub Dt:
|
04/08/2004
| | | | |
Title:
|
FAST-PATH IMPLEMENTATION FOR AN UPLINK DOUBLE TAGGING ENGINE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2004
|
Application #:
|
10379219
|
Filing Dt:
|
03/04/2003
|
Publication #:
|
|
Pub Dt:
|
08/14/2003
| | | | |
Title:
|
HIGH SPEED FLIP-FLOP
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2004
|
Application #:
|
10379593
|
Filing Dt:
|
03/06/2003
|
Publication #:
|
|
Pub Dt:
|
08/21/2003
| | | | |
Title:
|
SYSTEM AND METHOD FOR PERFORMING DIGITAL-TO-ANALOG CONVERSION USING A SIGMA-DELTA MODULATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
10379801
|
Filing Dt:
|
03/06/2003
|
Publication #:
|
|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING PACKETS AT FORWARDER INTERFACES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
10382400
|
Filing Dt:
|
03/06/2003
|
Publication #:
|
|
Pub Dt:
|
07/31/2003
| | | | |
Title:
|
FORWARD ERROR CORRECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2006
|
Application #:
|
10382811
|
Filing Dt:
|
03/06/2003
|
Publication #:
|
|
Pub Dt:
|
09/09/2004
| | | | |
Title:
|
HIGH LINEARITY PASSIVE MIXER AND ASSOCIATED LO BUFFER
|
|