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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:054633/0001   Pages: 1245
Recorded: 11/02/2020
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 8468
Page 21 of 85
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
1
Patent #:
7446025
Issue Dt:
11/04/2008
Application #:
11742180
Filing Dt:
04/30/2007
Publication #:
US20070202674
Pub Dt:
08/30/2007
Title:
METHOD OF FORMING VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT
2
Patent #:
7750711
Issue Dt:
07/06/2010
Application #:
11742860
Filing Dt:
05/01/2007
Publication #:
US20080273528
Pub Dt:
11/06/2008
Title:
PHASE SELECT CIRCUIT WITH REDUCED HYSTERESIS EFFECT
3
Patent #:
7872334
Issue Dt:
01/18/2011
Application #:
11744234
Filing Dt:
05/04/2007
Publication #:
US20080273280
Pub Dt:
11/06/2008
Title:
CARBON NANOTUBE DIODES AND ELECTROSTATIC DISCHARGE CIRCUITS AND METHODS
4
Patent #:
7608851
Issue Dt:
10/27/2009
Application #:
11745811
Filing Dt:
05/08/2007
Publication #:
US20080277644
Pub Dt:
11/13/2008
Title:
SWITCH ARRAY CIRCUIT AND SYSTEM USING PROGRAMMABLE VIA STRUCTURES WITH PHASE CHANGE MATERIALS
5
Patent #:
7964458
Issue Dt:
06/21/2011
Application #:
11746106
Filing Dt:
05/09/2007
Publication #:
US20080026572
Pub Dt:
01/31/2008
Title:
METHOD FOR FORMING A STRAINED TRANSISTOR BY STRESS MEMORIZATION BASED ON A STRESSED IMPLANTATION MASK
6
Patent #:
7955955
Issue Dt:
06/07/2011
Application #:
11746684
Filing Dt:
05/10/2007
Publication #:
US20080277765
Pub Dt:
11/13/2008
Title:
USING CRACK ARRESTOR FOR INHIBITING DAMAGE FROM DICING AND CHIP PACKAGING INTERACTION FAILURES IN BACK END OF LINE STRUCTURES
7
Patent #:
7864502
Issue Dt:
01/04/2011
Application #:
11748560
Filing Dt:
05/15/2007
Publication #:
US20080285202
Pub Dt:
11/20/2008
Title:
IN SITU MONITORING OF WAFER CHARGE DISTRIBUTION IN PLASMA PROCESSING
8
Patent #:
8679918
Issue Dt:
03/25/2014
Application #:
11748576
Filing Dt:
05/15/2007
Publication #:
US20070212834
Pub Dt:
09/13/2007
Title:
MULTIPLE-GATE DEVICE WITH FLOATING BACK GATE
9
Patent #:
7831800
Issue Dt:
11/09/2010
Application #:
11750266
Filing Dt:
05/17/2007
Publication #:
US20080288751
Pub Dt:
11/20/2008
Title:
TECHNIQUE FOR PREFETCHING DATA BASED ON A STRIDE PATTERN
10
Patent #:
7921318
Issue Dt:
04/05/2011
Application #:
11750284
Filing Dt:
05/17/2007
Publication #:
US20080284476
Pub Dt:
11/20/2008
Title:
TECHNIQUES FOR INTEGRATED CIRCUIT CLOCK MANAGEMENT USING PULSE SKIPPING
11
Patent #:
8009430
Issue Dt:
08/30/2011
Application #:
11750322
Filing Dt:
05/17/2007
Publication #:
US20080285232
Pub Dt:
11/20/2008
Title:
TECHNIQUES FOR DATA CENTER COOLING
12
Patent #:
8636931
Issue Dt:
01/28/2014
Application #:
11750559
Filing Dt:
05/18/2007
Publication #:
US20080284052
Pub Dt:
11/20/2008
Title:
VACUUM EXTRUSION METHOD OF MANUFACTURING A THERMAL PASTE
13
Patent #:
7645701
Issue Dt:
01/12/2010
Application #:
11751105
Filing Dt:
05/21/2007
Publication #:
US20080290525
Pub Dt:
11/27/2008
Title:
SILICON-ON-INSULATOR STRUCTURES FOR THROUGH VIA IN SILICON CARRIERS
14
Patent #:
7844925
Issue Dt:
11/30/2010
Application #:
11753644
Filing Dt:
05/25/2007
Publication #:
US20080295041
Pub Dt:
11/27/2008
Title:
SYSTEM AND METHOD FOR POWER DOMAIN OPTIMIZATION
15
Patent #:
7749842
Issue Dt:
07/06/2010
Application #:
11754627
Filing Dt:
05/29/2007
Publication #:
US20070218620
Pub Dt:
09/20/2007
Title:
STRUCTURES AND METHODS FOR MAKING STRAINED MOSFETS
16
Patent #:
8531025
Issue Dt:
09/10/2013
Application #:
11755019
Filing Dt:
05/30/2007
Publication #:
US20070222064
Pub Dt:
09/27/2007
Title:
THERMAL PASTE CONTAINMENT FOR SEMICONDUCTOR MODULES
17
Patent #:
8520535
Issue Dt:
08/27/2013
Application #:
11755811
Filing Dt:
05/31/2007
Publication #:
US20080298314
Pub Dt:
12/04/2008
Title:
OPTIMIZATION PROCESS AND SYSTEM FOR A HETEROGENEOUS AD HOC NETWORK
18
Patent #:
7989891
Issue Dt:
08/02/2011
Application #:
11755930
Filing Dt:
05/31/2007
Publication #:
US20080296682
Pub Dt:
12/04/2008
Title:
MOS STRUCTURES WITH REMOTE CONTACTS AND METHODS FOR FABRICATING THE SAME
19
Patent #:
7817727
Issue Dt:
10/19/2010
Application #:
11756678
Filing Dt:
06/01/2007
Publication #:
US20080034378
Pub Dt:
02/07/2008
Title:
HYBRID OUTPUT DRIVER FOR HIGH-SPEED COMMUNICATIONS INTERFACES
20
Patent #:
8268282
Issue Dt:
09/18/2012
Application #:
11758457
Filing Dt:
06/05/2007
Publication #:
US20120211159
Pub Dt:
08/23/2012
Title:
SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
21
Patent #:
NONE
Issue Dt:
Application #:
11760992
Filing Dt:
06/11/2007
Publication #:
US20080305437
Pub Dt:
12/11/2008
Title:
MULTI-LAYER MASK METHOD FOR PATTERNED STRUCTURE ETHCING
22
Patent #:
7929335
Issue Dt:
04/19/2011
Application #:
11761043
Filing Dt:
06/11/2007
Publication #:
US20080304307
Pub Dt:
12/11/2008
Title:
USE OF A SYMMETRIC RESISTIVE MEMORY MATERIAL AS A DIODE TO DRIVE SYMMETRIC OR ASYMMETRIC RESISTIVE MEMORY
23
Patent #:
7741184
Issue Dt:
06/22/2010
Application #:
11761438
Filing Dt:
06/12/2007
Publication #:
US20070231987
Pub Dt:
10/04/2007
Title:
FIN DEVICE WITH CAPACITOR INTEGRATED UNDER GATE ELECTRODE
24
Patent #:
8815654
Issue Dt:
08/26/2014
Application #:
11762811
Filing Dt:
06/14/2007
Publication #:
US20080308837
Pub Dt:
12/18/2008
Title:
VERTICAL CURRENT CONTROLLED SILICON ON INSULATOR (SOI) DEVICE SUCH AS A SILICON CONTROLLED RECTIFIER AND METHOD OF FORMING VERTICAL SOI CURRENT CONTROLLED DEVICES
25
Patent #:
7948083
Issue Dt:
05/24/2011
Application #:
11763135
Filing Dt:
06/14/2007
Publication #:
US20070228570
Pub Dt:
10/04/2007
Title:
RELIABLE BEOL INTEGRATION PROCESS WITH DIRECT CMP OF POROUS SICOH DIELECTRIC
26
Patent #:
8138028
Issue Dt:
03/20/2012
Application #:
11764678
Filing Dt:
06/18/2007
Publication #:
US20080191187
Pub Dt:
08/14/2008
Title:
METHOD FOR MANUFACTURING A PHASE CHANGE MEMORY DEVICE WITH PILLAR BOTTOM ELECTRODE
27
Patent #:
7923337
Issue Dt:
04/12/2011
Application #:
11765931
Filing Dt:
06/20/2007
Publication #:
US20080315309
Pub Dt:
12/25/2008
Title:
FIN FIELD EFFECT TRANSISTOR DEVICES WITH SELF-ALIGNED SOURCE AND DRAIN REGIONS
28
Patent #:
8138604
Issue Dt:
03/20/2012
Application #:
11766261
Filing Dt:
06/21/2007
Publication #:
US20080315426
Pub Dt:
12/25/2008
Title:
METAL CAP WITH ULTRA-LOW K DIELECTRIC MATERIAL FOR CIRCUIT INTERCONNECT APPLICATIONS
29
Patent #:
8037926
Issue Dt:
10/18/2011
Application #:
11766533
Filing Dt:
06/21/2007
Publication #:
US20080314565
Pub Dt:
12/25/2008
Title:
METHOD AND APPARATUS FOR CHIP COOLING
30
Patent #:
8341428
Issue Dt:
12/25/2012
Application #:
11767545
Filing Dt:
06/25/2007
Publication #:
US20080320313
Pub Dt:
12/25/2008
Title:
SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS
31
Patent #:
7825441
Issue Dt:
11/02/2010
Application #:
11767627
Filing Dt:
06/25/2007
Publication #:
US20080315266
Pub Dt:
12/25/2008
Title:
JUNCTION FIELD EFFECT TRANSISTOR WITH A HYPERABRUPT JUNCTION
32
Patent #:
7825003
Issue Dt:
11/02/2010
Application #:
11768266
Filing Dt:
06/26/2007
Publication #:
US20090001413
Pub Dt:
01/01/2009
Title:
METHOD OF DOPING FIELD-EFFECT-TRANSISTORS (FETS) WITH REDUCED STRESS/STRAIN RELAXATION AND RESULTING FET DEVICES
33
Patent #:
7795605
Issue Dt:
09/14/2010
Application #:
11771033
Filing Dt:
06/29/2007
Publication #:
US20090001336
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MATERIAL BASED TEMPERATURE SENSOR
34
Patent #:
8812355
Issue Dt:
08/19/2014
Application #:
11771252
Filing Dt:
06/29/2007
Publication #:
US20080249859
Pub Dt:
10/09/2008
Title:
GENERATING CUSTOMIZED MARKETING MESSAGES FOR A CUSTOMER USING DYNAMIC CUSTOMER BEHAVIOR DATA
35
Patent #:
7932167
Issue Dt:
04/26/2011
Application #:
11771457
Filing Dt:
06/29/2007
Publication #:
US20090001337
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MEMORY CELL WITH VERTICAL TRANSISTOR
36
Patent #:
7906368
Issue Dt:
03/15/2011
Application #:
11771501
Filing Dt:
06/29/2007
Publication #:
US20090001341
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MEMORY WITH TAPERED HEATER
37
Patent #:
7971123
Issue Dt:
06/28/2011
Application #:
11772347
Filing Dt:
07/02/2007
Publication #:
US20090013231
Pub Dt:
01/08/2009
Title:
MULTI-BIT ERROR CORRECTION SCHEME IN MULTI-LEVEL MEMORY STORAGE SYSTEM
38
Patent #:
7675466
Issue Dt:
03/09/2010
Application #:
11772464
Filing Dt:
07/02/2007
Publication #:
US20090009399
Pub Dt:
01/08/2009
Title:
ANTENNA ARRAY FEED LINE STRUCTURES FOR MILLIMETER WAVE APPLICATIONS
39
Patent #:
7788065
Issue Dt:
08/31/2010
Application #:
11772503
Filing Dt:
07/02/2007
Publication #:
US20090012737
Pub Dt:
01/08/2009
Title:
METHOD AND APPARATUS FOR CORRELATING TEST EQUIPMENT HEALTH AND TEST RESULTS
40
Patent #:
7671442
Issue Dt:
03/02/2010
Application #:
11772899
Filing Dt:
07/03/2007
Publication #:
US20070252282
Pub Dt:
11/01/2007
Title:
AIR-GAP INSULATED INTERCONNECTIONS
41
Patent #:
7485520
Issue Dt:
02/03/2009
Application #:
11773607
Filing Dt:
07/05/2007
Publication #:
US20090008705
Pub Dt:
01/08/2009
Title:
BODY-CONTACTED FINFET
42
Patent #:
7979724
Issue Dt:
07/12/2011
Application #:
11774245
Filing Dt:
07/06/2007
Publication #:
US20070255970
Pub Dt:
11/01/2007
Title:
SYSTEM AND METHOD FOR DYNAMICALLY MANAGING POWER CONSUMPTION OF INTEGRATED CIRCUITRY
43
Patent #:
7645650
Issue Dt:
01/12/2010
Application #:
11774663
Filing Dt:
07/09/2007
Publication #:
US20070254438
Pub Dt:
11/01/2007
Title:
DOUBLE GATED TRANSISTOR AND METHOD OF FABRICATION
44
Patent #:
7818542
Issue Dt:
10/19/2010
Application #:
11775451
Filing Dt:
07/10/2007
Publication #:
US20090019263
Pub Dt:
01/15/2009
Title:
METHOD AND APPARATUS FOR LENGTH DECODING VARIABLE LENGTH INSTRUCTIONS
45
Patent #:
7818543
Issue Dt:
10/19/2010
Application #:
11775456
Filing Dt:
07/10/2007
Publication #:
US20090019257
Pub Dt:
01/15/2009
Title:
METHOD AND APPARATUS FOR LENGTH DECODING AND IDENTIFYING BOUNDARIES OF VARIABLE LENGTH INSTRUCTIONS
46
Patent #:
7521760
Issue Dt:
04/21/2009
Application #:
11775607
Filing Dt:
07/10/2007
Publication #:
US20070257314
Pub Dt:
11/08/2007
Title:
INTEGRATED CIRCUIT CHIP WITH FETS HAVING MIXED BODY THICKNESSES AND METHOD OF MANUFACTURE THEREOF
47
Patent #:
7737501
Issue Dt:
06/15/2010
Application #:
11776118
Filing Dt:
07/11/2007
Publication #:
US20090014798
Pub Dt:
01/15/2009
Title:
FINFET SRAM WITH ASYMMETRIC GATE AND METHOD OF MANUFACTURE THEREOF
48
Patent #:
7638428
Issue Dt:
12/29/2009
Application #:
11776155
Filing Dt:
07/11/2007
Publication #:
US20080128912
Pub Dt:
06/05/2008
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME
49
Patent #:
7476578
Issue Dt:
01/13/2009
Application #:
11776710
Filing Dt:
07/12/2007
Publication #:
US20090017584
Pub Dt:
01/15/2009
Title:
PROCESS FOR FINFET SPACER FORMATION
50
Patent #:
8020073
Issue Dt:
09/13/2011
Application #:
11776810
Filing Dt:
07/12/2007
Publication #:
US20090019341
Pub Dt:
01/15/2009
Title:
DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA
51
Patent #:
7895421
Issue Dt:
02/22/2011
Application #:
11776986
Filing Dt:
07/12/2007
Publication #:
US20090019317
Pub Dt:
01/15/2009
Title:
MECHANISM FOR USING PERFORMANCE COUNTERS TO IDENTIFY REASONS AND DELAY TIMES FOR INSTRUCTIONS THAT ARE STALLED DURING RETIREMENT
52
Patent #:
7548822
Issue Dt:
06/16/2009
Application #:
11777329
Filing Dt:
07/13/2007
Publication #:
US20090018787
Pub Dt:
01/15/2009
Title:
APPARATUS AND METHOD FOR DETERMINING THE SLEW RATE OF A SIGNAL PRODUCED BY AN INTEGRATED CIRCUIT
53
Patent #:
7732859
Issue Dt:
06/08/2010
Application #:
11778209
Filing Dt:
07/16/2007
Publication #:
US20090020764
Pub Dt:
01/22/2009
Title:
GRAPHENE-BASED TRANSISTOR
54
Patent #:
7692254
Issue Dt:
04/06/2010
Application #:
11778217
Filing Dt:
07/16/2007
Publication #:
US20090020819
Pub Dt:
01/22/2009
Title:
FIN-TYPE FIELD EFFECT TRANSISTOR STRUCTURE WITH MERGED SOURCE/DRAIN SILICIDE AND METHOD OF FORMING THE STRUCTURE
55
Patent #:
8709887
Issue Dt:
04/29/2014
Application #:
11778238
Filing Dt:
07/16/2007
Publication #:
US20080014692
Pub Dt:
01/17/2008
Title:
METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC
56
Patent #:
7718529
Issue Dt:
05/18/2010
Application #:
11778852
Filing Dt:
07/17/2007
Publication #:
US20090023298
Pub Dt:
01/22/2009
Title:
INVERSE SELF-ALIGNED SPACER LITHOGRAPHY
57
Patent #:
8652913
Issue Dt:
02/18/2014
Application #:
11778930
Filing Dt:
07/17/2007
Publication #:
US20080182371
Pub Dt:
07/31/2008
Title:
METHOD FOR FORMING SILICON/GERMANIUM CONTAINING DRAIN/SOURCE REGIONS IN TRANSISTORS WITH REDUCED SILICON/GERMANIUM LOSS
58
Patent #:
7751267
Issue Dt:
07/06/2010
Application #:
11782071
Filing Dt:
07/24/2007
Publication #:
US20090027983
Pub Dt:
01/29/2009
Title:
HALF-SELECT COMPLIANT MEMORY CELL PRECHARGE CIRCUIT
59
Patent #:
7705352
Issue Dt:
04/27/2010
Application #:
11782734
Filing Dt:
07/25/2007
Publication #:
US20080157075
Pub Dt:
07/03/2008
Title:
TEST STRUCTURE FOR ESTIMATING ELECTROMIGRATION EFFECTS WITH INCREASED ROBUSTNESS WITH RESPECT TO BARRIER DEFECTS IN VIAS
60
Patent #:
7818592
Issue Dt:
10/19/2010
Application #:
11788215
Filing Dt:
04/18/2007
Publication #:
US20080263373
Pub Dt:
10/23/2008
Title:
TOKEN BASED POWER CONTROL MECHANISM
61
Patent #:
7387925
Issue Dt:
06/17/2008
Application #:
11799261
Filing Dt:
04/10/2007
Publication #:
US20070218621
Pub Dt:
09/20/2007
Title:
INTEGRATION OF STRAINED GE INTO ADVANCED CMOS TECHNOLOGY
62
Patent #:
8592312
Issue Dt:
11/26/2013
Application #:
11811418
Filing Dt:
06/07/2007
Publication #:
US20080305617
Pub Dt:
12/11/2008
Title:
METHOD FOR DEPOSITING A CONDUCTIVE CAPPING LAYER ON METAL LINES
63
Patent #:
7882309
Issue Dt:
02/01/2011
Application #:
11828382
Filing Dt:
07/26/2007
Publication #:
US20090031088
Pub Dt:
01/29/2009
Title:
METHOD AND APPARATUS FOR HANDLING EXCESS DATA DURING MEMORY ACCESS
64
Patent #:
7607061
Issue Dt:
10/20/2009
Application #:
11830116
Filing Dt:
07/30/2007
Publication #:
US20090037788
Pub Dt:
02/05/2009
Title:
SHRINK TEST MODE TO IDENTIFY NTH ORDER SPEED PATHS
65
Patent #:
7496251
Issue Dt:
02/24/2009
Application #:
11830200
Filing Dt:
07/30/2007
Publication #:
US20080019633
Pub Dt:
01/24/2008
Title:
APPARATUS AND METHODS FOR INTEGRALLY PACKAGING OPTOELECTRONIC DEVICES, IC CHIPS AND OPTICAL TRANSMISSION LINES
66
Patent #:
7459981
Issue Dt:
12/02/2008
Application #:
11830221
Filing Dt:
07/30/2007
Publication #:
US20080030280
Pub Dt:
02/07/2008
Title:
CIRCUITS AND METHODS FOR IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER WAVE FREQUENCIES
67
Patent #:
8378469
Issue Dt:
02/19/2013
Application #:
11830239
Filing Dt:
07/30/2007
Publication #:
US20130016023
Pub Dt:
01/17/2013
Title:
APPARATUS AND METHODS FOR PACKAGING ANTENNAS WITH INTEGRATED CIRCUIT CHIPS FOR MILLIMETER WAVE APPLICATIONS
68
Patent #:
7619276
Issue Dt:
11/17/2009
Application #:
11830328
Filing Dt:
07/30/2007
Publication #:
US20090032859
Pub Dt:
02/05/2009
Title:
FINFET FLASH MEMORY DEVICE WITH AN EXTENDED FLOATING BACK GATE
69
Patent #:
7423303
Issue Dt:
09/09/2008
Application #:
11830464
Filing Dt:
07/30/2007
Publication #:
US20070262361
Pub Dt:
11/15/2007
Title:
STRAINED SILICON DIRECTLY-ON-INSULATOR SUBSTRATE WITH HYBRID CRYSTALLINE ORIENTATION AND DIFFERENT STRESS LEVELS
70
Patent #:
8032897
Issue Dt:
10/04/2011
Application #:
11831119
Filing Dt:
07/31/2007
Publication #:
US20090037936
Pub Dt:
02/05/2009
Title:
PLACING VIRTUAL MACHINE MONITOR (VMM) CODE IN GUEST CONTEXT TO SPEED MEMORY MAPPED INPUT/OUTPUT VIRTUALIZATION
71
Patent #:
7566653
Issue Dt:
07/28/2009
Application #:
11831149
Filing Dt:
07/31/2007
Publication #:
US20090035954
Pub Dt:
02/05/2009
Title:
INTERCONNECT STRUCTURE WITH GRAIN GROWTH PROMOTION LAYER AND METHOD FOR FORMING THE SAME
72
Patent #:
7913034
Issue Dt:
03/22/2011
Application #:
11832220
Filing Dt:
08/01/2007
Publication #:
US20070294471
Pub Dt:
12/20/2007
Title:
DRAM ACCESS COMMAND QUEUING
73
Patent #:
7902069
Issue Dt:
03/08/2011
Application #:
11833112
Filing Dt:
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Title:
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Title:
A METHOD OF FORMING A SPLIT POLY-SiGe/POLY-Si ALLOY GATE STACK
Assignor
1
GLOBALFOUNDRIES INC.
Exec Dt:
10/22/2020
Assignee
1
GLOBALFOUNDRIES U.S. INC.
2600 GREAT AMERICA WAY
SANTA CLARA, CALIFORNIA 95054
Correspondence name and address
GLOBALFOUNDRIES SINGAPORE PTE. LTD.
60 WOODLANDS INDUSTRIAL PARK D STREET 2,
SINGAPORE, 738406 SINGAPORE

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