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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 22 of 148
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Patent #:	6529402	Issue Dt:	03/04/2003	Application #:	10094533	Filing Dt:	03/08/2002
Title:	LOW POWER STATIC MEMORY

Patent #:	6812122	Issue Dt:	11/02/2004	Application #:	10095889	Filing Dt:	03/12/2002
Publication #:	US20020093074	Pub Dt:	07/18/2002
Title:	ANTIFUSES AND METHODS FOR FORMING THE SAME

Patent #:	7451065	Issue Dt:	11/11/2008	Application #:	10096474	Filing Dt:	03/11/2002
Publication #:	US20030176931	Pub Dt:	09/18/2003
Title:	METHOD FOR CONSTRUCTING SEGMENTATION-BASED PREDICTIVE MODELS

Patent #:	6770500	Issue Dt:	08/03/2004	Application #:	10099004	Filing Dt:	03/15/2002
Publication #:	US20030186518	Pub Dt:	10/02/2003
Title:	PROCESS OF PASSIVATING A METAL-GATED COMPLEMENTARY METAL OXIDE SEMICONDUCTOR

Patent #:	8769517	Issue Dt:	07/01/2014	Application #:	10099508	Filing Dt:	03/15/2002
Publication #:	US20030177420	Pub Dt:	09/18/2003
Title:	Generating a common symbol table for symbols of independent applications

Patent #:	6769108	Issue Dt:	07/27/2004	Application #:	10099776	Filing Dt:	03/14/2002
Publication #:	US20030177466	Pub Dt:	09/18/2003
Title:	TRIANGULAR ASSIGNMENT OF PINS USED FOR DIAGONAL INTERCONNECTIONS BETWEEN DIAGONAL CHIPS IN A MULTI-CHIP MODULE

Patent #:	6957419	Issue Dt:	10/18/2005	Application #:	10099849	Filing Dt:	03/15/2002
Publication #:	US20030177421	Pub Dt:	09/18/2003
Title:	FACILITATING THE USE OF ALIASES DURING THE DEBUGGING OF APPLICATIONS

Patent #:	6608757	Issue Dt:	08/19/2003	Application #:	10101277	Filing Dt:	03/18/2002
Title:	METHOD FOR MAKING A PRINTED WIRING BOARD

Patent #:	6720602	Issue Dt:	04/13/2004	Application #:	10101992	Filing Dt:	03/21/2002
Publication #:	US20020102778	Pub Dt:	08/01/2002
Title:	DYNAMIC RANDOM ACCESS MEMORY (DRAM) CELL WITH A FOLDED BITLINE VERTICAL TRANSISTOR AND METHOD OF PRODUCING THE SAME

Patent #:	6891227	Issue Dt:	05/10/2005	Application #:	10102365	Filing Dt:	03/20/2002
Publication #:	US20030178617	Pub Dt:	09/25/2003
Title:	SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME

Patent #:	6472230	Issue Dt:	10/29/2002	Application #:	10102381	Filing Dt:	03/20/2002
Publication #:	US20020096735	Pub Dt:	07/25/2002
Title:	RE-SETTABLE TRISTATE PROGRAMMABLE DEVICE

Patent #:	NONE	Issue Dt:		Application #:	10102902	Filing Dt:	03/22/2002
Publication #:	US20030009298	Pub Dt:	01/09/2003
Title:	Field-based similarity search system and method

Patent #:	6639302	Issue Dt:	10/28/2003	Application #:	10103602	Filing Dt:	03/20/2002
Publication #:	US20030178649	Pub Dt:	09/25/2003
Title:	STRESS REDUCTION IN FLIP-CHIP PBGA PACKAGING BY UTILIZING SEGMENTED CHIP CARRIERS

Patent #:	6577476	Issue Dt:	06/10/2003	Application #:	10108688	Filing Dt:	03/28/2002
Title:	FLUX GUIDE STRUCTURE FOR A SPIN VALVE TRANSISTOR WHICH INCLUDES A SLIDER BODY SEMICONDUCTOR LAYERS

Patent #:	6782518	Issue Dt:	08/24/2004	Application #:	10109502	Filing Dt:	03/28/2002
Publication #:	US20040078673	Pub Dt:	04/22/2004
Title:	SYSTEM AND METHOD FOR FACILITATING COVERAGE FEEDBACK TESTCASE GENERATION REPRODUCIBILITY

Patent #:	7223350	Issue Dt:	05/29/2007	Application #:	10109929	Filing Dt:	03/29/2002
Publication #:	US20030184917	Pub Dt:	10/02/2003
Title:	PLANARIZATION IN AN ENCAPSULATION PROCESS FOR THIN FILM SURFACES

Patent #:	NONE	Issue Dt:		Application #:	10112827	Filing Dt:	03/29/2002
Publication #:	US20030188241	Pub Dt:	10/02/2003
Title:	CMOS low leakage power-down data retention mechanism

Patent #:	6703269	Issue Dt:	03/09/2004	Application #:	10114829	Filing Dt:	04/02/2002
Publication #:	US20030186492	Pub Dt:	10/02/2003
Title:	METHOD TO FORM GATE CONDUCTOR STRUCTURES OF DUAL DOPED POLYSILICON

Patent #:	6593625	Issue Dt:	07/15/2003	Application #:	10115160	Filing Dt:	04/03/2002
Publication #:	US20020185686	Pub Dt:	12/12/2002
Title:	RELAXED SIGE LAYERS ON SI OR SILICON-ON-INSULATOR SUBSTRATES BY ION IMPLANTATION AND THERMAL ANNEALING

Patent #:	7093171	Issue Dt:	08/15/2006	Application #:	10115348	Filing Dt:	04/03/2002
Publication #:	US20030191991	Pub Dt:	10/09/2003
Title:	FLEXIBLE ROW REDUNDANCY SYSTEM

Patent #:	6822838	Issue Dt:	11/23/2004	Application #:	10116017	Filing Dt:	04/02/2002
Publication #:	US20030184919	Pub Dt:	10/02/2003
Title:	DUAL MAGNETIC TUNNEL JUNCTION SENSOR WITH A LONGITUDINAL BIAS STACK

Patent #:	NONE	Issue Dt:		Application #:	10116245	Filing Dt:	04/04/2002
Publication #:	US20030191619	Pub Dt:	10/09/2003
Title:	Method and apparatus for implementing noise immunity and minimizing delay of CMOS logic circuits

Patent #:	6864520	Issue Dt:	03/08/2005	Application #:	10116568	Filing Dt:	04/04/2002
Publication #:	US20030190791	Pub Dt:	10/09/2003
Title:	GERMANIUM FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING THE SAME

Patent #:	6745377	Issue Dt:	06/01/2004	Application #:	10116584	Filing Dt:	04/04/2002
Publication #:	US20030192017	Pub Dt:	10/09/2003
Title:	APPARATUS AND METHOD FOR REPRESENTING GATED-CLOCK LATCHES FOR PHASE ABSTRACTION

Patent #:	6701444	Issue Dt:	03/02/2004	Application #:	10116813	Filing Dt:	04/05/2002
Publication #:	US20020113633	Pub Dt:	08/22/2002
Title:	METHOD AND APPARATUS FOR PROCESS INDEPENDENT CLOCK SIGNAL DISTRIBUTION

Patent #:	7189433	Issue Dt:	03/13/2007	Application #:	10117788	Filing Dt:	04/05/2002
Publication #:	US20030224117	Pub Dt:	12/04/2003
Title:	PROCESS FOR PREPARING A FILM HAVING ALTERNATIVELY MONOLAYERS OF A METAL-METAL BONDED COMPLEX MONOLAYER AND AN ORGANIC MONOLAYER BY LAYER-BY LAYER GROWTH

Patent #:	6646285	Issue Dt:	11/11/2003	Application #:	10117789	Filing Dt:	04/05/2002
Publication #:	US20030203168	Pub Dt:	10/30/2003
Title:	MOLECULAR ELECTRONIC DEVICE USING METAL-METAL BONDED COMPLEXES

Patent #:	6815329	Issue Dt:	11/09/2004	Application #:	10117797	Filing Dt:	04/02/2002
Publication #:	US20020158337	Pub Dt:	10/31/2002
Title:	MULTILAYER INTERCONNECT STRUCTURE CONTAINING AIR GAPS AND METHOD FOR MAKING

Patent #:	6677646	Issue Dt:	01/13/2004	Application #:	10117959	Filing Dt:	04/05/2002
Publication #:	US20030189228	Pub Dt:	10/09/2003
Title:	METHOD AND STRUCTURE OF A DISPOSABLE REVERSED SPACER PROCESS FOR HIGH PERFORMANCE RECESSED CHANNEL CMOS

Patent #:	6570261	Issue Dt:	05/27/2003	Application #:	10118395	Filing Dt:	04/08/2002
Publication #:	US20020111016	Pub Dt:	08/15/2002
Title:	METHOD AND APPARATUS FOR INJECTION MOLDED FLIP CHIP ENCAPSULATION

Patent #:	7191371	Issue Dt:	03/13/2007	Application #:	10118751	Filing Dt:	04/09/2002
Publication #:	US20030189903	Pub Dt:	10/09/2003
Title:	SYSTEM AND METHOD FOR SEQUENTIAL TESTING OF HIGH SPEED SERIAL LINK CORE

Patent #:	6803805	Issue Dt:	10/12/2004	Application #:	10118753	Filing Dt:	04/09/2002
Publication #:	US20030189460	Pub Dt:	10/09/2003
Title:	DISTRIBUTED DC VOLTAGE GENERATOR FOR SYSTEM ON CHIP

Patent #:	6596384	Issue Dt:	07/22/2003	Application #:	10119458	Filing Dt:	04/09/2002
Title:	SELECTIVELY ROUGHENING CONDUCTORS FOR HIGH FREQUENCY PRINTED WIRING BOARDS

Patent #:	6815126	Issue Dt:	11/09/2004	Application #:	10119489	Filing Dt:	04/09/2002
Publication #:	US20030188886	Pub Dt:	10/09/2003
Title:	PRINTED WIRING BOARD WITH CONFORMALLY PLATED CIRCUIT TRACES

Patent #:	6580132	Issue Dt:	06/17/2003	Application #:	10119799	Filing Dt:	04/10/2002
Title:	DAMASCENE DOUBLE-GATE FET

Patent #:	6812114	Issue Dt:	11/02/2004	Application #:	10119931	Filing Dt:	04/10/2002
Publication #:	US20030194847	Pub Dt:	10/16/2003
Title:	PATTERNED SOI BY FORMATION AND ANNIHILATION OF BURIED OXIDE REGIONS DURING PROCESSING

Patent #:	6784466	Issue Dt:	08/31/2004	Application #:	10120254	Filing Dt:	04/11/2002
Publication #:	US20020171077	Pub Dt:	11/21/2002
Title:	SI/SIGE OPTOELECTRONIC INTEGRATED CIRCUITS

Patent #:	6518516	Issue Dt:	02/11/2003	Application #:	10121821	Filing Dt:	04/11/2002
Publication #:	US20020108780	Pub Dt:	08/15/2002
Title:	MULTILAYERED LAMINATE

Patent #:	6671867	Issue Dt:	12/30/2003	Application #:	10121877	Filing Dt:	04/11/2002
Publication #:	US20030196183	Pub Dt:	10/16/2003
Title:	ANALYTICAL CONSTRAINT GENERATION FOR CUT-BASED GLOBAL PLACEMENT

Patent #:	NONE	Issue Dt:		Application #:	10122009	Filing Dt:	04/11/2002
Publication #:	US20030194846	Pub Dt:	10/16/2003
Title:	Medium dose simox over a wide BOX thickness range by a multiple implant, multiple anneal process

Patent #:	6815802	Issue Dt:	11/09/2004	Application #:	10122857	Filing Dt:	04/15/2002
Publication #:	US20020121676	Pub Dt:	09/05/2002
Title:	INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY

Patent #:	6682860	Issue Dt:	01/27/2004	Application #:	10122876	Filing Dt:	04/12/2002
Publication #:	US20030194568	Pub Dt:	10/16/2003
Title:	ATTENUATED EMBEDDED PHASE SHIFT PHOTOMASK BLANKS

Patent #:	6728123	Issue Dt:	04/27/2004	Application #:	10123493	Filing Dt:	04/15/2002
Publication #:	US20030193822	Pub Dt:	10/16/2003
Title:	REDUNDANT ARRAY ARCHITECTURE FOR WORD REPLACEMENT IN CAM

Patent #:	6730454	Issue Dt:	05/04/2004	Application #:	10124087	Filing Dt:	04/16/2002
Publication #:	US20030198877	Pub Dt:	10/23/2003
Title:	ANTIREFLECTIVE SIO-CONTAINING COMPOSITIONS FOR HARDMASK LAYER

Patent #:	NONE	Issue Dt:		Application #:	10124842	Filing Dt:	04/18/2002
Publication #:	US20030196679	Pub Dt:	10/23/2003
Title:	apparatus for contacting a precision surface with liquid or supercritical carbon dioxide

Patent #:	7158925	Issue Dt:	01/02/2007	Application #:	10124982	Filing Dt:	04/18/2002
Publication #:	US20030208350	Pub Dt:	11/06/2003
Title:	FACILITATING SIMULATION OF A MODEL WITHIN A DISTRIBUTED ENVIRONMENT

Patent #:	NONE	Issue Dt:		Application #:	10125308	Filing Dt:	04/17/2002
Publication #:	US20020156608	Pub Dt:	10/24/2002
Title:	Integrated testcase language for hardware design verification

Patent #:	6710258	Issue Dt:	03/23/2004	Application #:	10125624	Filing Dt:	04/18/2002
Publication #:	US20020180004	Pub Dt:	12/05/2002
Title:	CIRCUITIZED SUBSTRATE FOR HIGH-FREQUENCY APPLICATIONS

Patent #:	6783717	Issue Dt:	08/31/2004	Application #:	10127373	Filing Dt:	04/22/2002
Publication #:	US20030197312	Pub Dt:	10/23/2003
Title:	PROCESS OF FABRICATING A PRECISION MICROCONTACT PRINTING STAMP

Patent #:	6656308	Issue Dt:	12/02/2003	Application #:	10127374	Filing Dt:	04/22/2002
Publication #:	US20030196748	Pub Dt:	10/23/2003
Title:	PROCESS OF FABRICATING A PRECISION MICROCONTACT PRINTING STAMP

Patent #:	7058866	Issue Dt:	06/06/2006	Application #:	10131554	Filing Dt:	04/24/2002
Publication #:	US20030204800	Pub Dt:	10/30/2003
Title:	METHOD AND SYSTEM FOR AN ON-CHIP AC SELF-TEST CONTROLLER

Patent #:	6787912	Issue Dt:	09/07/2004	Application #:	10132173	Filing Dt:	04/26/2002
Publication #:	US20030201537	Pub Dt:	10/30/2003
Title:	BARRIER MATERIAL FOR COPPER STRUCTURES

Patent #:	6730617	Issue Dt:	05/04/2004	Application #:	10132530	Filing Dt:	04/24/2002
Publication #:	US20030203649	Pub Dt:	10/30/2003
Title:	METHOD OF FABRICATING ONE OR MORE TIERS OF AN INTEGRATED CIRCUIT

Patent #:	6633040	Issue Dt:	10/14/2003	Application #:	10132896	Filing Dt:	04/25/2002
Title:	SOLENOID ELECTRON BEAM LENSES WITH HIGH DEMAGNIFICATION AND LOW ABERRATIONS

Patent #:	6806182	Issue Dt:	10/19/2004	Application #:	10137274	Filing Dt:	05/01/2002
Publication #:	US20030207559	Pub Dt:	11/06/2003
Title:	METHOD FOR ELIMINATING VIA RESISTANCE SHIFT IN ORGANIC ILD

Patent #:	6653048	Issue Dt:	11/25/2003	Application #:	10138498	Filing Dt:	05/06/2002
Publication #:	US20020127490	Pub Dt:	09/12/2002
Title:	HIGH SILICON CONTENT MONOMERS AND POLYMERS SUITABLE FOR 193 NM BILAYER RESISTS

Patent #:	6826740	Issue Dt:	11/30/2004	Application #:	10140517	Filing Dt:	05/07/2002
Publication #:	US20030212976	Pub Dt:	11/13/2003
Title:	AUTOMATED BUFFER INSERTION INCORPORATING CONGESTION RELIEF FOR USE IN CONNECTION WITH PHYSICAL DESIGN OF INTEGRATED CIRCUIT

Patent #:	6657886	Issue Dt:	12/02/2003	Application #:	10140549	Filing Dt:	05/07/2002
Publication #:	US20030210565	Pub Dt:	11/13/2003
Title:	SPLIT LOCAL AND CONTINUOUS BITLINE FOR FAST DOMINO READ SRAM

Patent #:	6797641	Issue Dt:	09/28/2004	Application #:	10141279	Filing Dt:	05/08/2002
Publication #:	US20020125503	Pub Dt:	09/12/2002
Title:	GATE OXIDE STABILIZATION BY MEANS OF GERMANIUM COMPONENTS IN GATE CONDUCTOR

Patent #:	NONE	Issue Dt:		Application #:	10141482	Filing Dt:	05/08/2002
Publication #:	US20020132185	Pub Dt:	09/19/2002
Title:	Copolymer photoresist with improved etch resistance

Patent #:	6782177	Issue Dt:	08/24/2004	Application #:	10141637	Filing Dt:	05/07/2002
Publication #:	US20020178760	Pub Dt:	12/05/2002
Title:	METHOD FOR MANUFACTURING AN OPTICAL DEVICE WITH A DEFINED TOTAL DEVICE STRESS

Patent #:	6768857	Issue Dt:	07/27/2004	Application #:	10141665	Filing Dt:	05/07/2002
Publication #:	US20020194876	Pub Dt:	12/26/2002
Title:	METHOD FOR MANUFACTURING AN OPTICAL DEVICE WITH A DEFINED TOTAL DEVICE STRESS

Patent #:	6576382	Issue Dt:	06/10/2003	Application #:	10142018	Filing Dt:	05/09/2002
Publication #:	US20020177072	Pub Dt:	11/28/2002
Title:	COMPOSITION FOR PHOTOIMAGING

Patent #:	6870213	Issue Dt:	03/22/2005	Application #:	10143291	Filing Dt:	05/10/2002
Publication #:	US20030209752	Pub Dt:	11/13/2003
Title:	EEPROM DEVICE WITH SUBSTRATE HOT-ELECTRON INJECTOR FOR LOW-POWER

Patent #:	7426559	Issue Dt:	09/16/2008	Application #:	10143317	Filing Dt:	05/09/2002
Publication #:	US20030212789	Pub Dt:	11/13/2003
Title:	METHOD FOR SEQUENTIAL COORDINATION OF EXTERNAL DATABASE APPLICATION EVENTS WITH ASYNCHRONOUS INTERNAL DATABASE EVENTS

Patent #:	6706566	Issue Dt:	03/16/2004	Application #:	10144402	Filing Dt:	05/13/2002
Publication #:	US20020173083	Pub Dt:	11/21/2002
Title:	METHODOLOGY FOR ELECTRICALLY INDUCED SELECTIVE BREAKDOWN OF NANOTUBES

Patent #:	6767584	Issue Dt:	07/27/2004	Application #:	10144510	Filing Dt:	05/13/2002
Publication #:	US20030211365	Pub Dt:	11/13/2003
Title:	DISK SUBSTRATE WITH MONOSIZED MICROBUMPS

Patent #:	6737725	Issue Dt:	05/18/2004	Application #:	10144574	Filing Dt:	05/13/2002
Publication #:	US20020127844	Pub Dt:	09/12/2002
Title:	MULTILEVEL INTERCONNECT STRUCTURE CONTAINING AIR GAPS AND METHOD FOR MAKING

Patent #:	7216284	Issue Dt:	05/08/2007	Application #:	10145018	Filing Dt:	05/15/2002
Publication #:	US20030217321	Pub Dt:	11/20/2003
Title:	CONTENT ADDRESSABLE MEMORY HAVING REDUCED POWER CONSUMPTION

Patent #:	NONE	Issue Dt:		Application #:	10145661	Filing Dt:	05/14/2002
Publication #:	US20030048108	Pub Dt:	03/13/2003
Title:	STRUCTURAL DESIGN AND PROCESSES TO CONTROL PROBE POSITION ACCURACY IN A WAFER TEST PROBE ASSEMBLY

Patent #:	6618281	Issue Dt:	09/09/2003	Application #:	10146154	Filing Dt:	05/15/2002
Title:	CONTENT ADDRESSABLE MEMORY (CAM) WITH ERROR CHECKING AND CORRECTION (ECC) CAPABILITY

Patent #:	7353159	Issue Dt:	04/01/2008	Application #:	10146331	Filing Dt:	05/15/2002
Publication #:	US20020173943	Pub Dt:	11/21/2002
Title:	METHOD FOR PARALLEL SIMULATION ON A SINGLE MICROPROCESSOR USING META-MODELS

Patent #:	6727539	Issue Dt:	04/27/2004	Application #:	10147150	Filing Dt:	05/16/2002
Publication #:	US20030003651	Pub Dt:	01/02/2003
Title:	EMBEDDED VERTICAL DRAM ARRAYS WITH SILICIDED BITLINE AND POLYSILICON INTERCONNECT

Patent #:	6682992	Issue Dt:	01/27/2004	Application #:	10147270	Filing Dt:	05/15/2002
Publication #:	US20030216013	Pub Dt:	11/20/2003
Title:	METHOD OF CONTROLLING GRAIN SIZE IN A POLYSILICON LAYER AND IN SEMICONDUCTOR DEVICES HAVING POLYSILICONE STRUCTURES

Patent #:	7568228	Issue Dt:	07/28/2009	Application #:	10150783	Filing Dt:	05/17/2002
Publication #:	US20020194469	Pub Dt:	12/19/2002
Title:	INTRUSION DETECTION IN DATA PROCESSING SYSTEMS

Patent #:	6879512	Issue Dt:	04/12/2005	Application #:	10154796	Filing Dt:	05/24/2002
Publication #:	US20030218903	Pub Dt:	11/27/2003
Title:	NONVOLATILE MEMORY DEVICE UTILIZING SPIN-VALVE-TYPE DESIGNS AND CURRENT PULSES

Patent #:	6690072	Issue Dt:	02/10/2004	Application #:	10156782	Filing Dt:	05/24/2002
Publication #:	US20030219965	Pub Dt:	11/27/2003
Title:	METHOD AND STRUCTURE FOR ULTRA-LOW CONTACT RESISTANCE CMOS FORMED BY VERTICALLY SELF-ALIGNED COSI2 ON RAISED SOURCE DRAIN SI/SIGE DEVICE

Patent #:	6548418	Issue Dt:	04/15/2003	Application #:	10158249	Filing Dt:	05/30/2002
Publication #:	US20020145179	Pub Dt:	10/10/2002
Title:	DUAL LAYER ETCH STOP BARRIER

Patent #:	6653737	Issue Dt:	11/25/2003	Application #:	10159181	Filing Dt:	05/31/2002
Publication #:	US20020142581	Pub Dt:	10/03/2002
Title:	INTERCONNECTION STRUCTURE AND METHOD FOR FABRICATING SAME

Patent #:	6835973	Issue Dt:	12/28/2004	Application #:	10159573	Filing Dt:	05/31/2002
Publication #:	US20020182837	Pub Dt:	12/05/2002
Title:	ANTIFUSE FOR USE WITH LOW KAPPA DIELECTRIC FOAM INSULATORS

Patent #:	6806026	Issue Dt:	10/19/2004	Application #:	10159635	Filing Dt:	05/31/2002
Publication #:	US20030224283	Pub Dt:	12/04/2003
Title:	PHOTORESIST COMPOSITION

Patent #:	6826733	Issue Dt:	11/30/2004	Application #:	10159921	Filing Dt:	05/30/2002
Publication #:	US20030226122	Pub Dt:	12/04/2003
Title:	PARAMETER VARIATION TOLERANT METHOD FOR CIRCUIT DESIGN OPTIMIZATION

Patent #:	6662347	Issue Dt:	12/09/2003	Application #:	10160300	Filing Dt:	05/30/2002
Publication #:	US20030097645	Pub Dt:	05/22/2003
Title:	ON-CHIP DIAGNOSTIC SYSTEM, INTEGRATED CIRCUIT AND METHOD

Patent #:	6652665	Issue Dt:	11/25/2003	Application #:	10160627	Filing Dt:	05/31/2002
Title:	METHOD OF REMOVING SILICONE POLYMER DEPOSITS FROM ELECTRONIC COMPONENTS

Patent #:	7047466	Issue Dt:	05/16/2006	Application #:	10161425	Filing Dt:	06/03/2002
Publication #:	US20030226078	Pub Dt:	12/04/2003
Title:	APPARATUS AND METHOD FOR PROGRAMMABLE FUSE REPAIR TO SUPPORT DYNAMIC RELOCATE AND IMPROVED CACHE TESTING

Patent #:	6635525	Issue Dt:	10/21/2003	Application #:	10161960	Filing Dt:	06/03/2002
Title:	Method of making backside buried strap for SOI DRAM trench capacitor

Patent #:	7197102	Issue Dt:	03/27/2007	Application #:	10163340	Filing Dt:	06/07/2002
Publication #:	US20030227989	Pub Dt:	12/11/2003
Title:	METHOD AND APPARATUS FOR CLOCK-AND-DATA RECOVERY USING A SECONDARY DELAY-LOCKED LOOP

Patent #:	6824932	Issue Dt:	11/30/2004	Application #:	10164242	Filing Dt:	06/05/2002
Publication #:	US20030228526	Pub Dt:	12/11/2003
Title:	SELF-ALIGNED ALTERNATING PHASE SHIFT MASK PATTERNING PROCESS

Patent #:	6809027	Issue Dt:	10/26/2004	Application #:	10165264	Filing Dt:	06/06/2002
Publication #:	US20030228752	Pub Dt:	12/11/2003
Title:	SELF-ALIGNED BORDERLESS CONTACTS

Patent #:	6789099	Issue Dt:	09/07/2004	Application #:	10167170	Filing Dt:	06/10/2002
Publication #:	US20040073592	Pub Dt:	04/15/2004
Title:	SENSE-AMP BASED ADDER WITH SOURCE FOLLOWER EVALUATION TREE

Patent #:	6656773	Issue Dt:	12/02/2003	Application #:	10167635	Filing Dt:	06/12/2002
Publication #:	US20020192876	Pub Dt:	12/19/2002
Title:	TRANSFER MOLDING OF INTEGRATED CIRCUIT PACKAGES

Patent #:	7887711	Issue Dt:	02/15/2011	Application #:	10170914	Filing Dt:	06/13/2002
Publication #:	US20030230549	Pub Dt:	12/18/2003
Title:	METHOD FOR ETCHING CHEMICALLY INERT METAL OXIDES

Patent #:	6777298	Issue Dt:	08/17/2004	Application #:	10172649	Filing Dt:	06/14/2002
Publication #:	US20030232464	Pub Dt:	12/18/2003
Title:	ELEVATED SOURCE DRAIN DISPOSABLE SPACER CMOS

Patent #:	6764774	Issue Dt:	07/20/2004	Application #:	10174748	Filing Dt:	06/19/2002
Publication #:	US20030235710	Pub Dt:	12/25/2003
Title:	STRUCTURES WITH IMPROVED ADHESION TO SI AND C CONTAINING DIELECTRICS AND METHOD FOR PREPARING THE SAME

Patent #:	6909159	Issue Dt:	06/21/2005	Application #:	10176233	Filing Dt:	06/20/2002
Publication #:	US20030234430	Pub Dt:	12/25/2003
Title:	METHOD AND APPARATUS TO MAKE A SEMICONDUCTOR CHIP SUSCEPTIBLE TO RADIATION FAILURE

Patent #:	6667791	Issue Dt:	12/23/2003	Application #:	10177243	Filing Dt:	06/21/2002
Publication #:	US20020196402	Pub Dt:	12/26/2002
Title:	PASSIVE DRIVE MATRIX DISPLAY

Patent #:	6779711	Issue Dt:	08/24/2004	Application #:	10180777	Filing Dt:	06/25/2002
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Title:	SELF-ALIGNED CORROSION STOP FOR COPPER C4 AND WIREBOND

Patent #:	6900092	Issue Dt:	05/31/2005	Application #:	10183336	Filing Dt:	06/27/2002
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Title:	SURFACE ENGINEERING TO PREVENT EPI GROWTH ON GATE POLY DURING SELECTIVE EPI PROCESSING

Patent #:	6809030	Issue Dt:	10/26/2004	Application #:	10185547	Filing Dt:	06/28/2002
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Title:	METHOD AND STRUCTURE FOR CONTROLLING THE INTERFACE ROUGHNESS OF COBALT DISILICIDE

100

Patent #:	6756639	Issue Dt:	06/29/2004	Application #:	10185580	Filing Dt:	06/28/2002
Publication #:	US20030008471	Pub Dt:	01/09/2003
Title:	CONTROL OF BURIED OXIDE QUALITY IN LOW DOSE SIMOX

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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