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Reel/Frame:036779/0001   Pages: 985
Recorded: 10/05/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14854
Page 24 of 149
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1
Patent #:
7855130
Issue Dt:
12/21/2010
Application #:
10249576
Filing Dt:
04/21/2003
Publication #:
US20040209443
Pub Dt:
10/21/2004
Title:
CORROSION INHIBITOR ADDITIVES TO PREVENT SEMICONDUCTOR DEVICE BOND-PAD CORROSION DURING WAFER DICING OPERATIONS
2
Patent #:
6950188
Issue Dt:
09/27/2005
Application #:
10249602
Filing Dt:
04/23/2003
Publication #:
US20040212801
Pub Dt:
10/28/2004
Title:
WAFER ALIGNMENT SYSTEM USING PARALLEL IMAGING DETECTION
3
Patent #:
6825711
Issue Dt:
11/30/2004
Application #:
10249684
Filing Dt:
04/30/2003
Publication #:
US20040217805
Pub Dt:
11/04/2004
Title:
POWER REDUCTION BY STAGE IN INTEGRATED CIRCUIT
4
Patent #:
6909147
Issue Dt:
06/21/2005
Application #:
10249738
Filing Dt:
05/05/2003
Publication #:
US20040222477
Pub Dt:
11/11/2004
Title:
MULTI-HEIGHT FINFETS
5
Patent #:
6680681
Issue Dt:
01/20/2004
Application #:
10249795
Filing Dt:
05/08/2003
Title:
HIGH SPEED FIR TRANSMITTER
6
Patent #:
6921978
Issue Dt:
07/26/2005
Application #:
10249799
Filing Dt:
05/08/2003
Publication #:
US20040224494
Pub Dt:
11/11/2004
Title:
METHOD TO GENERATE POROUS ORGANIC DIELECTRIC
7
Patent #:
NONE
Issue Dt:
Application #:
10249819
Filing Dt:
05/09/2003
Publication #:
US20040222436
Pub Dt:
11/11/2004
Title:
BICMOS TECHNOLOGY ON SOI SUBSTRATES
8
Patent #:
6809024
Issue Dt:
10/26/2004
Application #:
10249821
Filing Dt:
05/09/2003
Publication #:
US20040222497
Pub Dt:
11/11/2004
Title:
METHOD TO FABRICATE HIGH-PERFORMANCE NPN TRANSISTORS IN A BICMOS PROCESS
9
Patent #:
6798066
Issue Dt:
09/28/2004
Application #:
10249910
Filing Dt:
05/16/2003
Title:
HEAT DISSIPATION FROM IC INTERCONNECTS
10
Patent #:
6777147
Issue Dt:
08/17/2004
Application #:
10249944
Filing Dt:
05/21/2003
Title:
METHOD FOR EVALUATING THE EFFECTS OF MULTIPLE EXPOSURE PROCESSES IN LITHOGRAPHY
11
Patent #:
6790739
Issue Dt:
09/14/2004
Application #:
10249997
Filing Dt:
05/27/2003
Publication #:
US20030186502
Pub Dt:
10/02/2003
Title:
STRUCTURE AND METHODS FOR PROCESS INTEGRATION IN VERTICAL DRAM CELL FABRICATION
12
Patent #:
6937054
Issue Dt:
08/30/2005
Application #:
10250043
Filing Dt:
05/30/2003
Publication #:
US20040239369
Pub Dt:
12/02/2004
Title:
PROGRAMMABLE PEAKING RECEIVER AND METHOD
13
Patent #:
6987042
Issue Dt:
01/17/2006
Application #:
10250046
Filing Dt:
05/30/2003
Publication #:
US20040241939
Pub Dt:
12/02/2004
Title:
METHOD OF FORMING A COLLAR USING SELECTIVE SIGE/AMORPHOUS SI ETCH
14
Patent #:
6887798
Issue Dt:
05/03/2005
Application #:
10250047
Filing Dt:
05/30/2003
Publication #:
US20040242010
Pub Dt:
12/02/2004
Title:
STI STRESS MODIFICATION BY NITROGEN PLASMA TREATMENT FOR IMPROVING PERFORMANCE IN SMALL WIDTH DEVICES
15
Patent #:
6946358
Issue Dt:
09/20/2005
Application #:
10250053
Filing Dt:
05/30/2003
Publication #:
US20040241955
Pub Dt:
12/02/2004
Title:
METHOD OF FABRICATING SHALLOW TRENCH ISOLATION BY ULTRA-THIN SIMOX PROCESSING
16
Patent #:
6905941
Issue Dt:
06/14/2005
Application #:
10250069
Filing Dt:
06/02/2003
Publication #:
US20040241981
Pub Dt:
12/02/2004
Title:
STRUCTURE AND METHOD TO FABRICATE ULTRA-THIN SI CHANNEL DEVICES
17
Patent #:
6869860
Issue Dt:
03/22/2005
Application #:
10250092
Filing Dt:
06/03/2003
Publication #:
US20040248374
Pub Dt:
12/09/2004
Title:
FILLING HIGH ASPECT RATIO ISOLATION STRUCTURES WITH POLYSILAZANE BASED MATERIAL
18
Patent #:
6777302
Issue Dt:
08/17/2004
Application #:
10250100
Filing Dt:
06/04/2003
Title:
NITRIDE PEDESTAL FOR RAISED EXTRINSIC BASE HBT PROCESS
19
Patent #:
6964897
Issue Dt:
11/15/2005
Application #:
10250157
Filing Dt:
06/09/2003
Publication #:
US20040248363
Pub Dt:
12/09/2004
Title:
SOI TRENCH CAPACITOR CELL INCORPORATING A LOW-LEAKAGE FLOATING BODY ARRAY TRANSISTOR
20
Patent #:
6853234
Issue Dt:
02/08/2005
Application #:
10250159
Filing Dt:
06/09/2003
Publication #:
US20040246038
Pub Dt:
12/09/2004
Title:
LEVEL SHIFT CIRCUITRY HAVING DELAY BOOST
21
Patent #:
7046572
Issue Dt:
05/16/2006
Application #:
10250233
Filing Dt:
06/16/2003
Publication #:
US20040252573
Pub Dt:
12/16/2004
Title:
LOW POWER MANAGER FOR STANDBY OPERATION OF MEMORY SYSTEM
22
Patent #:
6787838
Issue Dt:
09/07/2004
Application #:
10250259
Filing Dt:
06/18/2003
Title:
TRENCH CAPACITOR DRAM CELL USING BURIED OXIDE AS ARRAY TOP OXIDE
23
Patent #:
6940285
Issue Dt:
09/06/2005
Application #:
10250272
Filing Dt:
06/19/2003
Publication #:
US20040257086
Pub Dt:
12/23/2004
Title:
METHOD AND APPARATUS FOR TESTING A MICRO ELECTROMECHANICAL DEVICE
24
Patent #:
6825561
Issue Dt:
11/30/2004
Application #:
10250273
Filing Dt:
06/19/2003
Publication #:
US20040256729
Pub Dt:
12/23/2004
Title:
STRUCTURE AND METHOD FOR ELIMINATING TIME DEPENDENT DIELECTRIC BREAKDOWN FAILURE OF LOW-K MATERIAL
25
Patent #:
7289659
Issue Dt:
10/30/2007
Application #:
10250295
Filing Dt:
06/20/2003
Publication #:
US20040258294
Pub Dt:
12/23/2004
Title:
METHOD AND APPARATUS FOR MANUFACTURING DIAMOND SHAPED CHIPS
26
Patent #:
6961995
Issue Dt:
11/08/2005
Application #:
10251072
Filing Dt:
09/19/2002
Publication #:
US20030020150
Pub Dt:
01/30/2003
Title:
COMPLIANT LAYER FOR ENCAPSULATED COLUMNS
27
Patent #:
6679707
Issue Dt:
01/20/2004
Application #:
10254239
Filing Dt:
09/25/2002
Title:
LAND GRID ARRAY CONNECTOR AND METHOD FOR FORMING THE SAME
28
Patent #:
6746947
Issue Dt:
06/08/2004
Application #:
10254277
Filing Dt:
09/25/2002
Publication #:
US20030116820
Pub Dt:
06/26/2003
Title:
POST-FUSE BLOW CORROSION PREVENTION STRUCTURE FOR COPPER FUSES
29
Patent #:
6784676
Issue Dt:
08/31/2004
Application #:
10254388
Filing Dt:
09/25/2002
Publication #:
US20040056649
Pub Dt:
03/25/2004
Title:
PRESSURIZED ELECTRICAL CONTACT SYSTEM
30
Patent #:
6703704
Issue Dt:
03/09/2004
Application #:
10254391
Filing Dt:
09/25/2002
Title:
STRESS REDUCING STIFFENER RING
31
Patent #:
6756662
Issue Dt:
06/29/2004
Application #:
10254414
Filing Dt:
09/25/2002
Publication #:
US20040056347
Pub Dt:
03/25/2004
Title:
SEMICONDUCTOR CHIP MODULE AND METHOD OF MANUFACTURE OF SAME
32
Patent #:
6653704
Issue Dt:
11/25/2003
Application #:
10254432
Filing Dt:
09/24/2002
Title:
MAGNETIC MEMORY WITH TUNNEL JUNCTION MEMORY CELLS AND PHASE TRANSITION MATERIAL FOR CONTROLLING CURRENT TO THE CELLS
33
Patent #:
7115916
Issue Dt:
10/03/2006
Application #:
10255351
Filing Dt:
09/26/2002
Publication #:
US20040061422
Pub Dt:
04/01/2004
Title:
SYSTEM AND METHOD FOR MOLECULAR OPTICAL EMISSION
34
Patent #:
6677522
Issue Dt:
01/13/2004
Application #:
10255457
Filing Dt:
09/26/2002
Title:
PACKAGE FOR ELECTRONIC COMPONENT
35
Patent #:
6915496
Issue Dt:
07/05/2005
Application #:
10255469
Filing Dt:
09/26/2002
Publication #:
US20040064793
Pub Dt:
04/01/2004
Title:
APPARATUS AND METHOD FOR INCORPORATING DRIVER SIZING INTO BUFFER INSERTION USING A DELAY PENALTY ESTIMATION TECHNIQUE
36
Patent #:
6807659
Issue Dt:
10/19/2004
Application #:
10256104
Filing Dt:
09/26/2002
Publication #:
US20040064798
Pub Dt:
04/01/2004
Title:
ROBUST DELAY METRIC FOR RC CIRCUITS
37
Patent #:
6744087
Issue Dt:
06/01/2004
Application #:
10256881
Filing Dt:
09/27/2002
Publication #:
US20040061153
Pub Dt:
04/01/2004
Title:
NON-VOLATILE MEMORY USING FERROELECTRIC GATE FIELD-EFFECT TRANSISTORS
38
Patent #:
7101768
Issue Dt:
09/05/2006
Application #:
10260053
Filing Dt:
09/27/2002
Publication #:
US20040063297
Pub Dt:
04/01/2004
Title:
SELF-ALIGNED SELECTIVE HEMISPHERICAL GRAIN DEPOSITION PROCESS AND STRUCTURE FOR ENHANCED CAPACITANCE TRENCH CAPACITOR
39
Patent #:
6859413
Issue Dt:
02/22/2005
Application #:
10260087
Filing Dt:
09/27/2002
Publication #:
US20040062137
Pub Dt:
04/01/2004
Title:
METHOD AND APPARATUS FOR DLL LOCK LATENCY DETECTION
40
Patent #:
6605838
Issue Dt:
08/12/2003
Application #:
10261219
Filing Dt:
09/30/2002
Title:
PROCESS FLOW FOR THICK ISOLATION COLLAR WITH REDUCED LENGTH
41
Patent #:
NONE
Issue Dt:
Application #:
10261275
Filing Dt:
09/30/2002
Publication #:
US20040060904
Pub Dt:
04/01/2004
Title:
Tool having a plurality of electrodes and corresponding method of altering a very small surface
42
Patent #:
6759702
Issue Dt:
07/06/2004
Application #:
10261559
Filing Dt:
09/30/2002
Publication #:
US20040061161
Pub Dt:
04/01/2004
Title:
MEMORY CELL WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR WITH REDUCED BURRIED STRAP
43
Patent #:
6881072
Issue Dt:
04/19/2005
Application #:
10263510
Filing Dt:
10/01/2002
Publication #:
US20040063352
Pub Dt:
04/01/2004
Title:
MEMBRANE PROBE WITH ANCHORED ELEMENTS
44
Patent #:
6819373
Issue Dt:
11/16/2004
Application #:
10263851
Filing Dt:
10/03/2002
Publication #:
US20040066478
Pub Dt:
04/08/2004
Title:
LAMINATION OF LIQUID CRYSTAL POLYMER DIELECTRIC FILMS
45
Patent #:
6832364
Issue Dt:
12/14/2004
Application #:
10264142
Filing Dt:
10/03/2002
Publication #:
US20040068712
Pub Dt:
04/08/2004
Title:
INTEGRATED LITHOGRAPHIC LAYOUT OPTIMIZATION
46
Patent #:
6834378
Issue Dt:
12/21/2004
Application #:
10264162
Filing Dt:
10/03/2002
Publication #:
US20040068707
Pub Dt:
04/08/2004
Title:
SYSTEM ON A CHIP BUS WITH AUTOMATIC PIPELINE STAGE INSERTION FOR TIMING CLOSURE
47
Patent #:
7038553
Issue Dt:
05/02/2006
Application #:
10264893
Filing Dt:
10/03/2002
Publication #:
US20040066249
Pub Dt:
04/08/2004
Title:
SCALABLE COMPUTER SYSTEM HAVING SURFACE-MOUNTED CAPACITIVE COUPLERS FOR INTERCOMMUNICATION
48
Patent #:
6979851
Issue Dt:
12/27/2005
Application #:
10265558
Filing Dt:
10/04/2002
Publication #:
US20040066666
Pub Dt:
04/08/2004
Title:
STRUCTURE AND METHOD OF VERTICAL TRANSISTOR DRAM CELL HAVING A LOW LEAKAGE BURIED STRAP
49
Patent #:
6768694
Issue Dt:
07/27/2004
Application #:
10265591
Filing Dt:
10/07/2002
Publication #:
US20040066695
Pub Dt:
04/08/2004
Title:
METHOD OF ELECTRICALLY BLOWING FUSES UNDER CONTROL OF AN ON-CHIP TESTER INTERFACE APPARATUS
50
Patent #:
7289572
Issue Dt:
10/30/2007
Application #:
10265755
Filing Dt:
10/07/2002
Publication #:
US20040066855
Pub Dt:
04/08/2004
Title:
METHOD AND SYSTEM FOR SCALABLE PRE-DRIVER TO DRIVER INTERFACE
51
Patent #:
6737364
Issue Dt:
05/18/2004
Application #:
10266000
Filing Dt:
10/07/2002
Publication #:
US20040067659
Pub Dt:
04/08/2004
Title:
METHOD FOR FABRICATING CRYSTALLINE-DIELECTRIC THIN FILMS AND DEVICES FORMED USING SAME
52
Patent #:
6968413
Issue Dt:
11/22/2005
Application #:
10266132
Filing Dt:
10/07/2002
Publication #:
US20040068600
Pub Dt:
04/08/2004
Title:
METHOD AND SYSTEM FOR CONFIGURING TERMINATORS IN A SERIAL COMMUNICATION SYSTEM
53
Patent #:
6766083
Issue Dt:
07/20/2004
Application #:
10268638
Filing Dt:
10/10/2002
Publication #:
US20030072534
Pub Dt:
04/17/2003
Title:
TUNABLE COUPLER DEVICE AND OPTICAL FILTER
54
Patent #:
6813409
Issue Dt:
11/02/2004
Application #:
10268640
Filing Dt:
10/10/2002
Publication #:
US20040071390
Pub Dt:
04/15/2004
Title:
FREE-SPACE NON-BLOCKING SWITCH
55
Patent #:
6974531
Issue Dt:
12/13/2005
Application #:
10269956
Filing Dt:
10/15/2002
Publication #:
US20040069648
Pub Dt:
04/15/2004
Title:
METHOD FOR ELECTROPLATING ON RESISTIVE SUBSTRATES
56
Patent #:
6801693
Issue Dt:
10/05/2004
Application #:
10272694
Filing Dt:
10/16/2002
Publication #:
US20040208453
Pub Dt:
10/21/2004
Title:
OPTICAL BACKPLANE ARRAY CONNECTOR
57
Patent #:
6933619
Issue Dt:
08/23/2005
Application #:
10273786
Filing Dt:
10/18/2002
Publication #:
US20030034569
Pub Dt:
02/20/2003
Title:
ELECTRONIC PACKAGE AND METHOD OF FORMING
58
Patent #:
7319946
Issue Dt:
01/15/2008
Application #:
10274861
Filing Dt:
10/21/2002
Publication #:
US20040078176
Pub Dt:
04/22/2004
Title:
METHOD FOR ON-CHIP SIGNAL INTEGRITY AND NOISE VERIFICATION USING FREQUENCY DEPENDENT RLC EXTRACTION AND MODELING TECHNIQUES
59
Patent #:
6770501
Issue Dt:
08/03/2004
Application #:
10277835
Filing Dt:
10/23/2002
Publication #:
US20030102529
Pub Dt:
06/05/2003
Title:
DEUTERIUM RESERVOIRS AND INGRESS PATHS
60
Patent #:
6806584
Issue Dt:
10/19/2004
Application #:
10277907
Filing Dt:
10/21/2002
Publication #:
US20040075151
Pub Dt:
04/22/2004
Title:
SEMICONDUCTOR DEVICE STRUCTURE INCLUDING MULTIPLE FETS HAVING DIFFERENT SPACER WIDTHS
61
Patent #:
6661069
Issue Dt:
12/09/2003
Application #:
10278211
Filing Dt:
10/22/2002
Title:
MICRO-ELECTROMECHANICAL VARACTOR WITH ENHANCED TUNING RANGE
62
Patent #:
6844609
Issue Dt:
01/18/2005
Application #:
10278431
Filing Dt:
10/23/2002
Publication #:
US20030071324
Pub Dt:
04/17/2003
Title:
ANTIFUSE WITH ELECTROSTATIC ASSIST
63
Patent #:
6812143
Issue Dt:
11/02/2004
Application #:
10279057
Filing Dt:
10/24/2002
Publication #:
US20030203617
Pub Dt:
10/30/2003
Title:
PROCESS OF FORMING COPPER STRUCTURES
64
Patent #:
6630395
Issue Dt:
10/07/2003
Application #:
10280266
Filing Dt:
10/24/2002
Title:
METHODS FOR FABRICATING ELECTRICAL CONNECTIONS TO SEMICONDUCTOR STRUCTURES INCORPORATING LOW-K DIELECTRIC MATERIALS
65
Patent #:
7023093
Issue Dt:
04/04/2006
Application #:
10280283
Filing Dt:
10/24/2002
Publication #:
US20040087135
Pub Dt:
05/06/2004
Title:
VERY LOW EFFECTIVE DIELECTRIC CONSTANT INTERCONNECT STRUCTURES AND METHODS FOR FABRICATING THE SAME
66
Patent #:
6835983
Issue Dt:
12/28/2004
Application #:
10280661
Filing Dt:
10/25/2002
Publication #:
US20040079993
Pub Dt:
04/29/2004
Title:
SILICON-ON-INSULATOR (SOI) INTEGRATED CIRCUIT (IC) CHIP WITH THE SILICON LAYERS CONSISTING OF REGIONS OF DIFFERENT THICKNESS
67
Patent #:
6734259
Issue Dt:
05/11/2004
Application #:
10281038
Filing Dt:
10/24/2002
Publication #:
US20040082730
Pub Dt:
04/29/2004
Title:
RESIN COMPOSITION WITH A POLYMERIZING AGENT AND METHOD OF MANUFACTURING PREPREG AND OTHER LAMINATE STRUCTURES THEREFROM
68
Patent #:
6935018
Issue Dt:
08/30/2005
Application #:
10281450
Filing Dt:
10/25/2002
Publication #:
US20030102224
Pub Dt:
06/05/2003
Title:
COPPER PLATED INVAR WITH ACID PRECLEAN
69
Patent #:
6576549
Issue Dt:
06/10/2003
Application #:
10282275
Filing Dt:
10/28/2002
Publication #:
US20030054635
Pub Dt:
03/20/2003
Title:
FABRICATION OF A METALIZED BLIND VIA
70
Patent #:
7032146
Issue Dt:
04/18/2006
Application #:
10282825
Filing Dt:
10/29/2002
Publication #:
US20040083413
Pub Dt:
04/29/2004
Title:
BOUNDARY SCAN APPARATUS AND INTERCONNECT TEST METHOD
71
Patent #:
6781141
Issue Dt:
08/24/2004
Application #:
10284509
Filing Dt:
10/29/2002
Publication #:
US20040079895
Pub Dt:
04/29/2004
Title:
METHOD AND STRUCTURE FOR DETECTION AND MEASUREMENT OF ELECTRICAL AND MECHANICAL RESONANCE ASSOCIATED WITH AN E-BEAM LITHOGRAPHY TOOL
72
Patent #:
6785615
Issue Dt:
08/31/2004
Application #:
10284510
Filing Dt:
10/29/2002
Publication #:
US20040079896
Pub Dt:
04/29/2004
Title:
METHOD AND STRUCTURE FOR DETECTION OF ELECTROMECHANICAL PROBLEMS USING VARIANCE STATISTICS IN AN E-BEAM LITHOGRAPHY DEVICE
73
Patent #:
6800864
Issue Dt:
10/05/2004
Application #:
10284511
Filing Dt:
10/29/2002
Publication #:
US20040079901
Pub Dt:
04/29/2004
Title:
METHOD AND STRUCTURE FOR REDUCING EFFECTS OF NOISE AND RESONANCE ASSOCIATED WITH AN E-BEAM LITHOGRAPHY TOOL
74
Patent #:
6670223
Issue Dt:
12/30/2003
Application #:
10285023
Filing Dt:
10/31/2002
Publication #:
US20030053297
Pub Dt:
03/20/2003
Title:
COUPLED-CAP FLIP CHIP BGA PACKAGE WITH IMPROVED CAP DESIGN FOR REDUCED INTERFACIAL STRESSES
75
Patent #:
6638607
Issue Dt:
10/28/2003
Application #:
10285162
Filing Dt:
10/30/2002
Title:
METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS
76
Patent #:
6597596
Issue Dt:
07/22/2003
Application #:
10286206
Filing Dt:
11/01/2002
Publication #:
US20030065880
Pub Dt:
04/03/2003
Title:
CONTENT ADDRESSABLE MEMORY HAVING CASCADED SUB-ENTRY ARCHITECTURE
77
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6911400
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06/28/2005
Application #:
10287905
Filing Dt:
11/05/2002
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Pub Dt:
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Title:
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6641899
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11/04/2003
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10287935
Filing Dt:
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Title:
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79
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Filing Dt:
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Pub Dt:
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Title:
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6707095
Issue Dt:
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Filing Dt:
11/06/2002
Title:
STRUCTURE AND METHOD FOR IMPROVED VERTICAL MOSFET DRAM CELL-TO-CELL ISOLATION
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6783862
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08/31/2004
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Pub Dt:
06/19/2003
Title:
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Pub Dt:
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Title:
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12/21/2004
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10292204
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Pub Dt:
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Title:
METHOD OF FABRICATING A STACKED POLY-POLY AND MOS CAPACITOR USING A SIGE INTEGRATION SCHEME
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10292205
Filing Dt:
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Pub Dt:
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Title:
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Pub Dt:
05/13/2004
Title:
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07/12/2005
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Pub Dt:
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Title:
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08/17/2004
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Pub Dt:
05/20/2004
Title:
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88
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6773570
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08/10/2004
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Pub Dt:
05/20/2004
Title:
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89
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03/11/2004
Title:
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Title:
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Title:
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6846734
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Pub Dt:
05/20/2004
Title:
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93
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Pub Dt:
05/20/2004
Title:
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05/20/2004
Title:
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95
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NONE
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11/20/2002
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Pub Dt:
05/20/2004
Title:
Method of forming planar Cu interconnects without chemical mechanical polishing
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6800503
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11/20/2002
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Pub Dt:
05/20/2004
Title:
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6963080
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11/08/2005
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07/24/2003
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7125989
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10300645
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07/31/2003
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6686637
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02/03/2004
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10301436
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Title:
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6706621
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03/16/2004
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10302412
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11/22/2002
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US20030071329
Pub Dt:
04/17/2003
Title:
WAFER INTEGRATED RIGID SUPPORT RING
Assignors
1
GLOBALFOUNDRIES U.S. 2 LLC
Exec Dt:
09/10/2015
2
GLOBALFOUNDRIES U.S. INC.
Exec Dt:
09/10/2015
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309
UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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