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Reel/Frame:023796/0001   Pages: 393
Recorded: 01/15/2010
Attorney Dkt #:609612800100
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 270
Page 3 of 3
Pages: 1 2 3
1
Patent #:
6958613
Issue Dt:
10/25/2005
Application #:
10675492
Filing Dt:
09/30/2003
Publication #:
US20040080322
Pub Dt:
04/29/2004
Title:
METHOD FOR CALIBRATING SEMICONDUCTOR DEVICES USING A COMMON CALIBRATION REFERENCE AND A CALIBRATION CIRCUIT
2
Patent #:
6878965
Issue Dt:
04/12/2005
Application #:
10675493
Filing Dt:
09/30/2003
Publication #:
US20040061111
Pub Dt:
04/01/2004
Title:
TEST STRUCTURE FOR DETERMINING A REGION OF A DEEP TRENCH OUTDIFFUSION IN A MEMORY CELL ARRAY
3
Patent #:
6998346
Issue Dt:
02/14/2006
Application #:
10675634
Filing Dt:
09/30/2003
Publication #:
US20040103960
Pub Dt:
06/03/2004
Title:
METHOD FOR THE PATTERNED, SELECTIVE METALLIZATION OF A SURFACE OF A SUBSTRATE
4
Patent #:
6891431
Issue Dt:
05/10/2005
Application #:
10675761
Filing Dt:
09/30/2003
Publication #:
US20040066209
Pub Dt:
04/08/2004
Title:
INTEGRATED SEMICONDUCTOR CIRCUIT CONFIGURATION
5
Patent #:
7124379
Issue Dt:
10/17/2006
Application #:
10675772
Filing Dt:
09/30/2003
Publication #:
US20040128643
Pub Dt:
07/01/2004
Title:
METHOD FOR COMMUNICATING A MEASURING POSITION OF A STRUCTURAL ELEMENT THAT IS TO BE FORMED ON A MASK
6
Patent #:
7162663
Issue Dt:
01/09/2007
Application #:
10676588
Filing Dt:
10/01/2003
Publication #:
US20040062102
Pub Dt:
04/01/2004
Title:
TEST SYSTEM AND METHOD FOR TESTING MEMORY CIRCUITS
7
Patent #:
7080297
Issue Dt:
07/18/2006
Application #:
10676596
Filing Dt:
10/01/2003
Publication #:
US20040064768
Pub Dt:
04/01/2004
Title:
MEMORY CIRCUIT AND METHOD FOR READING OUT DATA
8
Patent #:
7124325
Issue Dt:
10/17/2006
Application #:
10680782
Filing Dt:
10/07/2003
Publication #:
US20040066683
Pub Dt:
04/08/2004
Title:
METHOD AND APPARATUS FOR INTERNALLY TRIMMING OUTPUT DRIVERS AND TERMINATIONS IN SEMICONDUCTOR DEVICES
9
Patent #:
7071676
Issue Dt:
07/04/2006
Application #:
10681498
Filing Dt:
10/08/2003
Publication #:
US20040100246
Pub Dt:
05/27/2004
Title:
CIRCUIT CONFIGURATION AND METHOD FOR MEASURING AT LEAST ONE OPERATING PARAMETER FOR AN INTEGRATED CIRCUIT
10
Patent #:
6917563
Issue Dt:
07/12/2005
Application #:
10681503
Filing Dt:
10/08/2003
Publication #:
US20040109359
Pub Dt:
06/10/2004
Title:
INTEGRATED MEMORY
11
Patent #:
6861331
Issue Dt:
03/01/2005
Application #:
10686848
Filing Dt:
10/16/2003
Publication #:
US20040082085
Pub Dt:
04/29/2004
Title:
METHOD FOR ALIGNING AND EXPOSING A SEMICONDUCTOR WAFER
12
Patent #:
7009417
Issue Dt:
03/07/2006
Application #:
10689419
Filing Dt:
10/20/2003
Publication #:
US20040082121
Pub Dt:
04/29/2004
Title:
SEMICONDUCTOR MODULE AND METHODS FOR FUNCTIONALLY TESTING AND CONFIGURING A SEMICONDUCTOR MODULE
13
Patent #:
6949269
Issue Dt:
09/27/2005
Application #:
10690002
Filing Dt:
10/21/2003
Publication #:
US20040146655
Pub Dt:
07/29/2004
Title:
METHOD FOR PRODUCING VERTICAL PATTERNED LAYERS MADE OF SILICON DIOXIDE
14
Patent #:
7094637
Issue Dt:
08/22/2006
Application #:
10694593
Filing Dt:
10/27/2003
Publication #:
US20040121569
Pub Dt:
06/24/2004
Title:
METHOD FOR MINIMIZING THE VAPOR DEPOSITION OF TUNGSTEN OXIDE DURING THE SELECTIVE SIDE WALL OXIDATION OF TUNGSTEN-SILICON GATES
15
Patent #:
7109772
Issue Dt:
09/19/2006
Application #:
10695624
Filing Dt:
10/28/2003
Publication #:
US20040135611
Pub Dt:
07/15/2004
Title:
D-TYPE FLIPFLOP
16
Patent #:
6967133
Issue Dt:
11/22/2005
Application #:
10696159
Filing Dt:
10/29/2003
Publication #:
US20040115874
Pub Dt:
06/17/2004
Title:
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE
17
Patent #:
7049871
Issue Dt:
05/23/2006
Application #:
10699135
Filing Dt:
10/31/2003
Publication #:
US20040130370
Pub Dt:
07/08/2004
Title:
D-TYPE FLIP-FLOP WITH A REDUCED NUMBER OF TRANSISTORS
18
Patent #:
6927484
Issue Dt:
08/09/2005
Application #:
10700871
Filing Dt:
11/04/2003
Publication #:
US20040113256
Pub Dt:
06/17/2004
Title:
STACK ARRANGEMENT OF A MEMORY MODULE
19
Patent #:
7198979
Issue Dt:
04/03/2007
Application #:
10701742
Filing Dt:
11/04/2003
Publication #:
US20040126910
Pub Dt:
07/01/2004
Title:
METHOD FOR MANUFACTURING A STACK ARRANGEMENT OF A MEMORY MODULE
20
Patent #:
7157190
Issue Dt:
01/02/2007
Application #:
10703298
Filing Dt:
11/06/2003
Publication #:
US20040146787
Pub Dt:
07/29/2004
Title:
METHOD FOR REPAIRING A PHOTOLITHOGRAPHIC MASK, AND A PHOTOLITHOGRAPHIC MASK
21
Patent #:
6855565
Issue Dt:
02/15/2005
Application #:
10706970
Filing Dt:
11/14/2003
Publication #:
US20040099894
Pub Dt:
05/27/2004
Title:
SEMICONDUCTOR DEVICE HAVING FERROELECTRIC FILM AND MANUFACTURING METHOD THEREOF
22
Patent #:
6940123
Issue Dt:
09/06/2005
Application #:
10713689
Filing Dt:
11/14/2003
Publication #:
US20040099901
Pub Dt:
05/27/2004
Title:
MEMORY CELL ARRAY
23
Patent #:
7622789
Issue Dt:
11/24/2009
Application #:
10714536
Filing Dt:
11/13/2003
Publication #:
US20040209394
Pub Dt:
10/21/2004
Title:
POLYMER TRANSISTOR ARRANGEMENT, INTEGRATED CIRCUIT ARRANGEMENT AND METHOD FOR PRODUCING A POLYMER TRANSISTOR ARRANGEMENT
24
Patent #:
7035116
Issue Dt:
04/25/2006
Application #:
10715145
Filing Dt:
11/17/2003
Publication #:
US20040125635
Pub Dt:
07/01/2004
Title:
MEMORY SYSTEM AND MEMORY SUBSYSTEM
25
Patent #:
7248365
Issue Dt:
07/24/2007
Application #:
10717413
Filing Dt:
11/19/2003
Publication #:
US20040100625
Pub Dt:
05/27/2004
Title:
METHOD FOR ADJUSTING A SUBSTRATE IN AN APPLIANCE FOR CARRYING OUT EXPOSURE
26
Patent #:
6838724
Issue Dt:
01/04/2005
Application #:
10718310
Filing Dt:
11/20/2003
Publication #:
US20040104418
Pub Dt:
06/03/2004
Title:
TRANSISTOR ARRAY AND SEMICONDUCTOR MEMORY CONFIGURATION FABRICATED WITH THE TRANSISTOR ARRAY
27
Patent #:
7293190
Issue Dt:
11/06/2007
Application #:
10720437
Filing Dt:
11/24/2003
Publication #:
US20050110523
Pub Dt:
05/26/2005
Title:
NOISY CLOCK TEST METHOD AND APPARATUS
28
Patent #:
7074649
Issue Dt:
07/11/2006
Application #:
10721745
Filing Dt:
11/26/2003
Publication #:
US20050014309
Pub Dt:
01/20/2005
Title:
METHOD FOR PRODUCING AN INTEGRATED CIRCUIT WITH A REWIRING DEVICE AND CORRESPONDING INTEGRATED CIRCUIT
29
Patent #:
7009869
Issue Dt:
03/07/2006
Application #:
10723289
Filing Dt:
11/25/2003
Publication #:
US20040151020
Pub Dt:
08/05/2004
Title:
DYNAMIC MEMORY CELL
30
Patent #:
7166393
Issue Dt:
01/23/2007
Application #:
10723631
Filing Dt:
11/26/2003
Publication #:
US20040106051
Pub Dt:
06/03/2004
Title:
REFLECTION MASK FOR PROJECTING A STRUCTURE ONTO A SEMICONDUCTOR WAFER AND METHOD FOR PRODUCING THE MASK
31
Patent #:
6992475
Issue Dt:
01/31/2006
Application #:
10723905
Filing Dt:
11/26/2003
Publication #:
US20040140818
Pub Dt:
07/22/2004
Title:
CIRCUIT AND METHOD FOR DETERMINING AT LEAST ONE VOLTAGE, CURRENT AND/OR POWER VALUE FOR AN INTEGRATED CIRCUIT
32
Patent #:
7170125
Issue Dt:
01/30/2007
Application #:
10724134
Filing Dt:
12/01/2003
Publication #:
US20040152255
Pub Dt:
08/05/2004
Title:
CAPACITOR WITH ELECTRODES MADE OF RUTHENIUM AND METHOD FOR PATTERNING LAYERS MADE OF RUTHENIUM OR RUTHENIUM(IV) OXIDE
33
Patent #:
7275189
Issue Dt:
09/25/2007
Application #:
10724135
Filing Dt:
12/01/2003
Publication #:
US20040151038
Pub Dt:
08/05/2004
Title:
MEMORY MODULE AND METHOD FOR OPERATING A MEMORY MODULE IN A DATA MEMORY SYSTEM
34
Patent #:
6859406
Issue Dt:
02/22/2005
Application #:
10724906
Filing Dt:
12/01/2003
Publication #:
US20040109343
Pub Dt:
06/10/2004
Title:
DYNAMIC RAM SEMICONDUCTOR MEMORY AND METHOD FOR OPERATING THE MEMORY
35
Patent #:
6992345
Issue Dt:
01/31/2006
Application #:
10727595
Filing Dt:
12/05/2003
Publication #:
US20040136227
Pub Dt:
07/15/2004
Title:
INTEGRATED SEMICONDUCTOR MEMORY WITH A SELECTION TRANSISTOR FORMED AT A RIDGE
36
Patent #:
7057224
Issue Dt:
06/06/2006
Application #:
10731109
Filing Dt:
12/10/2003
Publication #:
US20040135190
Pub Dt:
07/15/2004
Title:
SEMICONDUCTOR MEMORY HAVING AN ARRANGEMENT OF MEMORY CELLS
37
Patent #:
7514798
Issue Dt:
04/07/2009
Application #:
10732979
Filing Dt:
12/11/2003
Publication #:
US20040135252
Pub Dt:
07/15/2004
Title:
ARRANGEMENT FOR THE PROTECTION OF THREE-DIMENSIONAL STRUCTURES ON WAFERS
38
Patent #:
6906972
Issue Dt:
06/14/2005
Application #:
10733332
Filing Dt:
12/12/2003
Publication #:
US20040170049
Pub Dt:
09/02/2004
Title:
INTEGRATED DRAM SEMICONDUCTOR MEMORY AND METHOD FOR OPERATING THE SAME
39
Patent #:
7262850
Issue Dt:
08/28/2007
Application #:
10735414
Filing Dt:
12/12/2003
Publication #:
US20040165763
Pub Dt:
08/26/2004
Title:
METHOD FOR INSPECTION OF PERIODIC GRATING STRUCTURES ON LITHOGRAPHY MASKS
40
Patent #:
7315969
Issue Dt:
01/01/2008
Application #:
10737776
Filing Dt:
12/18/2003
Publication #:
US20040145935
Pub Dt:
07/29/2004
Title:
MEMORY MODULE WITH A TEST DEVICE
41
Patent #:
7094674
Issue Dt:
08/22/2006
Application #:
10739477
Filing Dt:
12/18/2003
Publication #:
US20040142548
Pub Dt:
07/22/2004
Title:
METHOD FOR PRODUCTION OF CONTACTS ON A WAFER
42
Patent #:
6965535
Issue Dt:
11/15/2005
Application #:
10742761
Filing Dt:
12/23/2003
Publication #:
US20040184333
Pub Dt:
09/23/2004
Title:
INTEGRATED SEMICONDUCTOR MEMORY CIRCUIT AND A METHOD FOR OPERATING THE SAME
43
Patent #:
7297468
Issue Dt:
11/20/2007
Application #:
10743105
Filing Dt:
12/23/2003
Publication #:
US20040137375
Pub Dt:
07/15/2004
Title:
METHOD FOR FORMING A STRUCTURE ELEMENT ON A WAFER BY MEANS OF A MASK AND A TRIMMING MASK ASSIGNED HERETO
44
Patent #:
6930324
Issue Dt:
08/16/2005
Application #:
10748332
Filing Dt:
12/31/2003
Publication #:
US20040245569
Pub Dt:
12/09/2004
Title:
DEVICE ARCHITECTURE AND PROCESS FOR IMPROVED VERTICAL MEMORY ARRAYS
45
Patent #:
6894933
Issue Dt:
05/17/2005
Application #:
10759103
Filing Dt:
01/20/2004
Publication #:
US20040202027
Pub Dt:
10/14/2004
Title:
BUFFER AMPLIFIER ARCHITECTURE FOR SEMICONDUCTOR MEMORY CIRCUITS
46
Patent #:
6924521
Issue Dt:
08/02/2005
Application #:
10760499
Filing Dt:
01/21/2004
Publication #:
US20040206995
Pub Dt:
10/21/2004
Title:
A SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR USING A FERROELECTRIC MATERIAL
47
Patent #:
7110310
Issue Dt:
09/19/2006
Application #:
10762280
Filing Dt:
01/23/2004
Publication #:
US20040233747
Pub Dt:
11/25/2004
Title:
RAM STORE AND CONTROL METHOD THEREFOR
48
Patent #:
6930325
Issue Dt:
08/16/2005
Application #:
10766902
Filing Dt:
01/30/2004
Publication #:
US20050040398
Pub Dt:
02/24/2005
Title:
TEST STRUCTURE FOR IMPROVED VERTICAL MEMORY ARRAYS
49
Patent #:
7157194
Issue Dt:
01/02/2007
Application #:
10771302
Filing Dt:
02/05/2004
Publication #:
US20060024594
Pub Dt:
02/02/2006
Title:
METHOD FOR EXPOSING A SUBSTRATE WITH A STRUCTURE PATTERN WHICH COMPENSATES FOR THE OPTICAL PROXIMITY EFFECT
50
Patent #:
7034559
Issue Dt:
04/25/2006
Application #:
10780104
Filing Dt:
02/17/2004
Publication #:
US20040222810
Pub Dt:
11/11/2004
Title:
INTEGRATED TEST CIRCUIT IN AN INTEGRATED CIRCUIT
51
Patent #:
7078290
Issue Dt:
07/18/2006
Application #:
10798865
Filing Dt:
03/12/2004
Publication #:
US20050202634
Pub Dt:
09/15/2005
Title:
METHOD FOR FORMING A TOP OXIDE WITH NITRIDE LINER
52
Patent #:
7332430
Issue Dt:
02/19/2008
Application #:
10826601
Filing Dt:
04/16/2004
Publication #:
US20040259290
Pub Dt:
12/23/2004
Title:
METHOD FOR IMPROVING THE MECHANICAL PROPERTIES OF BOC MODULE ARRANGEMENTS
53
Patent #:
6995418
Issue Dt:
02/07/2006
Application #:
10840328
Filing Dt:
05/07/2004
Publication #:
US20050041495
Pub Dt:
02/24/2005
Title:
INTEGRATED SEMICONDUCTOR STORAGE WITH AT LEAST A STORAGE CELL AND PROCEDURE
54
Patent #:
7169647
Issue Dt:
01/30/2007
Application #:
10842259
Filing Dt:
05/07/2004
Publication #:
US20040248341
Pub Dt:
12/09/2004
Title:
CONNECTION BETWEEN A SEMICONDUCTOR CHIP AND AN EXTERNAL CONDUCTOR STRUCTURE AND METHOD FOR PRODUCING IT
55
Patent #:
6906908
Issue Dt:
06/14/2005
Application #:
10849111
Filing Dt:
05/20/2004
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
56
Patent #:
7157381
Issue Dt:
01/02/2007
Application #:
10868309
Filing Dt:
06/15/2004
Publication #:
US20050277300
Pub Dt:
12/15/2005
Title:
METHOD FOR PROVIDING WHISKER-FREE ALUMINUM METAL LINES OR ALUMINUM ALLOY LINES IN INTEGRATED CIRCUITS
57
Patent #:
7115522
Issue Dt:
10/03/2006
Application #:
10886668
Filing Dt:
07/09/2004
Publication #:
US20060009040
Pub Dt:
01/12/2006
Title:
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
58
Patent #:
7101755
Issue Dt:
09/05/2006
Application #:
10912005
Filing Dt:
08/05/2004
Publication #:
US20060030106
Pub Dt:
02/09/2006
Title:
GATE CONDUCTOR ISOLATION AND METHOD FOR MANUFACTURING SAME
59
Patent #:
7092304
Issue Dt:
08/15/2006
Application #:
10931978
Filing Dt:
09/02/2004
Publication #:
US20050276140
Pub Dt:
12/15/2005
Title:
SEMICONDUCTOR MEMORY
60
Patent #:
7479461
Issue Dt:
01/20/2009
Application #:
10943017
Filing Dt:
09/17/2004
Publication #:
US20050079714
Pub Dt:
04/14/2005
Title:
METHOD OF ETCHING SILICON ANISOTROPICALLY
61
Patent #:
7092274
Issue Dt:
08/15/2006
Application #:
10963589
Filing Dt:
10/14/2004
Publication #:
US20050047188
Pub Dt:
03/03/2005
Title:
FERROELECTRIC MEMORY DEVICE
62
Patent #:
7042037
Issue Dt:
05/09/2006
Application #:
10986060
Filing Dt:
11/12/2004
Publication #:
US20060102941
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR DEVICE
63
Patent #:
7413993
Issue Dt:
08/19/2008
Application #:
10995025
Filing Dt:
11/22/2004
Publication #:
US20060108324
Pub Dt:
05/25/2006
Title:
PROCESS FOR REMOVING A RESIDUE FROM A METAL STRUCTURE ON A SEMICONDUCTOR SUBSTRATE
64
Patent #:
7247956
Issue Dt:
07/24/2007
Application #:
11000252
Filing Dt:
11/30/2004
Publication #:
US20060113845
Pub Dt:
06/01/2006
Title:
PERFORMANCE TEST BOARD
65
Patent #:
7142473
Issue Dt:
11/28/2006
Application #:
11059569
Filing Dt:
02/17/2005
Publication #:
US20050146918
Pub Dt:
07/07/2005
Title:
SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR MEMORY WITH SENSE AMPLIFIER
66
Patent #:
7230858
Issue Dt:
06/12/2007
Application #:
11168818
Filing Dt:
06/28/2005
Publication #:
US20070011363
Pub Dt:
01/11/2007
Title:
DUAL FREQUENCY FIRST-IN-FIRST-OUT STRUCTURE
67
Patent #:
7473565
Issue Dt:
01/06/2009
Application #:
11177281
Filing Dt:
07/11/2005
Publication #:
US20050245023
Pub Dt:
11/03/2005
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
68
Patent #:
7166900
Issue Dt:
01/23/2007
Application #:
11205402
Filing Dt:
08/17/2005
Title:
SEMICONDUCTOR MEMORY DEVICE
69
Patent #:
7341950
Issue Dt:
03/11/2008
Application #:
11295726
Filing Dt:
12/07/2005
Publication #:
US20070125748
Pub Dt:
06/07/2007
Title:
METHOD FOR CONTROLLING A THICKNESS OF A FIRST LAYER AND METHOD FOR ADJUSTING THE THICKNESS OF DIFFERENT FIRST LAYERS
70
Patent #:
7372579
Issue Dt:
05/13/2008
Application #:
11407339
Filing Dt:
04/20/2006
Publication #:
US20070247634
Pub Dt:
10/25/2007
Title:
APPARATUS AND METHOD FOR MONITORING TRENCH PROFILES AND FOR SPECTROMETROLOGIC ANALYSIS
Assignor
1
INFINEON TECHNOLOGIES AG
Exec Dt:
04/25/2006
Assignee
1
QIMONDA AG
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondence name and address
JONATHAN BOCKMAN
C/O MORRISON & FOERSTER LLP
1650 TYSONS BLVD. SUITE 400
MCLEAN, VA 22102

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