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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:050937/0001   Pages: 964
Recorded: 10/09/2019
Attorney Dkt #:4816.244
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
02/15/2005
Application #:
09318159
Filing Dt:
05/25/1999
Publication #:
Pub Dt:
08/16/2001
Title:
TRENCH ISOLATION FOR SEMICONDUCTOR DEVICES
2
Patent #:
Issue Dt:
06/26/2001
Application #:
09318221
Filing Dt:
05/25/1999
Title:
USE OF AN OXIDE SURFACE TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
3
Patent #:
Issue Dt:
04/02/2002
Application #:
09318280
Filing Dt:
05/25/1999
Title:
INTERCONNECT STRUCTURE
4
Patent #:
Issue Dt:
09/10/2002
Application #:
09318287
Filing Dt:
05/25/1999
Title:
HIGH-SPEED DIGITAL DISTRIBUTION SYSTEM
5
Patent #:
Issue Dt:
02/03/2004
Application #:
09318557
Filing Dt:
05/26/1999
Publication #:
Pub Dt:
04/11/2002
Title:
PROGRAMMABLE VOLTAGE DIVIDER AND METHOD FOR TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
6
Patent #:
Issue Dt:
01/23/2001
Application #:
09318571
Filing Dt:
05/26/1999
Title:
PROGRAMMABLE VOLTAGE DIVIDER AND METHOD FOR TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
7
Patent #:
Issue Dt:
07/17/2001
Application #:
09320244
Filing Dt:
05/26/1999
Title:
PROGRAMMABLE VOLTAGE DIVIDER AND METHOD FOR TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
8
Patent #:
Issue Dt:
05/22/2001
Application #:
09320253
Filing Dt:
05/26/1999
Title:
PROGRAMMABLE VOLTAGE DIVIDER AND METHOD FOR TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
9
Patent #:
Issue Dt:
11/14/2000
Application #:
09320315
Filing Dt:
05/26/1999
Title:
HIGH STORAGE CAPACITY NON-VOLATILE MEMORY
10
Patent #:
Issue Dt:
10/31/2000
Application #:
09320381
Filing Dt:
05/26/1999
Title:
SEMICONDUCTOR PROCESSING METHODS, AND METHODS OF FORMING CAPACITOR CONSTRUCTIONS
11
Patent #:
Issue Dt:
03/20/2001
Application #:
09320404
Filing Dt:
05/26/1999
Title:
METHODS OF FORMING POLISHED MATERIAL AND METHODS OF FORMING ISOLATION REGIONS
12
Patent #:
Issue Dt:
05/25/2004
Application #:
09320421
Filing Dt:
05/26/1999
Publication #:
Pub Dt:
11/22/2001
Title:
DRAM SENSE AMPLIFIER FOR LOW VOLTAGES
13
Patent #:
Issue Dt:
11/28/2000
Application #:
09321295
Filing Dt:
05/27/1999
Title:
HIGH-SPEED TEST SYSTEM FOR A MEMORY DEVICE
14
Patent #:
Issue Dt:
06/05/2001
Application #:
09321961
Filing Dt:
05/28/1999
Title:
MONOLITHICALLY INTEGRATED SELECTOR FOR ELECTRICALLY PROGRAMMABLE MEMORY CELL DEVICES
15
Patent #:
Issue Dt:
11/25/2003
Application #:
09322152
Filing Dt:
05/28/1999
Title:
METHOD FOR DIRESCTING THE ROUTE OF A CELL TRANSMITTING A NETWORK
16
Patent #:
Issue Dt:
01/30/2001
Application #:
09322460
Filing Dt:
05/28/1999
Title:
DEVICE AND METHOD FOR READING NONVOLATILE MEMORY CELLS
17
Patent #:
Issue Dt:
05/22/2001
Application #:
09322520
Filing Dt:
05/28/1999
Title:
WAFER PROCESSING APPARATUS
18
Patent #:
Issue Dt:
09/12/2000
Application #:
09322629
Filing Dt:
05/28/1999
Title:
METHOD OF PROCESSING A WAFER UTILIZING A PROCESSING SLURRY
19
Patent #:
Issue Dt:
08/29/2000
Application #:
09322644
Filing Dt:
05/28/1999
Title:
CIRCUIT DEVICE AND CORRESPONDING METHOD FOR PROGRAMMING A NONVOLATILE MEMORY CELL HAVING A SINGLE VOLTAGE SUPPLY
20
Patent #:
Issue Dt:
05/09/2000
Application #:
09323493
Filing Dt:
06/01/1999
Title:
CIRCUIT AND METHOD FOR GATE-BODY STRUCTURES IN CMOS TECHNOLOGY
21
Patent #:
Issue Dt:
03/25/2003
Application #:
09323497
Filing Dt:
06/01/1999
Title:
PROCESS FOR FABRICATING FILMS OF UNIFORM PROPERTIES ON SEMICONDUCTOR DEVICES
22
Patent #:
Issue Dt:
04/03/2001
Application #:
09323749
Filing Dt:
06/01/1999
Title:
METHOD OF FORMING A CONDUCTIVE LINE AND METHOD OF FORMING A LOCAL INTERCONNECT
23
Patent #:
Issue Dt:
08/29/2000
Application #:
09324087
Filing Dt:
06/01/1999
Title:
LINE DECODER FOR A LOW SUPPLY VOLTAGE MEMORY DEVICE
24
Patent #:
Issue Dt:
07/09/2002
Application #:
09324397
Filing Dt:
06/03/1999
Title:
AGP CLOCK START/STOP DETECTION CIRCUIT
25
Patent #:
Issue Dt:
03/06/2001
Application #:
09324398
Filing Dt:
06/03/1999
Title:
HINGE ASSEMBLY FOR A PORTABLE COMPUTER
26
Patent #:
Issue Dt:
10/24/2000
Application #:
09324738
Filing Dt:
06/03/1999
Title:
CIRCUIT AND METHOD TO PREVENT INADVERTENT TEST MODE ENTRY
27
Patent #:
Issue Dt:
09/11/2001
Application #:
09325317
Filing Dt:
06/03/1999
Title:
SELF-ALIGNED ETCH STOP FOR POLYCRYSTALLINE SILICON PLUGS ON A SEMICONDUCTOR DEVICE
28
Patent #:
Issue Dt:
04/04/2000
Application #:
09325622
Filing Dt:
06/03/1999
Title:
COMPUTER SYSTEM HAVING RISER BOARD EXPANSION CAPABILITY
29
Patent #:
Issue Dt:
12/28/1999
Application #:
09326211
Filing Dt:
06/04/1999
Title:
PARTIAL REPLACEMENT OF PARTIALLY DEFECTIVE MEMORY DEVICES
30
Patent #:
Issue Dt:
08/28/2001
Application #:
09326429
Filing Dt:
06/04/1999
Title:
DIELECTRIC CURE FOR REDUCING OXYGEN VACANCIES
31
Patent #:
Issue Dt:
07/18/2000
Application #:
09326922
Filing Dt:
06/07/1999
Title:
AQUEOUS SOLUTIONS OF AMMONIUM FLUORIDE IN PROPYLENE GLYCOL AND THEIR USE IN THE REMOVAL OF ETCH RESIDUES FROM SILICON SUBSTRATES
32
Patent #:
Issue Dt:
10/24/2000
Application #:
09327040
Filing Dt:
06/07/1999
Title:
VOLTAGE LEVEL TRANSLATOR
33
Patent #:
Issue Dt:
08/08/2000
Application #:
09327111
Filing Dt:
06/07/1999
Title:
MEMORY BLOCK FOR REALIZING SEMICONDUCTOR MEMORY DEVICES AND CORRESPONDING MANUFACTURING PROCESS
34
Patent #:
Issue Dt:
09/17/2002
Application #:
09327278
Filing Dt:
06/03/1999
Title:
FUNCTIONAL LEVEL CONFIGURATION OF INPUT-OUTPUT TEST CIRCUITRY
35
Patent #:
Issue Dt:
02/24/2004
Application #:
09327284
Filing Dt:
06/07/1999
Title:
APPARATUS FOR MULTIPLEXING SIGNALS
36
Patent #:
Issue Dt:
01/13/2004
Application #:
09327291
Filing Dt:
06/07/1999
Title:
METHOD FOR MULTIPLEXING SIGNALS THROUGH I/O PINS
37
Patent #:
Issue Dt:
06/04/2002
Application #:
09327412
Filing Dt:
06/07/1999
Title:
METHOD FOR CONFIGURING BUS ARCHITECTURE THROUGH SOFTWARE CONTROL
38
Patent #:
Issue Dt:
07/23/2002
Application #:
09327413
Filing Dt:
06/07/1999
Title:
APPARATUS FOR CONFIGURING BUS ARCHITECTURE THROUGH SOFTWARE CONTROL
39
Patent #:
Issue Dt:
02/08/2000
Application #:
09328285
Filing Dt:
06/08/1999
Title:
VOLTAGE PUMP SWITCH
40
Patent #:
Issue Dt:
02/15/2000
Application #:
09329425
Filing Dt:
06/10/1999
Title:
CHASSIS FOR ELECTRONIC COMPONENTS
41
Patent #:
Issue Dt:
02/22/2000
Application #:
09329426
Filing Dt:
06/10/1999
Title:
CHASSIS FOR ELECTRONIC COMPONENTS
42
Patent #:
Issue Dt:
09/09/2003
Application #:
09329586
Filing Dt:
06/10/1999
Title:
HIGH DENSITY STACKABLE AND FLEXIBLE SUBSTRATE-BASED SEMICONDUCTOR DEVICE MODULES
43
Patent #:
Issue Dt:
06/26/2001
Application #:
09329965
Filing Dt:
06/10/1999
Title:
APPARATUS AND METHOD FOR POLISHING A SEMICONDUCTOR WAFER IN AN OVERHANGING POSITION
44
Patent #:
Issue Dt:
02/13/2001
Application #:
09330105
Filing Dt:
06/10/1999
Title:
PACKAGE STACK VIA BOTTOM LEADED PLASTIC (BLP) PACKAGING
45
Patent #:
Issue Dt:
09/19/2000
Application #:
09330278
Filing Dt:
06/11/1999
Title:
METHOD AND APPARATUS FOR DECREASING BLOCK WRITE OPERATION TIMES PERFORMED ON NONVOLATILE MEMORY
46
Patent #:
Issue Dt:
07/10/2001
Application #:
09330331
Filing Dt:
06/11/1999
Title:
COMPLIANT CONTACTOR FOR TESTING SEMICONDUTORS
47
Patent #:
Issue Dt:
07/03/2001
Application #:
09330540
Filing Dt:
06/11/1999
Title:
PROCESS FOR MANUFACTURING SELECTION TRANSISTORS FOR NONVOLATILE SERIAL-FLASH, EPROM, EEPROM AND FLASH-EEPROM MEMORIES IN STANDARD OR AMG CONFIGURATION
48
Patent #:
Issue Dt:
07/15/2003
Application #:
09332255
Filing Dt:
04/23/1999
Publication #:
Pub Dt:
01/23/2003
Title:
METHODS OF FORMING A TRANSISTOR GATE
49
Patent #:
Issue Dt:
03/26/2002
Application #:
09332278
Filing Dt:
06/12/1999
Title:
METHOD FOR SELECTIVELY ENCODING BUS GRANT LINES TO REDUCE I/O PIN REQUIREMENTS
50
Patent #:
Issue Dt:
03/26/2002
Application #:
09332279
Filing Dt:
06/12/1999
Title:
APPARATUS FOR SELECTIVELY ENCODING BUS GRANT LINES TO REDUCE I/O PIN REQUIREMENTS
51
Patent #:
Issue Dt:
07/11/2000
Application #:
09332488
Filing Dt:
06/14/1999
Title:
METHOD AND APPARATUS FOR PULSE PROGRAMMING
52
Patent #:
Issue Dt:
09/04/2001
Application #:
09332838
Filing Dt:
06/14/1999
Title:
TEST SYSTEM HAVING ALIGNMENT MEMBER FOR ALIGNING SEMICONDUCTOR COMPONENTS
53
Patent #:
Issue Dt:
02/15/2000
Application #:
09332854
Filing Dt:
06/14/1999
Title:
CLOSURE SYSTEM FOR DEVICES HAVING A STYLUS
54
Patent #:
Issue Dt:
05/29/2001
Application #:
09333080
Filing Dt:
06/14/1999
Title:
QUICK CHANGE PRECISOR
55
Patent #:
Issue Dt:
05/04/2004
Application #:
09333770
Filing Dt:
06/15/1999
Publication #:
Pub Dt:
07/04/2002
Title:
METHODS FOR FORMING WORDLINES, TRANSISTOR GATES, AND CONDUCTIVE INTERCONNECTS, AND WORDLINE, TRANSISTOR GATE, AND CONDUCTIVE INTERCONNECT STRUCTURES
56
Patent #:
Issue Dt:
09/05/2000
Application #:
09333814
Filing Dt:
06/15/1999
Title:
METHOD AND APPARATUS FOR ANTICIPATORY SELECTION OF EXTERNAL OR INTERNAL ADDRESSES IN A SYNCHRONOUS MEMORY DEVICE
57
Patent #:
Issue Dt:
03/28/2000
Application #:
09333818
Filing Dt:
06/15/1999
Title:
CIRCUIT AND METHOD FOR PROVIDING A SUBSTANTIALLY CONSTANT TIME DELAY OVER A RANGE OF SUPPLY VOLTAGES
58
Patent #:
Issue Dt:
03/13/2001
Application #:
09333999
Filing Dt:
06/15/1999
Title:
METHOD AND APPARATUS FOR TESTING CELLS IN A MEMORY DEVICE WITH COMPRESSED DATA AND FOR REPLACING DEFECTIVE CELLS
59
Patent #:
Issue Dt:
08/14/2001
Application #:
09334153
Filing Dt:
06/16/1999
Title:
PRECURSOR MIXTURES FOR USE IN PREPARING LAYERS ON SUBSTRATES
60
Patent #:
Issue Dt:
04/17/2001
Application #:
09334417
Filing Dt:
06/16/1999
Title:
CAPACITOR AND METHOD FOR FORMING THE SAME
61
Patent #:
Issue Dt:
07/23/2002
Application #:
09334753
Filing Dt:
06/16/1999
Title:
REMOVAL OF METAL CUSP FOR IMPROVED CONTACT FILL
62
Patent #:
Issue Dt:
08/13/2002
Application #:
09335024
Filing Dt:
06/17/1999
Title:
COMMUNICATIONS SYSTEM AND METHOD FOR REDUCING THE EFFECTS OF TRANSMITTER NON-LINEAR DISTORTION ON A RECEIVED SIGNAL
63
Patent #:
Issue Dt:
10/30/2001
Application #:
09335195
Filing Dt:
06/17/1999
Title:
RELAXED WRITE TIMING FOR A MEMORY DEVICE
64
Patent #:
Issue Dt:
10/29/2002
Application #:
09335855
Filing Dt:
06/17/1999
Title:
LEAD FRAME DECOUPLING CAPACITOR, SEMICONDUCTOR DEVICE PACKAGES INCLUDING THE SAME AND METHODS
65
Patent #:
Issue Dt:
04/17/2001
Application #:
09336089
Filing Dt:
06/18/1999
Title:
PROCESS FOR FABRICATING A SEMICONDUCTOR NON-VOLATILE MEMORY DEVICE WITH SHALLOW TRENCH ISOLATION (STI)
66
Patent #:
Issue Dt:
07/18/2000
Application #:
09336391
Filing Dt:
06/18/1999
Title:
METHOD AND APPARATUS FOR COUPLING DATA FROM A MEMORY DEVICE USING A SINGLE ENDED READ DATA PATH
67
Patent #:
Issue Dt:
03/06/2001
Application #:
09336759
Filing Dt:
06/21/1999
Title:
POLISHING APPARATUS
68
Patent #:
Issue Dt:
11/14/2000
Application #:
09336919
Filing Dt:
06/21/1999
Title:
PACKAGE STACK VIA BOTTOM LEADED PLASTIC (BLP) PACKAGING
69
Patent #:
Issue Dt:
04/10/2001
Application #:
09336925
Filing Dt:
06/21/1999
Title:
PACKAGE STACK VIA BOTTOM LEADED PLASTIC (BLP) PACKAGING
70
Patent #:
Issue Dt:
08/05/2003
Application #:
09337025
Filing Dt:
06/25/1999
Title:
APPLICATION PROGRAMMING INTERFACES AND METHODS ENABLING A HOST TO INTERFACE WITH A NETWORK PROCESSOR
71
Patent #:
Issue Dt:
01/30/2001
Application #:
09337051
Filing Dt:
06/21/1999
Title:
PROCESS FOR MANUFACTURING OF A NON VOLATILE MEMORY WITH REDUCED RESISTANCE OF THE COMMON SOURCE LINES
72
Patent #:
Issue Dt:
12/26/2000
Application #:
09337628
Filing Dt:
06/21/1999
Title:
PACKAGE STACK VIA BOTTOM LEADED PLASTIC (BLP) PACKAGING
73
Patent #:
Issue Dt:
09/18/2001
Application #:
09337782
Filing Dt:
06/22/1999
Title:
BONDHEAD LEAD CLAMP APPARATUS AND METHOD
74
Patent #:
Issue Dt:
12/26/2000
Application #:
09337783
Filing Dt:
06/22/1999
Title:
THIN FILM CAPACITOR COUPONS FOR MEMORY MODULES AND MULTI-CHIP MODULES
75
Patent #:
Issue Dt:
12/12/2000
Application #:
09338211
Filing Dt:
06/22/1999
Title:
TITANIUM NITRIDE INTERCONNECTS
76
Patent #:
Issue Dt:
08/29/2000
Application #:
09338242
Filing Dt:
06/22/1999
Title:
CIRCUIT AND METHOD FOR HEATING AN ADHESIVE TO PACKAGE OR REWORK A SEMICONDUCTOR DIE
77
Patent #:
Issue Dt:
08/15/2000
Application #:
09338257
Filing Dt:
06/22/1999
Title:
METHOD AND APPARATUS FOR GENERATING MEMORY ADDRESSES FOR TESTING MEMORY DEVICES
78
Patent #:
Issue Dt:
10/31/2000
Application #:
09339284
Filing Dt:
06/23/1999
Title:
MULTI-PART LEAD FRAME WITH DISSIMILAR MATERIALS AND METHOD OF MANUFACTURING
79
Patent #:
Issue Dt:
07/16/2002
Application #:
09339735
Filing Dt:
06/24/1999
Publication #:
Pub Dt:
12/06/2001
Title:
FIXED ABRASIVE CHEMICAL-MECHANICAL PLANARIZATION OF TITANIUM NITRIDE
80
Patent #:
Issue Dt:
09/23/2003
Application #:
09340068
Filing Dt:
06/25/1999
Publication #:
Pub Dt:
03/27/2003
Title:
SYSTEM FOR MULTI-LAYER BROADBAND PROVISIONING IN COMPUTER NETWORKS
81
Patent #:
Issue Dt:
01/30/2001
Application #:
09340417
Filing Dt:
06/28/1999
Title:
FLIP-FLOP CIRCUIT
82
Patent #:
Issue Dt:
09/24/2002
Application #:
09340669
Filing Dt:
06/29/1999
Publication #:
Pub Dt:
12/13/2001
Title:
ACID BLEND FOR REMOVING ETCH RESIDUE
83
Patent #:
Issue Dt:
07/15/2003
Application #:
09340722
Filing Dt:
06/29/1999
Title:
INFRARED CORDLESS MOUSE WITH MOUSE PAD/RECEIVER
84
Patent #:
Issue Dt:
04/10/2001
Application #:
09342229
Filing Dt:
06/29/1999
Title:
METHOD TO ELIMINATE SIDE LOBE PRINTING OF ATTENUATED PHASE SHIFT MASKS
85
Patent #:
Issue Dt:
05/13/2003
Application #:
09342243
Filing Dt:
06/29/1999
Title:
ACID BLEND FOR REMOVING ETCH RESIDUE
86
Patent #:
Issue Dt:
04/22/2003
Application #:
09342478
Filing Dt:
06/29/1999
Title:
REDUNDANT PINOUT CONFIGURATION FOR SIGNAL ENHANCEMENT IN IC PACKAGES
87
Patent #:
Issue Dt:
10/21/2003
Application #:
09342677
Filing Dt:
06/29/1999
Title:
ETCHING METHODS AND APPARATUS AND SUBSTRATE ASSEMBLIES PRODUCED THEREWITH
88
Patent #:
Issue Dt:
12/26/2000
Application #:
09342788
Filing Dt:
06/29/1999
Title:
CHIP SCALE PACKAGE WITH HEAT SPREADER AND METHOD OF MANUFACTURE
89
Patent #:
Issue Dt:
06/19/2007
Application #:
09342789
Filing Dt:
06/29/1999
Title:
CHIP SCALE PACKAGE WITH HEAT SPREADER
90
Patent #:
Issue Dt:
07/25/2000
Application #:
09343121
Filing Dt:
06/29/1999
Title:
SYNCHRONOUS SRAM HAVING PIPELINED ENABLE
91
Patent #:
Issue Dt:
05/15/2001
Application #:
09343207
Filing Dt:
06/29/1999
Title:
METHOD OF MEASURING THE THICKNESS OF A LAYER OF SILICON DAMAGED BY PLASMA ETCHING
92
Patent #:
Issue Dt:
07/02/2002
Application #:
09343746
Filing Dt:
06/30/1999
Title:
MODULE ASSEMBLY FOR STACKED BGA PACKAGES WITHA COMMON BUS BAR IN THE ASSEMBLY
93
Patent #:
Issue Dt:
10/02/2001
Application #:
09344279
Filing Dt:
06/30/1999
Title:
STACKABLE CERAMIC FBGA FOR HIGH THERMAL APPLICATIONS
94
Patent #:
Issue Dt:
10/02/2001
Application #:
09344284
Filing Dt:
06/30/1999
Title:
HEAT SINK WITH ALIGNMENT AND RETAINING FEATURES
95
Patent #:
Issue Dt:
01/09/2001
Application #:
09344425
Filing Dt:
06/25/1999
Title:
METHOD FOR FAST PROGRAMMING FLOATING GATE MEMORIES BY TUNNEL EFFECT
96
Patent #:
Issue Dt:
08/21/2001
Application #:
09344426
Filing Dt:
06/25/1999
Title:
PROCESS FOR THE MANUFACTURE OF INTEGRATED DEVICES WITH GATE OXIDE PROTECTION FROM MANUFACTURING PROCESS DAMAGE, AND PROTECTION STRUCTURE THEREFOR
97
Patent #:
Issue Dt:
06/27/2000
Application #:
09344435
Filing Dt:
06/25/1999
Title:
METHOD FOR CLEANING WASTE MATTER FROM THE BACKSIDE OF A SEMICONDUCTOR WAFER SUBSTRATE
98
Patent #:
Issue Dt:
08/05/2003
Application #:
09344672
Filing Dt:
06/25/1999
Title:
MULTI-PROTOCOL CONVERSION ASSISTANCE METHOD AND SYSTEM FOR A NETWORK ACCELERATOR
99
Patent #:
Issue Dt:
04/03/2001
Application #:
09344678
Filing Dt:
06/25/1999
Title:
LASER WIRE BONDING FOR WIRE EMBEDDED DIELECTRICS TO INTEGRATED CIRCUITS
100
Patent #:
Issue Dt:
12/31/2002
Application #:
09344820
Filing Dt:
06/25/1999
Title:
CBR/VBR TRAFFIC SCHEDULER
Assignor
1
Exec Dt:
07/31/2019
Assignee
1
8000 S FEDERAL WAY
BOISE, IDAHO 83707
Correspondence name and address
WSGR, C/O QUI LU FLOOD, SENIOR PARALEGAL
ONE MARKET, SPEAR TOWER, SUITE 3300
SAN FRANCISCO, CA 94105

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