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09/07/2010
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11/06/2008
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01/26/2010
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11/06/2008
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08/24/2010
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10/11/2007
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SEMICONDUCTOR DEVICE STRUCTURE
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03/16/2010
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05/04/2007
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11/06/2008
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12/28/2010
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11/06/2008
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04/24/2012
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05/08/2007
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11/13/2008
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09/14/2010
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05/09/2007
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11/13/2008
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11/11/2008
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05/09/2007
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11/13/2008
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03/09/2010
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11746792
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05/10/2007
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11/13/2008
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09/09/2014
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11746998
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05/10/2007
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11/13/2008
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THREAD DE-EMPHASIS INSTRUCTION FOR MULTITHREADED PROCESSOR
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04/10/2012
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05/10/2007
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11/13/2008
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METHOD AND SYSTEM FOR CONTROLLING TRANSMISSION AND EXECUTION OF COMMANDS IN AN INTEGRATED CIRCUIT DEVICE
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09/21/2010
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05/11/2007
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11/13/2008
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04/14/2009
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11747414
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05/11/2007
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11/13/2008
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BOOTSTRAP CLAMPING CIRCUIT FOR DC/DC REGULATORS AND METHOD THEREOF
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10/07/2008
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11748150
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05/14/2007
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METHOD FOR IMPROVING CURRENT DISTRIBUTION OF A TRANSPARENT ELECTRODE
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01/13/2009
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11749147
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05/15/2007
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11/20/2008
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METHOD AND CIRCUIT FOR DRIVING H-BRIDGE THAT REDUCES SWITCHING NOISE
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12/01/2009
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11750048
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05/17/2007
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09/13/2007
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METHOD AND APPARATUS FOR PROVIDING STRUCTURAL SUPPORT FOR INTERCONNECT PAD WHILE ALLOWING SIGNAL CONDUCTANCE
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03/16/2010
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11750739
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05/18/2007
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11/20/2008
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09/14/2010
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05/22/2007
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11/27/2008
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RADIO RECEIVER HAVING A CHANNEL EQUALIZER AND METHOD THEREFOR
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02/10/2009
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05/22/2007
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11/27/2008
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BITCELL WITH VARIABLE-CONDUCTANCE TRANSFER GATE AND METHOD THEREOF
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06/08/2010
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05/23/2007
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11/27/2008
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HIGH VOLTAGE DEEP TRENCH CAPACITOR
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09/07/2010
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11752938
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05/24/2007
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11/27/2008
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METHOD AND SYSTEM FOR SIMULTANEOUS READS OF MULTIPLE ARRAYS
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08/30/2011
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05/24/2007
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TESTER AND A METHOD FOR TESTING AN INTEGRATED CIRCUIT
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08/25/2009
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11753749
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05/25/2007
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11/27/2008
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ANTENNA STRUCTURE FOR INTEGRATED CIRCUIT DIE USING BOND WIRE
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05/18/2010
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11754728
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05/29/2007
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09/20/2007
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03/09/2010
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11755448
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05/30/2007
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12/04/2008
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INTEGRATED CIRCUIT WITH CONTINUOUS TESTING OF REPETITIVE FUNCTIONAL BLOCKS
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11/29/2011
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05/31/2007
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12/04/2008
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06/15/2010
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05/31/2007
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12/04/2008
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08/25/2009
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11756187
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05/31/2007
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12/04/2008
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METHOD FOR GENERATION, PLACEMENT, AND ROUTING OF TEST STRUCTURES IN TEST CHIPS
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06/02/2009
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05/31/2007
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12/04/2008
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12/07/2010
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05/31/2007
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12/04/2008
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MULTIPLE MILLISECOND ANNEALS FOR SEMICONDUCTOR DEVICE FABRICATION
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06/14/2011
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05/31/2007
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12/04/2008
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08/11/2009
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06/06/2007
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12/11/2008
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ONE TIME PROGRAMMABLE ELEMENT SYSTEM IN AN INTEGRATED CIRCUIT
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10/06/2009
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11759463
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06/07/2007
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12/11/2008
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04/27/2010
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06/07/2007
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12/11/2008
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SPLIT GATE MEMORY CELL USING SIDEWALL SPACERS
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05/05/2009
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11759593
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06/07/2007
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12/11/2008
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SELF-ALIGNED SPLIT GATE MEMORY CELL AND METHOD OF FORMING
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12/03/2013
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06/07/2007
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12/13/2007
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PROPAGATING SESSION STATE CHANGES TO NETWORK FUNCTIONS IN AN ACTIVE SET
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03/24/2009
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06/08/2007
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12/11/2008
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METHOD AND CIRCUIT FOR REDUCING REGULATOR OUTPUT NOISE
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03/24/2009
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11760775
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06/10/2007
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12/27/2007
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RF POWER TRANSISTOR DEVICE WITH HIGH PERFORMANCE SHUNT CAPACITOR AND METHOD THEREOF
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03/29/2011
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06/14/2007
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12/18/2008
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OPTIMIZATION OF STORAGE DEVICE ACCESSES IN RAID SYSTEMS
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01/15/2013
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06/15/2007
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12/18/2008
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TRANSMISSION OF PACKET DATA
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05/25/2010
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11764810
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06/19/2007
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12/25/2008
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RECORDING DEVICE CAPABLE OF DETERMINING THE MEDIA TYPE BASED ON DETECTING THE CAPACITANCE OF PAIR ELECTRODES.
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01/19/2010
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11765170
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06/19/2007
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12/25/2008
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METHODS AND APPARATUS FOR EMI SHIELDING IN MULTI-CHIP MODULES
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11/09/2010
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11765891
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06/20/2007
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12/25/2008
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EXCEPTION-BASED TIMER CONTROL
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10/16/2012
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06/22/2007
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12/25/2008
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PULSED STATE RETENTION POWER GATING FLIP-FLOP
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08/10/2010
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11769376
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06/27/2007
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10/25/2007
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DISCRETE MULTI-TONE (DMT) SYSTEM AND METHOD THAT COMMUNICATES A DATA PUMP DATA STREAM BETWEEN A GENERAL PURPOSE CPU AND A DSP VIA A BUFFERING SCHEME
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01/10/2012
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11770295
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06/28/2007
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01/01/2009
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PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A PLURALITY OF SINGULATED DIE
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11/04/2008
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11771690
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06/29/2007
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METHOD FOR FORMING A DUAL METAL GATE STRUCTURE
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02/23/2010
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11771721
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06/29/2007
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01/01/2009
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METHOD FOR FORMING A DUAL METAL GATE STRUCTURE
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08/18/2015
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11772655
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07/02/2007
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02/04/2010
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Asymmetric Cryptographic Device With Local Private Key Generation and Method Therefor
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02/21/2012
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11774690
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07/09/2007
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01/10/2008
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IMAGE DATA UP SAMPLING
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11/24/2009
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11775228
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07/10/2007
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01/10/2008
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METHOD AND DEVICE FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
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10/28/2008
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11775230
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07/10/2007
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01/10/2008
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OSCILLATOR CIRCUIT WITH A VOLTAGE RESTRICTION BLOCK
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08/11/2009
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11775231
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07/10/2007
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02/28/2008
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SERIES REGULATOR CIRCUIT
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04/21/2009
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11775853
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07/10/2007
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01/15/2009
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OUTPUT CORRECTION CIRCUIT FOR THREE-AXIS ACCELEROMETER
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11/10/2009
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11777635
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07/13/2007
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01/15/2009
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DYNAMIC VOLTAGE ADJUSTMENT FOR MEMORY
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04/26/2011
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11777650
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07/13/2007
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01/15/2009
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CIRCUIT AND METHOD FOR CORRELATED INPUTS TO A POPULATION COUNT CIRCUIT
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06/07/2011
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11777664
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07/13/2007
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01/15/2009
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Title:
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POPULATION COUNT APPROXIMATION CIRCUIT AND METHOD THEREOF
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03/30/2010
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11779318
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07/18/2007
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01/22/2009
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TRANSISTOR WITH DIFFERENTLY DOPED STRAINED CURRENT ELECTRODE REGION
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09/06/2011
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11779499
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07/18/2007
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01/22/2009
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APPARATUS AND METHOD FOR DECODING BURSTS OF CODED INFORMATION
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06/02/2009
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Application #:
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11780251
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Filing Dt:
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07/19/2007
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Publication #:
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Pub Dt:
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01/22/2009
| | | | |
Title:
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PROGRAMMABLE BIAS FOR A MEMORY ARRAY
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Patent #:
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Issue Dt:
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06/23/2015
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Application #:
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11780900
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Filing Dt:
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07/20/2007
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Publication #:
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Pub Dt:
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01/22/2009
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Title:
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ELECTRONIC DEVICE INCLUDING A CAPACITOR AND A PROCESS OF FORMING THE SAME
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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11781097
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Filing Dt:
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07/20/2007
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Publication #:
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Pub Dt:
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01/22/2009
| | | | |
Title:
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SYSTEMS AND METHODS FOR EFFICIENT GENERATION OF HASH VALUES OF VARYING BIT WIDTHS
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Patent #:
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Issue Dt:
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11/16/2010
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Application #:
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11781610
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Filing Dt:
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07/23/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
Title:
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SOURCE/DRAIN STRESSORS FORMED USING IN-SITU EPITAXIAL GROWTH
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Patent #:
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Issue Dt:
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03/22/2011
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Application #:
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11782319
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Filing Dt:
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07/24/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
Title:
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PROCESS FOR MAKING A SEMICONDUCTOR DEVICE USING PARTIAL ETCHING
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Patent #:
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Issue Dt:
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02/14/2012
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Application #:
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11782992
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Filing Dt:
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07/25/2007
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Publication #:
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Pub Dt:
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01/29/2009
| | | | |
Title:
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DYNAMIC FREQUENCY SELECTION IN WIRELESS DEVICES
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11784561
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Filing Dt:
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04/05/2007
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Title:
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METHODOLOGY TO REDUCE SOI FLOATING-BODY EFFECT
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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11785610
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Filing Dt:
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04/19/2007
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Publication #:
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Pub Dt:
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10/23/2008
| | | | |
Title:
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SYSTEM AND METHOD FOR OPERATING A COMMUNICATIONS SYSTEM
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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11788184
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Filing Dt:
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04/18/2007
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Publication #:
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Pub Dt:
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10/23/2008
| | | | |
Title:
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SHALLOW TRENCH ISOLATION FOR SOI STRUCTURES COMBINING SIDEWALL SPACER AND BOTTOM LINER
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11788216
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Filing Dt:
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04/18/2007
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Publication #:
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Pub Dt:
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10/23/2008
| | | | |
Title:
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METHOD TO SELECTIVELY MODULATE GATE WORK FUNCTION THROUGH SELECTIVE GE CONDENSATION AND HIGH-K DIELECTRIC LAYER
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Patent #:
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Issue Dt:
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09/30/2008
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Application #:
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11791370
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Filing Dt:
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05/23/2007
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Publication #:
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Pub Dt:
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02/21/2008
| | | | |
Title:
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PROTECTIVE DEVICE FOR A LAMP
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Patent #:
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Issue Dt:
|
09/04/2012
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Application #:
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11800204
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Filing Dt:
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05/04/2007
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Publication #:
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Pub Dt:
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11/06/2008
| | | | |
Title:
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METHOD TO IMPROVE SOURCE/DRAIN PARASITICS IN VERTICAL DEVICES
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Patent #:
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Issue Dt:
|
11/03/2009
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Application #:
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11803097
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Filing Dt:
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05/11/2007
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Publication #:
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Pub Dt:
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11/13/2008
| | | | |
Title:
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METHOD TO CONTROL UNIFORMITY/COMPOSITION OF METAL ELECTRODES, SILICIDES ON TOPOGRAPHY AND DEVICES USING THIS METHOD
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Patent #:
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Issue Dt:
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04/26/2011
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Application #:
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11807745
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Filing Dt:
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05/29/2007
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Publication #:
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Pub Dt:
|
12/04/2008
| | | | |
Title:
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METHOD TO FORM A VIA
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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11807777
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Filing Dt:
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05/29/2007
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
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METHOD FOR FORMING INTERCONNECTS FOR 3-D APPLICATIONS
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Patent #:
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Issue Dt:
|
05/18/2010
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Application #:
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11811407
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Filing Dt:
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06/11/2007
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Publication #:
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Pub Dt:
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04/17/2008
| | | | |
Title:
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SYSTEM AND METHOD FOR ELECTROMIGRATION TOLERANT CELL SYNTHESIS
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Patent #:
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Issue Dt:
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02/24/2009
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Application #:
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11811547
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Filing Dt:
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06/11/2007
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Publication #:
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Pub Dt:
|
12/11/2008
| | | | |
Title:
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CURRENT-MODE MEMORY CELL
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Patent #:
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Issue Dt:
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08/16/2011
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Application #:
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11815177
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Filing Dt:
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04/03/2008
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Publication #:
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Pub Dt:
|
10/30/2008
| | | | |
Title:
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AUDIO COMMUNICATION UNIT AND INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
11/17/2009
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Application #:
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11815189
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
06/12/2008
| | | | |
Title:
|
NON-HIGH IMPEDENCE DEVICE AND METHOD FOR REDUCING ENERGY CONSUMPTION
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Patent #:
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Issue Dt:
|
12/06/2011
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Application #:
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11815190
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Filing Dt:
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05/12/2008
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Publication #:
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Pub Dt:
|
11/13/2008
| | | | |
Title:
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METHOD OF COATING A SURFACE WITH NANOPARTICLES
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Patent #:
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Issue Dt:
|
09/07/2010
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Application #:
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11816018
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Filing Dt:
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08/10/2007
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Publication #:
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Pub Dt:
|
03/19/2009
| | | | |
Title:
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REMOTE INFORMING SYSTEM FOR ELEVATOR
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Patent #:
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Issue Dt:
|
08/21/2012
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Application #:
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11816037
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Filing Dt:
|
04/03/2008
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Publication #:
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Pub Dt:
|
01/29/2009
| | | | |
Title:
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DEVICE HAVING FAILURE RECOVERY CAPABILITIES AND A METHOD FOR FAILURE RECOVERY
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|
Patent #:
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Issue Dt:
|
09/13/2011
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Application #:
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11816040
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Filing Dt:
|
08/10/2007
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Publication #:
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Pub Dt:
|
04/24/2008
| | | | |
Title:
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CONTROL APPARATUS AND METHOD OF REGULATING POWER
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Patent #:
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Issue Dt:
|
08/25/2009
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Application #:
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11825953
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Filing Dt:
|
07/10/2007
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Publication #:
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Pub Dt:
|
01/15/2009
| | | | |
Title:
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DISPOSABLE ORGANIC SPACERS
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Patent #:
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Issue Dt:
|
04/13/2010
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Application #:
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11828023
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Filing Dt:
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07/25/2007
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Publication #:
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Pub Dt:
|
01/29/2009
| | | | |
Title:
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TECHNIQUES FOR DETECTING OPEN INTEGRATED CIRCUIT PINS
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Patent #:
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Issue Dt:
|
11/03/2009
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Application #:
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11829153
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Filing Dt:
|
07/27/2007
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Publication #:
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Pub Dt:
|
01/29/2009
| | | | |
Title:
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SPEEDPATH REPAIR IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
04/19/2011
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Application #:
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11829156
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Filing Dt:
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07/27/2007
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Publication #:
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Pub Dt:
|
01/29/2009
| | | | |
Title:
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METHOD FOR FORMING A TRANSISTOR HAVING GATE DIELECTRIC PROTECTION AND STRUCTURE
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Patent #:
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Issue Dt:
|
10/21/2008
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Application #:
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11830577
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Filing Dt:
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07/30/2007
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Publication #:
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Pub Dt:
|
02/14/2008
| | | | |
Title:
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METHOD FOR MANUFACTURING A PASSIVE INTEGRATED MATCHING NETWORK FOR POWER AMPLIFIERS
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Patent #:
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Issue Dt:
|
09/21/2010
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Application #:
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11831394
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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MOSFET DEVICE FEATURING A SUPERLATTICE BARRIER LAYER AND METHOD
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Patent #:
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Issue Dt:
|
05/14/2013
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Application #:
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11831400
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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ISOLATION TRENCH PROCESSING FOR STRAIN CONTROL
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Patent #:
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Issue Dt:
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07/10/2012
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Application #:
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11831651
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Filing Dt:
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07/31/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE
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Patent #:
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Issue Dt:
|
11/02/2010
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Application #:
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11832797
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Filing Dt:
|
08/02/2007
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Publication #:
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Pub Dt:
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02/05/2009
| | | | |
Title:
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CACHE LOCKING DEVICE AND METHODS THEREOF
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Patent #:
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Issue Dt:
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04/17/2012
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Application #:
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11833360
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Filing Dt:
|
08/03/2007
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Publication #:
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Pub Dt:
|
02/14/2008
| | | | |
Title:
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MULTI-MODE TRANSCEIVER HAVING TUNABLE HARMONIC TERMINATION CIRCUIT AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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08/25/2009
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Application #:
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11833476
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Filing Dt:
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08/03/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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SYMMETRICAL DIFFERENTIAL CAPACITIVE SENSOR AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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05/25/2010
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Application #:
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11833545
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Filing Dt:
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08/03/2007
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Publication #:
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Pub Dt:
|
02/05/2009
| | | | |
Title:
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METHOD AND CIRCUIT FOR PREVENTING HIGH VOLTAGE MEMORY DISTURB
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Patent #:
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Issue Dt:
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12/30/2008
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Application #:
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11834391
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Filing Dt:
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08/06/2007
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Publication #:
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Pub Dt:
|
01/24/2008
| | | | |
Title:
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ELECTRONIC DEVICE INCLUDING A MEMORY ARRAY AND CONDUCTIVE LINES
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11835547
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Filing Dt:
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08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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METHOD FOR MAKING A TRANSISTOR WITH A STRESSOR
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Patent #:
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Issue Dt:
|
10/12/2010
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Application #:
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11835548
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Filing Dt:
|
08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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FINFET MEMORY CELL HAVING A FLOATING GATE AND METHOD THEREFOR
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Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11835552
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Filing Dt:
|
08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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LEVEL SHIFTER
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|
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Patent #:
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Issue Dt:
|
07/14/2009
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Application #:
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11835643
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Filing Dt:
|
08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A DOPED SEMICONDUCTOR LAYER
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|
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Patent #:
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Issue Dt:
|
06/14/2011
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Application #:
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11835680
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Filing Dt:
|
08/08/2007
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Publication #:
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Pub Dt:
|
02/12/2009
| | | | |
Title:
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STRESS RELIEF OF A SEMICONDUCTOR DEVICE
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|