|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
11380688
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
HIGH PERFORMANCE STRESS-ENHANCE MOSFET AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
11380689
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
HIGH PERFORMANCE STRESS-ENHANCE MOSFET AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
11380692
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
HIGH PERFORMANCE 3D FET STRUCTURES, AND METHODS FOR FORMING THE SAME USING PREFERENTIAL CRYSTALLOGRAPHIC ETCHING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11380693
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
A TRENCH CAPACITOR AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
11380736
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
MONITORING IONIZING RADIATION IN SILICON-ON INSULATOR INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2007
|
Application #:
|
11380799
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR IMPLEMENTING OXIDE LEAKAGE BASED VOLTAGE DIVIDER NETWORK FOR INTEGRATED CIRCUIT DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11381219
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
METHODS OF FORMING CONTACT OPENINGS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11381239
|
Filing Dt:
|
05/02/2006
|
Title:
|
METHODS OF DETERMINING CHARACTERISTICS OF DOPED REGIONS ON DEVICE WAFERS, AND SYSTEM FOR ACCOMPLISHING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2011
|
Application #:
|
11381373
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
OPTIMIZING THERMAL PERFORMANCE USING THERMAL FLOW ANALYSIS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/29/2009
|
Application #:
|
11381391
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
SELECTION OF PROCESSOR CORES FOR OPTIMAL THERMAL PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/08/2009
|
Application #:
|
11382135
|
Filing Dt:
|
05/08/2006
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
TECHNIQUE FOR EFFICIENTLY PATTERNING AN UNDERBUMP METALLIZATION LAYER USING A DRY ETCH PROCESS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/01/2010
|
Application #:
|
11382544
|
Filing Dt:
|
05/10/2006
|
Publication #:
|
|
Pub Dt:
|
11/15/2007
| | | | |
Title:
|
METHOD AND STRUCTURE FOR CREATION OF A METAL INSULATOR METAL CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
11383005
|
Filing Dt:
|
05/12/2006
|
Publication #:
|
|
Pub Dt:
|
02/01/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR ESTIMATING A STATE OF AN UNINITIALIZED ADVANCED PROCESS CONTROLLER BY USING SEGREGATED CONTROLLER DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
11383295
|
Filing Dt:
|
05/15/2006
|
Title:
|
DIODE WITH ASYMMETRIC SILICON GERMANIUM ANODE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11383353
|
Filing Dt:
|
05/15/2006
|
Publication #:
|
|
Pub Dt:
|
08/31/2006
| | | | |
Title:
|
METHOD AND SYSTEM FOR EVALUATING TIMING IN AN INTEGATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2009
|
Application #:
|
11383544
|
Filing Dt:
|
05/16/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
BUFFER INSERTION TO REDUCE WIRELENGTH IN VLSI CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2007
|
Application #:
|
11383563
|
Filing Dt:
|
05/16/2006
|
Title:
|
DUAL WIRED INTEGRATED CIRCUIT CHIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2010
|
Application #:
|
11383586
|
Filing Dt:
|
05/16/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
DOUBLE-SIDED INTEGRATED CIRCUIT CHIPS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11383595
|
Filing Dt:
|
05/16/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
DUAL-SIDED CHIP ATTACHED MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11383770
|
Filing Dt:
|
05/17/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
TRACE EQUIVALENCE IDENTIFICATION THROUGH STRUCTURAL ISOMORPHISM DETECTION WITH ON THE FLY LOGIC WRITING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
11383821
|
Filing Dt:
|
05/17/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
SIGNAL DETECTOR WITH CALIBRATION CIRCUIT ARRANGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
11385121
|
Filing Dt:
|
03/21/2006
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
METHOD FOR PRECISION ASSEMBLY OF INTEGRATED CIRCUIT CHIP PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2010
|
Application #:
|
11385329
|
Filing Dt:
|
03/21/2006
|
Title:
|
INCREMENTALLY ADJUSTABLE SKEW AND DUTY CYCLE CORRECTION FOR CLOCK SIGNALS WITHIN A CLOCK DISTRIBUTION NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/2010
|
Application #:
|
11387873
|
Filing Dt:
|
03/24/2006
|
Publication #:
|
|
Pub Dt:
|
04/29/2010
| | | | |
Title:
|
HEATER AND MEMORY CELL, MEMORY DEVICE AND RECORDING HEAD INCLUDING THE HEATER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
11389344
|
Filing Dt:
|
03/24/2006
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
RESOURCE ADAPTIVE SPECTRUM ESTIMATION OF STREAMING DATA
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11390390
|
Filing Dt:
|
03/27/2006
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
DIELECTRIC INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11390510
|
Filing Dt:
|
03/27/2006
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
FLEXIBLE CAPACITIVE COUPLER ASSEMBLY AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2010
|
Application #:
|
11390527
|
Filing Dt:
|
03/27/2006
|
Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
COMPUTER-IMPLEMENTED METHOD, SYSTEM AND PROGRAM PRODUCT FOR APPROXIMATING RESOURCE CONSUMPTION OF COMPUTER SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
11390533
|
Filing Dt:
|
03/28/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR RECOGNITION AND TAGGING OF MULTIPLE LAYERED ENTROPY CODING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11392071
|
Filing Dt:
|
03/29/2006
|
Publication #:
|
|
Pub Dt:
|
10/11/2007
| | | | |
Title:
|
ASYMMETRICAL MEMORY CELLS AND MEMORIES USING THE CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/09/2009
|
Application #:
|
11393270
|
Filing Dt:
|
03/30/2006
|
Publication #:
|
|
Pub Dt:
|
10/11/2007
| | | | |
Title:
|
PROGRAMMABLE VIA STRUCTURE FOR THREE DIMENSIONAL INTEGRATION TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
11395098
|
Filing Dt:
|
03/31/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
APPARATUS AND METHODS FOR CONSTRUCTING AND PACKAGING WAVEGUIDE TO PLANAR TRANSMISSION LINE TRANSITIONS FOR MILLIMETER WAVE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/06/2009
|
Application #:
|
11395355
|
Filing Dt:
|
03/31/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
SPACE TRANSFORMING LAND GRID ARRAY INTERPOSERS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
11395857
|
Filing Dt:
|
03/31/2006
|
Publication #:
|
|
Pub Dt:
|
10/04/2007
| | | | |
Title:
|
HEAT TRANSFER CONTROL STRUCTURES USING THERMAL PHONON SPECTRAL OVERLAP
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2008
|
Application #:
|
11397550
|
Filing Dt:
|
04/04/2006
|
Title:
|
INTEGRATED CIRCUIT DESIGN WITH CELL-BASED MACROS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2008
|
Application #:
|
11398135
|
Filing Dt:
|
04/05/2006
|
Publication #:
|
|
Pub Dt:
|
10/11/2007
| | | | |
Title:
|
IMPRINT PROCESS USING POLYHEDRAL OLIGOMERIC SILSESQUIOXANE BASED IMPRINT MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11401786
|
Filing Dt:
|
04/11/2006
|
Publication #:
|
|
Pub Dt:
|
08/17/2006
| | | | |
Title:
|
BACK GATE FINFET SRAM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2011
|
Application #:
|
11402401
|
Filing Dt:
|
04/12/2006
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
Title:
|
STATIC RANDOM ACCESS MEMORY (SRAM) CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2008
|
Application #:
|
11403332
|
Filing Dt:
|
04/13/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
BUILDING METAL PILLARS IN A CHIP FOR STRUCTURE SUPPORT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
11405287
|
Filing Dt:
|
04/17/2006
|
Publication #:
|
|
Pub Dt:
|
11/16/2006
| | | | |
Title:
|
METHOD OF FORMING CLOSED AIR GAP INTERCONNECTS AND STRUCTURES FORMED THEREBY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
11406595
|
Filing Dt:
|
04/19/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
STRUCTURES WITH IMPROVED INTERFACIAL STRENGTH OF SICOH DIELECTRICS AND METHOD FOR PREPARING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2008
|
Application #:
|
11407176
|
Filing Dt:
|
04/19/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
SYSTEM AND METHOD FOR DESIGNING A LOW LEAKAGE MONOTONIC CMOS LOGIC CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11407473
|
Filing Dt:
|
04/20/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
METAL GATED ULTRA SHORT MOSFET DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
11407543
|
Filing Dt:
|
04/19/2006
|
Publication #:
|
|
Pub Dt:
|
12/28/2006
| | | | |
Title:
|
METROLOGY TOOL ERROR LOG ANALYSIS METHODOLOGY AND SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2012
|
Application #:
|
11408557
|
Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
07/21/2011
| | | | |
Title:
|
RIBONUCLEIC ACID INTERFERENCE MOLECULES AND BINDING SITES DERIVED BY ANALYZING INTERGENIC AND INTRONIC REGIONS OF GENOMES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2014
|
Application #:
|
11408752
|
Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
DYNAMIC MEMORY CELL STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
|
Application #:
|
11409242
|
Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
UNIVERSAL MOLD FOR INJECTION MOLDING OF SOLDER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2008
|
Application #:
|
11409244
|
Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
CONDUCTIVE BONDING MATERIAL FILL TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11409362
|
Filing Dt:
|
04/20/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
METHOD FOR FABRICATING A SEMICONDUCTOR COMPONENT INCLUDING A HIGH CAPACITANCE PER UNIT AREA CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11409440
|
Filing Dt:
|
04/21/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
NON-VOLATILE MEMORY ARCHITECTURE EMPLOYING BIPOLAR PROGRAMMABLE RESISTANCE STORAGE ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11409858
|
Filing Dt:
|
04/24/2006
|
Publication #:
|
|
Pub Dt:
|
10/25/2007
| | | | |
Title:
|
STATIC RANDOM ACCESS MEMORY CELL WITH IMPROVED STABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2010
|
Application #:
|
11410695
|
Filing Dt:
|
04/24/2006
|
Title:
|
METHODS FOR FABRICATING DUAL BIT FLASH MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2007
|
Application #:
|
11410829
|
Filing Dt:
|
04/24/2006
|
Publication #:
|
|
Pub Dt:
|
08/24/2006
| | | | |
Title:
|
WIRELESS COMMUNICATION SYSTEM WITHIN A SYSTEM ON A CHIP
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11411280
|
Filing Dt:
|
04/26/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
HYBRID ORIENTATION SOI SUBSTRATES, AND METHOD FOR FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/24/2009
|
Application #:
|
11411353
|
Filing Dt:
|
04/25/2006
|
Title:
|
SELECTIVE CONTACT FORMATION USING MASKING AND RESIST PATTERNING TECHNIQUES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2008
|
Application #:
|
11414020
|
Filing Dt:
|
04/28/2006
|
Publication #:
|
|
Pub Dt:
|
11/23/2006
| | | | |
Title:
|
LAND GRID ARRAY STRUCTURES AND METHODS FOR ENGINEERING CHANGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
11415787
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
09/21/2006
| | | | |
Title:
|
DUAL GATE DIELECTRIC THICKNESS DEVICES AND CIRCUITS USING DUAL GATE DIELECTRIC THICKNESS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11415922
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
METHOD FOR FORMING SELF-ALIGNED METAL SILICIDE CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2007
|
Application #:
|
11415923
|
Filing Dt:
|
05/01/2006
|
Publication #:
|
|
Pub Dt:
|
11/01/2007
| | | | |
Title:
|
WAVEGUIDE POLARIZATION BEAM SPLITTERS AND METHOD OF FABRICATING A WAVEGUIDE WIRE-GRID POLARIZATION BEAM SPLITTER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2008
|
Application #:
|
11416028
|
Filing Dt:
|
05/02/2006
|
Publication #:
|
|
Pub Dt:
|
09/07/2006
| | | | |
Title:
|
METHOD OF FABRICATING A MULTILAYERED DIELECTRIC DIFFUSION BARRIER LAYER.
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2008
|
Application #:
|
11416762
|
Filing Dt:
|
05/03/2006
|
Publication #:
|
|
Pub Dt:
|
11/08/2007
| | | | |
Title:
|
APPARATUSES FOR DISSIPATING HEAT FROM SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2008
|
Application #:
|
11417626
|
Filing Dt:
|
05/04/2006
|
Publication #:
|
|
Pub Dt:
|
01/17/2008
| | | | |
Title:
|
SERIAL LINK RECEIVER WITH WIDE INPUT VOLTAGE RANGE AND TOLERANCE TO HIGH POWER VOLTAGE SUPPLY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2008
|
Application #:
|
11418921
|
Filing Dt:
|
05/05/2006
|
Publication #:
|
|
Pub Dt:
|
09/14/2006
| | | | |
Title:
|
ADJUSTABLE SELF-ALIGNED AIR GAP DIELECTRIC FOR LOW CAPACITANCE WIRING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11419008
|
Filing Dt:
|
05/18/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
RADIATION HARDENED LATCH
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11419077
|
Filing Dt:
|
05/18/2006
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
ENHANCED MECHANICAL STRENGTH VIA CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2009
|
Application #:
|
11419217
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
COMPRESSIVE NITRIDE FILM AND METHOD OF MANUFACTURING THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2008
|
Application #:
|
11419219
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR UNFOLDING/REPLICATING LOGIC PATHS TO FACILITATE MODELING OF METASTABLE VALUE PROPAGATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2009
|
Application #:
|
11419271
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
APPARATUS, SYSTEM, AND METHOD FOR DYNAMIC RECOVERY AND RESTORATION FROM DESIGN DEFECTS IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11419308
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
HYBRID STRAINED ORIENTATED SUBSTRATES AND DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/21/2008
|
Application #:
|
11419312
|
Filing Dt:
|
05/19/2006
|
Publication #:
|
|
Pub Dt:
|
11/22/2007
| | | | |
Title:
|
STRAINED HOT (HYBRID ORIENTATION TECHNOLOGY) MOSFETS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11419811
|
Filing Dt:
|
05/23/2006
|
Publication #:
|
|
Pub Dt:
|
03/20/2008
| | | | |
Title:
|
HIGH-RESOLUTION OPTICAL CHANNEL FOR NON-DESTRUCTIVE NAVIGATION AND PROCESSING OF INTEGRATED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2009
|
Application #:
|
11419852
|
Filing Dt:
|
05/23/2006
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHOD AND SYSTEM FOR AUTOMATICALLY DETECTING EXPOSED SUBSTRATES HAVING A HIGH PROBABILITY FOR DEFOCUSED EXPOSURE FIELDS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2008
|
Application #:
|
11420121
|
Filing Dt:
|
06/16/2006
|
Publication #:
|
|
Pub Dt:
|
12/20/2007
| | | | |
Title:
|
METAL RESISTOR, RESISTOR MATERIAL AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11420279
|
Filing Dt:
|
05/25/2006
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
FORMATION OF IMPROVED SOI SUBSTRATES USING BULK SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11420318
|
Filing Dt:
|
05/25/2006
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
METAL OXIDE FIELD EFFECT TRANSISTOR WITH A SHARP HALO AND A METHOD OF FORMING THE TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11420325
|
Filing Dt:
|
05/25/2006
|
Publication #:
|
|
Pub Dt:
|
03/01/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR DETERMINING SURFACE CHARACTERISTICS BY USING SPM TECHNIQUES WITH ACOUSTIC EXCITATION AND REAL-TIME DIGITIZING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
11420527
|
Filing Dt:
|
05/26/2006
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
TRENCH WIDENING WITHOUT MERGING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11420529
|
Filing Dt:
|
05/26/2006
|
Publication #:
|
|
Pub Dt:
|
11/29/2007
| | | | |
Title:
|
METHOD FOR FAST INCREMENTAL CALCULATION OF AN IMPACT OF COUPLED NOISE ON TIMING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11421082
|
Filing Dt:
|
05/31/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
METHOD AND SYSTEM OF PROVIDING A DYNAMIC SAMPLING PLAN FOR INTEGRATED METROLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
|
Application #:
|
11421099
|
Filing Dt:
|
05/31/2006
|
Publication #:
|
|
Pub Dt:
|
04/05/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR SIMULTANEOUSLY DETERMINING AN OVERLAY ACCURACY AND PATTERN PLACEMENT ERROR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/24/2008
|
Application #:
|
11421217
|
Filing Dt:
|
05/31/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
CONTACT RESISTANCE TEST STRUCTURE AND METHODS OF USING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/2010
|
Application #:
|
11421327
|
Filing Dt:
|
05/31/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
STABILIZATION OF DEEP ULTRAVIOLET PHOTORESIST
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2008
|
Application #:
|
11421774
|
Filing Dt:
|
06/02/2006
|
Publication #:
|
|
Pub Dt:
|
12/06/2007
| | | | |
Title:
|
METHOD FOR SYMMETRIC CAPACITOR FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/05/2008
|
Application #:
|
11422913
|
Filing Dt:
|
06/08/2006
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
METHOD AND APPARATUS FOR MEASURING DEVICE MISMATCHES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2010
|
Application #:
|
11422979
|
Filing Dt:
|
06/08/2006
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
METHODS OF FORMING SOLDER CONNECTIONS AND STRUCTURE THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11423854
|
Filing Dt:
|
06/13/2006
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
EXHAUSTIVE DIAGNOSIS OF BRIDGING DEFECTS IN AN INTEGRATED CIRCUIT INCLUDING MULTIPLE NODES USING TEST VECTORS AND IDDQ MEASUREMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11424961
|
Filing Dt:
|
06/19/2006
|
Publication #:
|
|
Pub Dt:
|
05/29/2008
| | | | |
Title:
|
CIRCUITS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/01/2008
|
Application #:
|
11425467
|
Filing Dt:
|
06/21/2006
|
Publication #:
|
|
Pub Dt:
|
11/02/2006
| | | | |
Title:
|
STI FORMATION IN SEMICONDUCTOR DEVICE INCLUDING SOI AND BULK SILICON REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/25/2008
|
Application #:
|
11425491
|
Filing Dt:
|
06/21/2006
|
Publication #:
|
|
Pub Dt:
|
11/30/2006
| | | | |
Title:
|
ELECTROSTATIC DISCHARGE PROTECTION NETWORKS FOR TRIPLE WELL SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11425549
|
Filing Dt:
|
06/21/2006
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
MIM CAPACITOR AND METHOD OF MAKING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
11425550
|
Filing Dt:
|
06/21/2006
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
BIPOLAR TRANSISTOR WITH DUAL SHALLOW TRENCH ISOLATION AND LOW BASE RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/17/2009
|
Application #:
|
11425913
|
Filing Dt:
|
06/22/2006
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
METHODS OF QUANTIFYING VARIATIONS RESULTING FROM MANUFACTURING-INDUCED CORNER ROUNDING OF VARIOUS FEATURES, AND STRUCTURES FOR TESTING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/26/2008
|
Application #:
|
11426623
|
Filing Dt:
|
06/27/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
FOUR-BIT FINFET NVRAM MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
11426698
|
Filing Dt:
|
06/27/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING FREESTANDING SEMICONDUCTOR LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11426970
|
Filing Dt:
|
06/28/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
ETCH STOP LAYER FOR A METALLIZATION LAYER WITH ENHANCED ETCH SELECTIVITY AND HERMETICITY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/25/2007
|
Application #:
|
11427031
|
Filing Dt:
|
06/28/2006
|
Publication #:
|
|
Pub Dt:
|
10/19/2006
| | | | |
Title:
|
MULTIPLE DIELECTRIC FINFET STRUCTURE AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2008
|
Application #:
|
11427077
|
Filing Dt:
|
06/28/2006
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
ROTATABLE COMPONENT SUPPORT ASSEMBLY FOR AN ELECTRONICS ENCLOSURE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2009
|
Application #:
|
11427222
|
Filing Dt:
|
06/28/2006
|
Publication #:
|
|
Pub Dt:
|
10/26/2006
| | | | |
Title:
|
BACKGATED FINFET HAVING DIFFERENT OXIDE THICKNESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/24/2012
|
Application #:
|
11427409
|
Filing Dt:
|
06/29/2006
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
METHOD FOR MANUFACTURING DOUBLE GATE FINFET WITH ASYMMETRIC HALO
|
|
|
Patent #:
|
|
Issue Dt:
|
10/07/2014
|
Application #:
|
11427495
|
Filing Dt:
|
06/29/2006
|
Publication #:
|
|
Pub Dt:
|
01/03/2008
| | | | |
Title:
|
IMPROVED CMOS DEVICES WITH STRESSED CHANNEL REGIONS, AND METHODS FOR FABRICATING THE SAME
|
|