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Patent #:
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|
Issue Dt:
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09/18/2001
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Application #:
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09501034
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Filing Dt:
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02/09/2000
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Title:
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Method of manufacturing an interposer
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09501131
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Filing Dt:
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02/09/2000
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Title:
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Nonvolatile multilevel memory and reading method therefor
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09502070
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Filing Dt:
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02/10/2000
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Title:
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SEMICONDUCTOR DEVICE WITH IMPROVED INTERCONNECTIONS BETWEEN THE CHIP AND THE TERMINALS, AND PROCESS FOR ITS MANUFACTURE
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09502788
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Filing Dt:
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02/11/2000
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Title:
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SETPOINT SILICON CONTROLLED RECTIFIER (SCR) ELECTROSTATIC DISCHARGE (ESD) CORE CLAMP
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09502793
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Filing Dt:
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02/11/2000
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Title:
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COMPUTER NETWORK WITH SWAPPABLE COMPONENTS
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09502822
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Filing Dt:
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02/11/2000
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Title:
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Dram array with gridded sense amplifier power source for enhanced column repair
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09502827
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Filing Dt:
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02/11/2000
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Title:
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EFFICIENT CMOS DC-DC CONVERTERS BASED ON SWITCHED CAPACITOR POWER SUPPLIES WITH INDUCTIVE CURRENT LIMITERS
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09502925
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Filing Dt:
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02/11/2000
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Title:
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Method for improving a stepper signal in a planarized surface over alignment topography
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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09502994
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Filing Dt:
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02/11/2000
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Title:
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3-D RENDERING TEXTURE CACHING SCHEME
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09503105
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Filing Dt:
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02/11/2000
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Title:
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LOW TEMPERATURE NITRIDE USED AS CU BARRIER LAYER
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09503278
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Filing Dt:
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02/14/2000
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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Low dielectric constant shallow trench isolation
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09503412
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Filing Dt:
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02/14/2000
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Title:
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Method of removing surface defects or other recesses during the formation of a semiconductor device
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09503420
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Filing Dt:
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02/11/2000
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Title:
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METHOD AND APPARATUS FOR APPLICATION OF SPRAY ADHESIVE TO A LEADFRAME FOR CHIP BONDING
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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09503553
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Filing Dt:
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02/11/2000
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Title:
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METHOD FOR OPTIMIZING PRINTING OF AN ALTERNATING PHASE SHIFT MASK HAVING A PHASE SHIFT ERROR
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09503836
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Filing Dt:
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02/15/2000
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Title:
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Integrated circuit charge coupling circuit
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Patent #:
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Issue Dt:
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11/11/2003
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Application #:
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09503879
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Filing Dt:
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02/14/2000
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Title:
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METHOD AND APPARATUS FOR BRANCH TRACE MESSAGE SCHEME
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09504191
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Filing Dt:
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02/15/2000
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Title:
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Chemical-mechanical polishing slurry
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09504496
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Filing Dt:
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02/15/2000
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Title:
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Alternate method and structure for improved floating gate tunneling devices
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09505018
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Filing Dt:
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02/16/2000
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Title:
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AN ADHESIVE LAYER FOR AN ELECTRONIC APPARATUS HAVING MULTIPLE SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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12/17/2002
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Application #:
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09505309
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Filing Dt:
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02/16/2000
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Title:
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GRADED LDD IMPLANT PROCESS FOR SUB-HALF-MICRON MOS DEVICES
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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09505332
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Filing Dt:
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02/16/2000
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Title:
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Semiconductor wirebond machine leadframe thermal map system
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09505391
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Filing Dt:
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02/16/2000
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Title:
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HEAT SINK FOR MICROCHIP APPLICATION
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09505599
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Filing Dt:
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02/16/2000
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Title:
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COMPUTER HOUSING WITH EXPANSION BAY COVER AND METHODS FOR OPERATING EXPANSION BAY COVERS
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09505943
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Filing Dt:
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02/15/2000
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Title:
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INTEGRATED CIRCUIT HAVING CONDUCTIVE PATHS OF DIFFERENT HEIGHTS FORMED FROM THE SAME LAYER STRUCTURE AND METHOD FOR FORMING THE SAME
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09506205
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Filing Dt:
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02/17/2000
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Title:
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PROCESS FOR FABRICATING FILMS OF UNIFORM PROPERTIES ON SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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11/01/2005
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Application #:
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09507213
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Filing Dt:
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02/18/2000
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Title:
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METHOD OF INVERSE QUANTIZED SIGNAL SAMPLES OF AN IMAGE DURING IMAGE DECOMPRESSION
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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09507399
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Filing Dt:
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02/18/2000
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Title:
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METHOD OF QUANTIZING SIGNAL SAMPLES OF AN IMAGE DURING SAME
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09507777
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Filing Dt:
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02/18/2000
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Title:
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Process for manufacturing semicondutor integrated memory devices with cells matrix having virtual ground
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Patent #:
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Issue Dt:
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05/10/2005
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Application #:
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09507964
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Filing Dt:
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02/22/2000
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Title:
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POLYNORBORNENE FOAM INSULATION FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09510095
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Filing Dt:
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02/22/2000
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Publication #:
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Pub Dt:
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12/20/2001
| | | | |
Title:
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METHOD OF FABRICATING A SEMICONDUCTOR-ON-INSULATOR MEMORY CELL WITH BURIED WORD AND BODY LINES
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09510413
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Filing Dt:
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02/22/2000
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Publication #:
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Pub Dt:
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11/22/2001
| | | | |
Title:
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METHOD FOR MAKING SEMICONDUCTOR DEVICES HAVING GRADUAL SLOPE CONTACTS
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09510817
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Filing Dt:
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02/23/2000
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Title:
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MULTI-CHIP DEVICE UTILIZING A FLIP CHIP AND WIRE BOND ASSEMBLY
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Patent #:
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Issue Dt:
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03/09/2004
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Application #:
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09510828
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Filing Dt:
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02/23/2000
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Title:
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SPRING ELEMENT FOR USE IN AN APPARATUS FOR ATTACHING TO A SEMICONDUCTOR AND A METHOD OF ATTACHING
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09510890
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Filing Dt:
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02/23/2000
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Title:
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METHODOLOGY OF REMOVING MISPLACED ENCAPSULANT FOR ATTACHMENT OF HEAT SINKS IN A CHIP ON BOARD PACKAGE
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09510894
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Filing Dt:
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02/23/2000
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Title:
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CHIP ON BOARD WITH HEAT SINK ATTACHMENT
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Patent #:
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Issue Dt:
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07/20/2004
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Application #:
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09511092
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Filing Dt:
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02/23/2000
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Title:
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METHOD AND SYSTEM FOR AUTHENTICATING A USER OF A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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07/24/2001
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Application #:
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09511471
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Filing Dt:
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02/23/2000
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Title:
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Variable equilibrate voltage circuit for paired digit lines
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09511520
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Filing Dt:
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02/23/2000
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Title:
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Variable equilibrate voltage circuit for paired digit lines
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09511577
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Filing Dt:
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02/23/2000
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Title:
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High-voltage charge pump circuit
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09511609
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Filing Dt:
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02/23/2000
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Title:
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CHIP ON BOARD AND HEAT SINK ATTACHMENT METHODS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09511692
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Filing Dt:
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02/23/2000
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Title:
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METHOD OF MAKING AN ELECTRICAL CONTACT DEVICE
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09512900
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Filing Dt:
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02/25/2000
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Title:
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Process for manufacturing semiconductor integrated memory devices with cells matrix having virtual ground
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09512978
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Filing Dt:
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02/24/2000
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Publication #:
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Pub Dt:
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04/24/2003
| | | | |
Title:
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METHODS OF FORMING CONTACTS, METHODS OF CONTACTING LINES, METHODS OF OPERATING INTEGRATED CIRCUITRY, AND INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09512981
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Filing Dt:
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02/24/2000
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Title:
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SEMICONDUCTOR WAFER ALIGNMENT TOOLS
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09513000
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Filing Dt:
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02/25/2000
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Title:
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METHOD FOR PROVIDING AN ALIGNMENT DIFFRACTION GRATING FOR PHOTOLITHOGRAPHIC ALIGNMENT DURING SEMICONDUCTOR FABRICATION
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09513273
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Filing Dt:
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02/24/2000
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Title:
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System for evaluating and reporting semiconductor test processes
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09513286
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Filing Dt:
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02/24/2000
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Title:
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METHOD FOR CORRECTION OF ERRORS IN A BINARY WORD STORED IN MULTILEVEL MEMORY CELLS, NOT REQUIRING ADDITIONAL CELLS
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09513598
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Filing Dt:
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02/25/2000
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Title:
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Method for reading a multilevel nonvolatile memory and multilevel nonvolatile memory
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09513641
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Filing Dt:
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02/25/2000
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Title:
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Full page increment/decrement burst for ddr sdram/sgram
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09513761
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Filing Dt:
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02/25/2000
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Title:
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Dummy wordline for controlling the timing of the firing of sense amplifiers in a memory device in relation to the firing of wordlines in the memory device
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09513762
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Filing Dt:
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02/25/2000
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Title:
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Latched sense amplifier with tri-state outputs
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09513797
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Filing Dt:
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02/25/2000
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Title:
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INTEGRATED CIRCUIT PACKAGING FOR OPTICAL SENSOR DEVICES
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09513936
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Filing Dt:
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02/28/2000
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Title:
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Sense amplifier for low voltage memory arrays
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Patent #:
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Issue Dt:
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06/19/2001
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Application #:
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09513938
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Filing Dt:
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02/28/2000
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Title:
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Dynamic flash memory cells with ultrathin tunnel oxides
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09513939
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Filing Dt:
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02/28/2000
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Publication #:
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Pub Dt:
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12/20/2001
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Title:
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Method for manufacturing improved stencil/screen
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09513940
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Filing Dt:
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02/28/2000
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Title:
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Power level detection circuit
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09514493
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Filing Dt:
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02/29/2000
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Title:
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Circuits and methods using vertical complementary transistors
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Patent #:
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Issue Dt:
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12/24/2002
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Application #:
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09514578
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Filing Dt:
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02/28/2000
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Title:
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PLANARIZING PADS, PLANARIZING MACHINES AND METHODS FOR MAKING AND USING PLANARIZING PADS IN MECHANICAL AND CHEMICAL-MECHANICAL PLANARAZATION OF MICROELECRTRONIC DEVICE SUBSTRATE ASSEMBLIES
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09514627
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Filing Dt:
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02/28/2000
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Title:
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P-channel dynamic flash memory cells with ultrathin tunnel oxides
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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09515246
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Filing Dt:
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02/29/2000
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Title:
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METHOD AND SYSTEM FOR ADDRESSING GRAPHICS DATA FOR EFFICIENT DATA ACCESS
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Patent #:
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Issue Dt:
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10/24/2000
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Application #:
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09515362
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Filing Dt:
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02/29/2000
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Title:
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Plasma processing tools, dual-source plasma etchers, dual-source plasma etching methods, and methods of forming planar coil dual-source plasma etchers
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Patent #:
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Issue Dt:
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02/25/2003
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Application #:
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09515579
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Filing Dt:
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02/29/2000
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Title:
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METHOD OF PRESSURE CURING FOR REDUCING VOIDS IN A DIE ATTACH BONDLINE AND APPLICATIONS THEREOF
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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09515804
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Filing Dt:
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02/29/2000
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Title:
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Self-aligned contact formation for semiconductor devices
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09516047
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Filing Dt:
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03/01/2000
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Title:
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Semiconductor device for attachment to a semiconductor substrate
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09516433
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Filing Dt:
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03/01/2000
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Title:
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Active pixel sensor with fully-depleted buried photoreceptor
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09516532
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Filing Dt:
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03/01/2000
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Title:
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Apparatus and method for programming voltage protection in a non-volatile memory system
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Patent #:
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Issue Dt:
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07/24/2001
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Application #:
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09516550
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Filing Dt:
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03/01/2000
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Title:
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Apparatus and method for programming voltage protection in a non-volatile memory system
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09516592
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Filing Dt:
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07/09/1999
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Title:
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SYNCHRONOUS SRAM HAVING PIPELINED ENABLE AND BURST ADDRESS GENERATION
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09516633
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Filing Dt:
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03/01/2000
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Title:
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METHOD OF FORMING INTEGRATED CIRCUITRY, METHOD OF FORMING A CAPACITOR AND METHOD OF FORMING DRAM INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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07/01/2003
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Application #:
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09516652
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Filing Dt:
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03/01/2000
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Title:
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PROCESS FOR FORMING MICROELECTRONIC PACKAGES AND INTERMEDIATE STRUCTURES FORMED THEREWITH
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Patent #:
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Issue Dt:
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01/13/2004
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09516681
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Filing Dt:
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03/01/2000
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Title:
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MEMORY CELL WITH TIGHT COUPLING
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09516819
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Filing Dt:
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03/01/2000
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Title:
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Integrated circuitry and dram integrated circuitry
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Patent #:
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Issue Dt:
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05/22/2001
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Application #:
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09517028
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Filing Dt:
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03/02/2000
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Title:
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Row decoded biasing of sense amplifier for improved one's margin
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09517038
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Filing Dt:
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03/02/2000
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Title:
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Data ordering for cache data transfer
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Patent #:
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Issue Dt:
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05/12/2009
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Application #:
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09517127
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Filing Dt:
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03/02/2000
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Title:
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SEMICONDUCTOR PROCESSOR SYSTEMS, A SYSTEM CONFIGURED TO PROVIDE A SEMICONDUCTOR WORKPIECE PROCESS FLUID
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09517318
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Filing Dt:
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03/02/2000
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Title:
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SYSTEM-ON-A-CHIP WITH MULTI-LAYERED METALLIZED THROUGH-HOLE INTERCONNECTION
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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09517473
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Filing Dt:
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03/02/2000
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Title:
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Reflectance method for evaluating the surface characteristics of opaque materials
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Patent #:
|
|
Issue Dt:
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01/09/2001
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Application #:
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09517684
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Filing Dt:
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03/02/2000
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Title:
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Methods of forming metallization layers and integrated circuits containing such
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Patent #:
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Issue Dt:
|
12/11/2001
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Application #:
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09517814
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Filing Dt:
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03/02/2000
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Title:
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Circuit and method for a high data transfer rate output driver
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Patent #:
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Issue Dt:
|
12/24/2002
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Application #:
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09518292
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Filing Dt:
|
03/03/2000
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Title:
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METHOD FOR ETCHING DIELECTRIC FILMS
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Patent #:
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Issue Dt:
|
09/11/2001
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Application #:
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09518293
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Filing Dt:
|
03/03/2000
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Title:
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Hermetic chip and method of manufacture
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Patent #:
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Issue Dt:
|
03/01/2005
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Application #:
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09518338
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Filing Dt:
|
03/03/2000
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Title:
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HIGH DENSITY STORAGE SCHEME FOR SEMICONDUCTOR MEMORY
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Patent #:
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Issue Dt:
|
02/10/2004
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Application #:
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09518339
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Filing Dt:
|
03/03/2000
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Title:
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APPARATUS AND METHOD FOR FACE-TO-FACE CONNECTION OF A DIE TO A SUBSTRATE WITH POLYMER ELECTRODES
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Patent #:
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Issue Dt:
|
07/16/2002
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Application #:
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09518508
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Filing Dt:
|
03/03/2000
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Title:
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METHODS OF FORMING PORTIONS OF TRANSISTOR STRUCTURES, METHODS OF FORMING ARRAY AND PERIPHERAL CIRCUITRY, AND STRUCTURES COMPRISING TRANSISTOR GATES
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Patent #:
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Issue Dt:
|
01/01/2002
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Application #:
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09518512
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Filing Dt:
|
03/03/2000
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Title:
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METHODS OF FORMING CAPACITOR AND BITLINE STRUCTURES
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Patent #:
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|
Issue Dt:
|
09/05/2006
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Application #:
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09518787
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Filing Dt:
|
03/03/2000
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Title:
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SOFTWARE DISTRIBUTION METHOD AND APPARATUS
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Patent #:
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|
Issue Dt:
|
10/17/2000
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Application #:
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09519226
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Filing Dt:
|
03/06/2000
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Title:
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Space management for managing high capacity nonvolatile memory
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Patent #:
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|
Issue Dt:
|
05/29/2001
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Application #:
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09520057
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Filing Dt:
|
03/07/2000
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Title:
|
Buffer with fast edge propagation
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Patent #:
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|
Issue Dt:
|
06/10/2003
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Application #:
|
09520260
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Filing Dt:
|
03/07/2000
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Title:
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PARTIAL SLOT COVER FOR ENCAPSULATION PROCESS
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|
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Patent #:
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|
Issue Dt:
|
05/29/2001
|
Application #:
|
09520288
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Filing Dt:
|
03/07/2000
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Title:
|
Isolation region forming methods
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|
|
Patent #:
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|
Issue Dt:
|
03/25/2003
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Application #:
|
09520377
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Filing Dt:
|
03/06/2000
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Title:
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AUTOMATED METHOD OF ATTACHING FLIP CHIP DEVICES TO A SUBSTRATE
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|
Patent #:
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|
Issue Dt:
|
04/30/2002
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Application #:
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09520492
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Filing Dt:
|
03/08/2000
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Publication #:
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|
Pub Dt:
|
01/31/2002
| | | | |
Title:
|
METHODS FOR PREPARING RUTHENIUM METAL FILMS
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|
|
Patent #:
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|
Issue Dt:
|
11/26/2002
|
Application #:
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09520494
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Filing Dt:
|
03/08/2000
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Title:
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FIELD PROGRAMMABLE LOGIC ARRAYS WITH VERTICAL TRANSISTORS
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|
Patent #:
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|
Issue Dt:
|
02/20/2001
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Application #:
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09520649
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Filing Dt:
|
03/07/2000
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Title:
|
Memory cell with vertical transistor and buried word and body lines
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|
Patent #:
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|
Issue Dt:
|
04/24/2001
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Application #:
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09520903
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Filing Dt:
|
03/07/2000
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Title:
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Identification and verification of a sector within a block of mass storage flash memory
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|
|
Patent #:
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|
Issue Dt:
|
11/21/2000
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Application #:
|
09520904
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Filing Dt:
|
03/07/2000
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Title:
|
Method and apparatus for decreasing block write operation times performed on nonvolatile memory
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|
|
Patent #:
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|
Issue Dt:
|
01/09/2001
|
Application #:
|
09521419
|
Filing Dt:
|
03/08/2000
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Title:
|
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
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|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09521420
|
Filing Dt:
|
03/08/2000
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Title:
|
Direct logical block addressing flash memory mass storage architecture
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|
|
Patent #:
|
|
Issue Dt:
|
05/01/2001
|
Application #:
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09521756
|
Filing Dt:
|
03/09/2000
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Title:
|
Method and apparatus for reducing bleed currents within a dram array having row-to-column shorts
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|
|
Patent #:
|
|
Issue Dt:
|
11/14/2000
|
Application #:
|
09521867
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Filing Dt:
|
03/08/2000
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Title:
|
Floating gate non-volatile memory cell with low erasing voltage and having different potential barriers
|
|