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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 39 of 148
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Patent #:	7105817	Issue Dt:	09/12/2006	Application #:	11037613	Filing Dt:	01/18/2005
Publication #:	US20060169894	Pub Dt:	08/03/2006
Title:	METHOD OF FORMING IMAGES IN A SCANNING ELECTRON MICROSCOPE

Patent #:	7271043	Issue Dt:	09/18/2007	Application #:	11037622	Filing Dt:	11/17/2010
Publication #:	US20060157706	Pub Dt:	07/20/2006
Title:	METHOD FOR MANUFACTURING STRAINED SILICON DIRECTLY-ON-INSULATOR SUBSTRATE WITH HYBRID CRYSTALLINE ORIENTATION AND DIFFERENT STRESS LEVELS

Patent #:	7469375	Issue Dt:	12/23/2008	Application #:	11037694	Filing Dt:	01/18/2005
Publication #:	US20060161903	Pub Dt:	07/20/2006
Title:	SYSTEMS AND METHODS FOR MANAGING ERROR DEPENDENCIES

Patent #:	7219713	Issue Dt:	05/22/2007	Application #:	11037913	Filing Dt:	01/18/2005
Publication #:	US20060157223	Pub Dt:	07/20/2006
Title:	HETEROGENEOUS THERMAL INTERFACE FOR COOLING

Patent #:	7247946	Issue Dt:	07/24/2007	Application #:	11037970	Filing Dt:	01/18/2005
Publication #:	US20060160350	Pub Dt:	07/20/2006
Title:	ON-CHIP CU INTERCONNECTION USING 1 TO 5 NM THICK METAL CAP

Patent #:	7015581	Issue Dt:	03/21/2006	Application #:	11037995	Filing Dt:	01/18/2005
Publication #:	US20050200025	Pub Dt:	09/15/2005
Title:	LOW-K DIELECTRIC MATERIAL SYSTEM FOR IC APPLICATION

Patent #:	7217978	Issue Dt:	05/15/2007	Application #:	11038593	Filing Dt:	01/19/2005
Publication #:	US20060157788	Pub Dt:	07/20/2006
Title:	SRAM MEMORIES AND MICROPROCESSORS HAVING LOGIC PORTIONS IMPLEMENTED IN HIGH-PERFORMANCE SILICON SUBSTRATES AND SRAM ARRAY PORTIONS HAVING FIELD EFFECT TRANSISTORS WITH LINKED BODIES AND METHODS FOR MAKING SAME

Patent #:	7084050	Issue Dt:	08/01/2006	Application #:	11039602	Filing Dt:	01/19/2005
Publication #:	US20050153487	Pub Dt:	07/14/2005
Title:	FORMATION OF SILICON-GERMANIUM-ON-INSULATOR (SGOI) BY AN INTEGRAL HIGH TEMPERATURE SIMOX-GE INTERDIFFUSION ANNEAL

Patent #:	7078887	Issue Dt:	07/18/2006	Application #:	11040138	Filing Dt:	01/21/2005
Publication #:	US20060164067	Pub Dt:	07/27/2006
Title:	PLL LOOP FILTER CAPACITOR TEST CIRCUIT AND METHOD FOR ON CHIP TESTING OF ANALOG LEAKAGE OF A CIRCUIT

Patent #:	7228514	Issue Dt:	06/05/2007	Application #:	11040139	Filing Dt:	01/21/2005
Publication #:	US20060190900	Pub Dt:	08/24/2006
Title:	METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR AUTOMATICALLY ESTIMATING PIN LOCATIONS AND INTERCONNECT PARASITICS OF A CIRCUIT LAYOUT

Patent #:	7244976	Issue Dt:	07/17/2007	Application #:	11042866	Filing Dt:	01/25/2005
Publication #:	US20050128812	Pub Dt:	06/16/2005
Title:	EEPROM DEVICE WITH SUBSTRATE HOT-ELECTRON INJECTOR FOR LOW-POWER PROGRAMMING

Patent #:	7558185	Issue Dt:	07/07/2009	Application #:	11044346	Filing Dt:	01/27/2005
Publication #:	US20050169063	Pub Dt:	08/04/2005
Title:	STORAGE DEVICE HAVING FLEXIBLE ARCHITECTURE AND FREE SCALABILITY

Patent #:	7504132	Issue Dt:	03/17/2009	Application #:	11044885	Filing Dt:	01/27/2005
Publication #:	US20060165896	Pub Dt:	07/27/2006
Title:	SELECTIVE PLACEMENT OF CARBON NANOTUBES ON OXIDE SURFACES

Patent #:	7282425	Issue Dt:	10/16/2007	Application #:	11046912	Filing Dt:	01/31/2005
Publication #:	US20060172505	Pub Dt:	08/03/2006
Title:	STRUCTURE AND METHOD OF INTEGRATING COMPOUND AND ELEMENTAL SEMICONDUCTORS FOR HIGH-PERFORMACE CMOS

Patent #:	7579149	Issue Dt:	08/25/2009	Application #:	11047250	Filing Dt:	01/31/2005
Publication #:	US20060172283	Pub Dt:	08/03/2006
Title:	METHOD AND APPARATUS TO SEPARATE MOLECULES ACCORDING TO THEIR MOBILITIES

Patent #:	7343386	Issue Dt:	03/11/2008	Application #:	11048001	Filing Dt:	01/31/2005
Publication #:	US20060174190	Pub Dt:	08/03/2006
Title:	TECHNIQUES SUPPORTING COLLABORATIVE PRODUCT DEVELOPMENT

Patent #:	7332424	Issue Dt:	02/19/2008	Application #:	11048578	Filing Dt:	02/01/2005
Publication #:	US20060035454	Pub Dt:	02/16/2006
Title:	FLUXLESS SOLDER TRANSFER AND REFLOW PROCESS

Patent #:	7964865	Issue Dt:	06/21/2011	Application #:	11048739	Filing Dt:	02/03/2005
Publication #:	US20050164477	Pub Dt:	07/28/2005
Title:	STRAINED SILICON ON RELAXED SIGE FILM WITH UNIFORM MISFIT DISLOCATION DENSITY

Patent #:	7452568	Issue Dt:	11/18/2008	Application #:	11049846	Filing Dt:	02/04/2005
Publication #:	US20060177568	Pub Dt:	08/10/2006
Title:	CENTRIFUGAL METHOD FOR FILING HIGH ASPECT RATIO BLIND MICRO VIAS WITH POWDERED MATERIALS FOR CIRCUIT FORMATION

Patent #:	7284210	Issue Dt:	10/16/2007	Application #:	11050232	Filing Dt:	02/03/2005
Publication #:	US20060190867	Pub Dt:	08/24/2006
Title:	METHOD FOR RECONFIGURATION OF RANDOM BIASES IN A SYNTHESIZED DESIGN WITHOUT RECOMPILATION

Patent #:	7870406	Issue Dt:	01/11/2011	Application #:	11050325	Filing Dt:	02/03/2005
Publication #:	US20060173665	Pub Dt:	08/03/2006
Title:	METHOD AND APPARATUS FOR FREQUENCY INDEPENDENT PROCESSOR UTILIZATION RECORDING REGISTER IN A SIMULTANEOUSLY MULTI-THREADED PROCESSOR

Patent #:	7101762	Issue Dt:	09/05/2006	Application #:	11050366	Filing Dt:	02/03/2005
Publication #:	US20050127412	Pub Dt:	06/16/2005
Title:	SELF-ALIGNED DOUBLE GATE MOSFET WITH SEPARATE GATES

Patent #:	7290229	Issue Dt:	10/30/2007	Application #:	11050592	Filing Dt:	02/03/2005
Publication #:	US20060190868	Pub Dt:	08/24/2006
Title:	METHOD AND SYSTEM FOR OPTIMIZED HANDLING OF CONSTRAINTS DURING SYMBOLIC SIMULATION

Patent #:	7418779	Issue Dt:	09/02/2008	Application #:	11050602	Filing Dt:	02/03/2005
Publication #:	US20060169487	Pub Dt:	08/03/2006
Title:	METHOD FOR BALANCING POWER PLANE PIN CURRENTS IN A PRINTED WIRING BOARD USING COLLINEAR SLOTS

Patent #:	7368045	Issue Dt:	05/06/2008	Application #:	11050790	Filing Dt:	01/27/2005
Publication #:	US20060166474	Pub Dt:	07/27/2006
Title:	GATE STACK ENGINEERING BY ELECTROCHEMICAL PROCESSING UTILIZING THROUGH-GATE-DIELECTRIC CURRENT FLOW

Patent #:	7215002	Issue Dt:	05/08/2007	Application #:	11051703	Filing Dt:	02/04/2005
Publication #:	US20050133884	Pub Dt:	06/23/2005
Title:	ELECTRONICALLY PROGRAMMABLE ANTIFUSE AND CIRCUITS MADE THEREWITH

Patent #:	7297583	Issue Dt:	11/20/2007	Application #:	11052675	Filing Dt:	02/07/2005
Publication #:	US20050148133	Pub Dt:	07/07/2005
Title:	METHOD OF MAKING STRAINED CHANNEL CMOS TRANSISTORS HAVING LATTICE-MISMATCHED EPITAXIAL EXTENSION AND SOURCE AND DRAIN REGIONS

Patent #:	7237210	Issue Dt:	06/26/2007	Application #:	11053220	Filing Dt:	02/08/2005
Publication #:	US20060190871	Pub Dt:	08/24/2006
Title:	METHODS, SYSTEMS AND MEDIA FOR MANAGING FUNCTIONAL VERIFICATION OF A PARAMETERIZABLE DESIGN

Patent #:	7381637	Issue Dt:	06/03/2008	Application #:	11053706	Filing Dt:	02/08/2005
Publication #:	US20050146040	Pub Dt:	07/07/2005
Title:	METAL SPACER IN SINGLE AND DUAL DAMASCENE PROCESSING

Patent #:	7091095	Issue Dt:	08/15/2006	Application #:	11053707	Filing Dt:	02/08/2005
Publication #:	US20050156268	Pub Dt:	07/21/2005
Title:	DUAL STRAIN-STATE SIGE LAYERS FOR MICROELECTRONICS

Patent #:	7522680	Issue Dt:	04/21/2009	Application #:	11054060	Filing Dt:	02/09/2005
Publication #:	US20060176982	Pub Dt:	08/10/2006
Title:	APPARATUS, SYSTEM, AND METHOD FOR ASYMMETRIC MAXIMUM LIKELIHOOD DETECTION

Patent #:	7466647	Issue Dt:	12/16/2008	Application #:	11054287	Filing Dt:	02/09/2005
Publication #:	US20060198297	Pub Dt:	09/07/2006
Title:	EFFICIENT MUXING SCHEME TO ALLOW FOR BYPASS AND ARRAY ACCESS

Patent #:	NONE	Issue Dt:		Application #:	11054310	Filing Dt:	02/09/2005
Publication #:	US20060176095	Pub Dt:	08/10/2006
Title:	Cycle staging latch with dual phase dynamic outputs for hit logic compare

Patent #:	7502986	Issue Dt:	03/10/2009	Application #:	11054575	Filing Dt:	02/09/2005
Publication #:	US20060179394	Pub Dt:	08/10/2006
Title:	METHOD AND APPARATUS FOR COLLECTING FAILURE INFORMATION ON ERROR CORRECTION CODE (ECC) PROTECTED DATA

Patent #:	7299436	Issue Dt:	11/20/2007	Application #:	11054880	Filing Dt:	02/10/2005
Publication #:	US20060190858	Pub Dt:	08/24/2006
Title:	SYSTEM AND METHOD FOR ACCURATELY MODELING AN ASYNCHRONOUS INTERFACE USING EXPANDED LOGIC ELEMENTS

Patent #:	7167385	Issue Dt:	01/23/2007	Application #:	11055802	Filing Dt:	02/11/2005
Publication #:	US20060181908	Pub Dt:	08/17/2006
Title:	METHOD AND APPARATUS FOR CONTROLLING THE TIMING OF PRECHARGE IN A CONTENT ADDRESSABLE MEMORY SYSTEM

Patent #:	7082595	Issue Dt:	07/25/2006	Application #:	11055905	Filing Dt:	02/11/2005
Title:	SCHEMATIC DRIVEN PLACEMENT METHOD AND PROGRAM PRODUCT FOR CUSTOM VLSI CIRCUIT DESIGN

Patent #:	7341917	Issue Dt:	03/11/2008	Application #:	11055976	Filing Dt:	02/14/2005
Publication #:	US20050158909	Pub Dt:	07/21/2005
Title:	SOLUTION DEPOSITION OF CHALCOGENIDE FILMS CONTAINING TRANSITION METALS

Patent #:	7253431	Issue Dt:	08/07/2007	Application #:	11056456	Filing Dt:	02/11/2005
Publication #:	US20060038179	Pub Dt:	02/23/2006
Title:	METHOD AND APPARATUS FOR SOLUTION PROCESSED DOPING OF CARBON NANOTUBE

Patent #:	7437626	Issue Dt:	10/14/2008	Application #:	11056726	Filing Dt:	02/11/2005
Publication #:	US20060181941	Pub Dt:	08/17/2006
Title:	EFFICIENT METHOD OF TEST AND SOFT REPAIR OF SRAM WITH REDUNDANCY

Patent #:	7293248	Issue Dt:	11/06/2007	Application #:	11056850	Filing Dt:	02/11/2005
Publication #:	US20060085775	Pub Dt:	04/20/2006
Title:	SYSTEM AND METHOD FOR ACCOMMODATING NON-GAUSSIAN AND NON-LINEAR SOURCES OF VARIATION IN STATISTICAL STATIC TIMING ANALYSIS

Patent #:	7091563	Issue Dt:	08/15/2006	Application #:	11057126	Filing Dt:	02/15/2005
Publication #:	US20050145950	Pub Dt:	07/07/2005
Title:	METHOD AND STRUCTURE FOR IMPROVED MOSFETS USING POLY/SILICIDE GATE HEIGHT CONTROL

Patent #:	7345329	Issue Dt:	03/18/2008	Application #:	11057129	Filing Dt:	02/15/2005
Publication #:	US20050145992	Pub Dt:	07/07/2005
Title:	METHOD FOR REDUCED N+ DIFFUSION IN STRAINED SI ON SIGE SUBSTRATE

Patent #:	7447681	Issue Dt:	11/04/2008	Application #:	11060009	Filing Dt:	02/17/2005
Publication #:	US20060184338	Pub Dt:	08/17/2006
Title:	METHOD, SYSTEM AND PROGRAM FOR SELECTION OF DATABASE CHARACTERISTICS

Patent #:	7205207	Issue Dt:	04/17/2007	Application #:	11060784	Filing Dt:	02/18/2005
Publication #:	US20050148146	Pub Dt:	07/07/2005
Title:	HIGH PERFORMANCE STRAINED CMOS DEVICES

Patent #:	NONE	Issue Dt:		Application #:	11060802	Filing Dt:	02/18/2005
Publication #:	US20050151256	Pub Dt:	07/14/2005
Title:	Freestanding multilayer IC wiring structure

Patent #:	7468538	Issue Dt:	12/23/2008	Application #:	11061444	Filing Dt:	02/22/2005
Publication #:	US20050142700	Pub Dt:	06/30/2005
Title:	STRAINED SILICON ON A SIGE ON SOI SUBSTRATE

Patent #:	NONE	Issue Dt:		Application #:	11062993	Filing Dt:	02/22/2005
Publication #:	US20050242340	Pub Dt:	11/03/2005
Title:	Strained silicon NMOS devices with embedded source/drain

Patent #:	7253105	Issue Dt:	08/07/2007	Application #:	11063152	Filing Dt:	02/22/2005
Publication #:	US20060189133	Pub Dt:	08/24/2006
Title:	RELIABLE BEOL INTEGRATION PROCESS WITH DIRECT CMP OF POROUS SICOH DIELECTRIC

Patent #:	7456046	Issue Dt:	11/25/2008	Application #:	11063449	Filing Dt:	02/23/2005
Publication #:	US20060186540	Pub Dt:	08/24/2006
Title:	METHOD TO CREATE FLEXIBLE CONNECTIONS FOR INTEGRATED CIRCUITS

Patent #:	7288362	Issue Dt:	10/30/2007	Application #:	11063940	Filing Dt:	02/23/2005
Publication #:	US20060188804	Pub Dt:	08/24/2006
Title:	IMMERSION TOPCOAT MATERIALS WITH IMPROVED PERFORMANCE

Patent #:	7422983	Issue Dt:	09/09/2008	Application #:	11064561	Filing Dt:	02/24/2005
Publication #:	US20060189134	Pub Dt:	08/24/2006
Title:	TA-TAN SELECTIVE REMOVAL PROCESS FOR INTEGRATED DEVICE FABRICATION

Patent #:	7290228	Issue Dt:	10/30/2007	Application #:	11064727	Filing Dt:	02/24/2005
Publication #:	US20060190232	Pub Dt:	08/24/2006
Title:	HARDWARE ACCELERATOR WITH A SINGLE PARTITION FOR LATCHES AND COMBINATIONAL LOGIC

Patent #:	7444574	Issue Dt:	10/28/2008	Application #:	11064729	Filing Dt:	02/24/2005
Publication #:	US20060190233	Pub Dt:	08/24/2006
Title:	STIMULUS EXTRACTION AND SEQUENCE GENERATION FOR AN ELECTRONIC DEVICE UNDER TEST

Patent #:	7232745	Issue Dt:	06/19/2007	Application #:	11064730	Filing Dt:	02/24/2005
Publication #:	US20060189110	Pub Dt:	08/24/2006
Title:	BODY CAPACITOR FOR SOI MEMORY DESCRIPTION

Patent #:	7745277	Issue Dt:	06/29/2010	Application #:	11065061	Filing Dt:	02/25/2005
Publication #:	US20050142788	Pub Dt:	06/30/2005
Title:	MOSFET PERFORMANCE IMPROVEMENT USING DEFORMATION IN SOI STRUCTURE

Patent #:	7340374	Issue Dt:	03/04/2008	Application #:	11065740	Filing Dt:	02/25/2005
Publication #:	US20060195294	Pub Dt:	08/31/2006
Title:	DETERMINING FLEET MATCHING PROBLEM AND ROOT CAUSE ISSUE FOR MEASUREMENT SYSTEM

Patent #:	7113006	Issue Dt:	09/26/2006	Application #:	11065840	Filing Dt:	02/25/2005
Publication #:	US20060192612	Pub Dt:	08/31/2006
Title:	CAPACITOR RELIABILITY FOR MULTIPLE-VOLTAGE POWER SUPPLY SYSTEMS

Patent #:	7268377	Issue Dt:	09/11/2007	Application #:	11066659	Filing Dt:	02/25/2005
Publication #:	US20060194421	Pub Dt:	08/31/2006
Title:	STRUCTURE AND METHOD OF FABRICATING A HYBRID SUBSTRATE FOR HIGH-PERFORMANCE HYBRID-ORIENTATION SILICON-ON-INSULATOR CMOS DEVICES

Patent #:	7195971	Issue Dt:	03/27/2007	Application #:	11066738	Filing Dt:	02/28/2005
Publication #:	US20050139959	Pub Dt:	06/30/2005
Title:	METHOD OF MANUFACTURING AN INTRALEVEL DECOUPLING CAPACITOR

Patent #:	7169674	Issue Dt:	01/30/2007	Application #:	11066762	Filing Dt:	02/28/2005
Publication #:	US20050156257	Pub Dt:	07/21/2005
Title:	COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) GATE STACK WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRIC AND INTEGRATED DIFFUSION BARRIER

Patent #:	7005879	Issue Dt:	02/28/2006	Application #:	11067755	Filing Dt:	03/01/2005
Title:	DEVICE FOR PROBE CARD POWER BUS NOISE REDUCTION

Patent #:	7136296	Issue Dt:	11/14/2006	Application #:	11067797	Filing Dt:	02/28/2005
Publication #:	US20060198181	Pub Dt:	09/07/2006
Title:	STATIC RANDOM ACCESS MEMORY UTILIZING GATED DIODE TECHNOLOGY

Patent #:	7622240	Issue Dt:	11/24/2009	Application #:	11068339	Filing Dt:	02/28/2005
Publication #:	US20060194144	Pub Dt:	08/31/2006
Title:	LOW BLUR MOLECULAR RESIST

Patent #:	NONE	Issue Dt:		Application #:	11068861	Filing Dt:	03/02/2005
Publication #:	US20060197769	Pub Dt:	09/07/2006
Title:	Method and apparatus for generating profile of solutions trading off number of activities utilized and objective value for bilinear integer optimization models

Patent #:	7516393	Issue Dt:	04/07/2009	Application #:	11069777	Filing Dt:	03/01/2005
Publication #:	US20060200731	Pub Dt:	09/07/2006
Title:	SYSTEM AND METHOD OF ERROR DETECTION FOR UNORDERED DATA DELIVERY

Patent #:	NONE	Issue Dt:		Application #:	11070113	Filing Dt:	03/02/2005
Publication #:	US20050148134	Pub Dt:	07/07/2005
Title:	CMOS performance enhancement using localized voids and extended defects

Patent #:	7075350	Issue Dt:	07/11/2006	Application #:	11070730	Filing Dt:	03/02/2005
Publication #:	US20050146362	Pub Dt:	07/07/2005
Title:	PROGRAMMABLE LOW-POWER HIGH-FREQUENCY DIVIDER

Patent #:	7325210	Issue Dt:	01/29/2008	Application #:	11077043	Filing Dt:	03/10/2005
Publication #:	US20060206845	Pub Dt:	09/14/2006
Title:	HYBRID LINEAR WIRE MODEL APPROACH TO TUNING TRANSISTOR WIDTHS OF CIRCUITS WITH RC INTERCONNECT

Patent #:	NONE	Issue Dt:		Application #:	11077313	Filing Dt:	03/10/2005
Publication #:	US20060203581	Pub Dt:	09/14/2006
Title:	Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditions

Patent #:	7341788	Issue Dt:	03/11/2008	Application #:	11077804	Filing Dt:	03/11/2005
Publication #:	US20060205875	Pub Dt:	09/14/2006
Title:	MATERIALS HAVING PREDEFINED MORPHOLOGIES AND METHODS OF FORMATION THEREOF

Patent #:	7529997	Issue Dt:	05/05/2009	Application #:	11079816	Filing Dt:	03/14/2005
Publication #:	US20060203578	Pub Dt:	09/14/2006
Title:	METHOD FOR SELF-CORRECTING CACHE USING LINE DELETE, DATA LOGGING, AND FUSE REPAIR CORRECTION

Patent #:	7418032	Issue Dt:	08/26/2008	Application #:	11079952	Filing Dt:	03/15/2005
Publication #:	US20060209944	Pub Dt:	09/21/2006
Title:	ALTERING POWER CONSUMPTION IN COMMUNICATION LINKS BASED ON MEASURED NOISE

Patent #:	7187251	Issue Dt:	03/06/2007	Application #:	11081237	Filing Dt:	03/16/2005
Publication #:	US20060208828	Pub Dt:	09/21/2006
Title:	DC ISOLATED PHASE INVERTER AND A RING HYBRID COUPLER INCLUDING THE DC ISOLATED PHASE INVERTER

Patent #:	7350095	Issue Dt:	03/25/2008	Application #:	11082973	Filing Dt:	03/17/2005
Publication #:	US20060212739	Pub Dt:	09/21/2006
Title:	DIGITAL CIRCUIT TO MEASURE AND/OR CORRECT DUTY CYCLES

Patent #:	7326983	Issue Dt:	02/05/2008	Application #:	11082993	Filing Dt:	03/17/2005
Publication #:	US20050164468	Pub Dt:	07/28/2005
Title:	SELECTIVE SILICON-ON-INSULATOR ISOLATION STRUCTURE AND METHOD

Patent #:	7211490	Issue Dt:	05/01/2007	Application #:	11083743	Filing Dt:	03/18/2005
Publication #:	US20050164433	Pub Dt:	07/28/2005
Title:	ULTRA THIN CHANNEL MOSFET

Patent #:	7247536	Issue Dt:	07/24/2007	Application #:	11085663	Filing Dt:	03/21/2005
Publication #:	US20050164447	Pub Dt:	07/28/2005
Title:	VERTICAL DRAM DEVICE WITH SELF-ALIGNED UPPER TRENCH SHAPING

Patent #:	7434101	Issue Dt:	10/07/2008	Application #:	11085791	Filing Dt:	03/21/2005
Publication #:	US20060212756	Pub Dt:	09/21/2006
Title:	HIGHLY SPECIALIZED SCENARIOS IN RANDOM TEST GENERATION

Patent #:	7348667	Issue Dt:	03/25/2008	Application #:	11086719	Filing Dt:	03/22/2005
Publication #:	US20060214190	Pub Dt:	09/28/2006
Title:	SYSTEM AND METHOD FOR NOISE REDUCTION IN MULTI-LAYER CERAMIC PACKAGES

Patent #:	7627843	Issue Dt:	12/01/2009	Application #:	11087466	Filing Dt:	03/23/2005
Publication #:	US20060218513	Pub Dt:	09/28/2006
Title:	DYNAMICALLY INTERLEAVING RANDOMLY GENERATED TEST-CASES FOR FUNCTIONAL VERIFICATION

Patent #:	7388278	Issue Dt:	06/17/2008	Application #:	11088595	Filing Dt:	03/24/2005
Publication #:	US20060214225	Pub Dt:	09/28/2006
Title:	HIGH PERFORMANCE FIELD EFFECT TRANSISTORS ON SOI SUBSTRATE WITH STRESS-INDUCING MATERIAL AS BURIED INSULATOR AND METHODS

Patent #:	7472368	Issue Dt:	12/30/2008	Application #:	11089472	Filing Dt:	03/24/2005
Publication #:	US20060236277	Pub Dt:	10/19/2006
Title:	METHOD FOR IMPLEMENTING VERTICALLY COUPLED NOISE CONTROL THROUGH A MESH PLANE IN AN ELECTRONIC PACKAGE DESIGN

Patent #:	7142991	Issue Dt:	11/28/2006	Application #:	11095327	Filing Dt:	03/31/2005
Publication #:	US20060229828	Pub Dt:	10/12/2006
Title:	VOLTAGE DEPENDENT PARAMETER ANALYSIS

Patent #:	7369961	Issue Dt:	05/06/2008	Application #:	11096485	Filing Dt:	03/31/2005
Publication #:	US20060224356	Pub Dt:	10/05/2006
Title:	SYSTEMS AND METHODS FOR STRUCTURAL CLUSTERING OF TIME SEQUENCES

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100

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Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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