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Patent #:
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Issue Dt:
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02/04/2003
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Application #:
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09564356
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Filing Dt:
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05/01/2000
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Title:
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LOW WORK FUNCTION EMITTERS AND METHOD FOR PRODUCTION OF FED'S
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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09565135
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Filing Dt:
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05/05/2000
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Title:
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THREE-LEVEL UNITARY INTERCONNECT STRUCTURE
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09565197
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Filing Dt:
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05/04/2000
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Title:
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CONTACT OPENINGS, METHODS OF FORMING ELECTRICAL CONNECTIONS FOR INTERCONNECTIONS, AND INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
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03/20/2007
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Application #:
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09565215
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Filing Dt:
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05/04/2000
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Title:
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MULTI-WIRELESS NETWORK CONFIGURABLE BEHAVIOR
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09565517
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Filing Dt:
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05/05/2000
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Title:
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Nonvolatile memory using flexible erasing methods and method and system for using same
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Patent #:
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Issue Dt:
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05/06/2003
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Application #:
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09565638
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Filing Dt:
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05/04/2000
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Title:
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METHOD FOR PACKAGING MICROELECTRONIC SUBSTRATES
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Patent #:
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Issue Dt:
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04/22/2003
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Application #:
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09566185
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Filing Dt:
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05/05/2000
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Title:
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FAN DUCT MODULE
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Patent #:
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Issue Dt:
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07/22/2003
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Application #:
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09567574
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Filing Dt:
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05/10/2000
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Publication #:
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Pub Dt:
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03/21/2002
| | | | |
Title:
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STATE MACHINE HAVING EACH EXECUTION CYCLE DIRECTLY CONNECTED TO A SUSPEND CYCLE TO ACHIEVE FAST SUSPEND OF ERASE OPERATION IN FLASH MEMORIES
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Patent #:
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Issue Dt:
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09/10/2002
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Application #:
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09567631
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Filing Dt:
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05/09/2000
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Title:
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METHOD AND APPARATUS FOR SELECTIVE REMOVAL OF MATERIAL FROM WAFER ALIGNMENT MARKS
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09567632
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Filing Dt:
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05/09/2000
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Title:
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Apparatus and method for disabling and re-enabling access to ic test functions
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09567649
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Filing Dt:
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05/09/2000
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Publication #:
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Pub Dt:
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07/18/2002
| | | | |
Title:
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CONTACT PLUG
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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09567673
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Filing Dt:
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05/09/2000
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Title:
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VERTICAL TWIST SCHEME FOR HIGH-DENSITY DRAMS
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09567796
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Filing Dt:
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05/09/2000
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Title:
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Apparatus and method for disabling and re-enabling access to IC test functions
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09568093
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Filing Dt:
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05/09/2000
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Title:
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Methods of forming openings and methods of controlling the degree of taper of openings
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Patent #:
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Issue Dt:
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03/14/2006
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Application #:
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09568156
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Filing Dt:
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05/10/2000
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Title:
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METHOD OF TUNING A MULTI-PATH CIRCUIT
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Patent #:
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Issue Dt:
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03/13/2001
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Application #:
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09568329
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Filing Dt:
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05/09/2000
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Title:
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SEMICONDUCTOR BONDING PAD
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09568676
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Filing Dt:
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05/11/2000
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Title:
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MOLDED BALL GRID ARRAY
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Patent #:
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Issue Dt:
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01/08/2002
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Application #:
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09569216
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Filing Dt:
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05/11/2000
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Title:
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Loc semiconductor assembled with room temperature adhesive
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09569232
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Filing Dt:
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05/11/2000
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Title:
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Method for the in-writing verification of the threshold value in non-volatile memories
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09569446
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Filing Dt:
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05/12/2000
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Title:
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SUBSTRATE STRUCTURE
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Patent #:
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Issue Dt:
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01/14/2003
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Application #:
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09569570
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Filing Dt:
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05/10/2000
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Title:
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DOUBLE SIDED CONTAINER CAPACITOR FOR DRAM CELL ARRAY AND METHOD OF FORMING SAME
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09570332
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Filing Dt:
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05/12/2000
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Title:
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Non-volatile memory device with row redundancy
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09570879
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Filing Dt:
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05/15/2000
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Title:
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SUBSTANTIALLY HILLOCK-FREE ALUMINUM-CONTAINING COMPONENTS
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09571074
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Filing Dt:
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05/15/2000
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Title:
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Advance metallization process
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09571190
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Filing Dt:
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05/16/2000
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Title:
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BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09571206
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Filing Dt:
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05/16/2000
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Title:
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METHOD FOR TESTING A MEMORY DEVICE HAVING TWO OR MORE MEMORY ARRAYS
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09571352
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Filing Dt:
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05/16/2000
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Title:
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FOUR F2 FOLDED BIT LINE DRAM CELL STRUCTURE HAVING BURIED BIT AND WORD LINES
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09571721
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Filing Dt:
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05/15/2000
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Title:
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CENTER BOND FLIP-CHIP SEMICONDUCTOR DEVICE AND METHOD OF MAKING IT
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09571788
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Filing Dt:
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05/16/2000
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Title:
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METHOD FOR FORMING OXIDE LAYER IN FIELD REGIONS FO SEMICONDUCTOR SUBSTRATES IN TWO FORMING STEPS WITH ONE STEP PERFORMED AT AN INCREASED PRESSURE
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Patent #:
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Issue Dt:
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03/06/2001
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Application #:
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09572127
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Filing Dt:
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05/17/2000
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Title:
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Synchronous multilevel non-volatile memory and related reading method
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Patent #:
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Issue Dt:
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08/07/2001
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Application #:
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09572738
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Filing Dt:
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05/17/2000
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Title:
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Method and stencil for extruding material on a substrate
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09573074
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Filing Dt:
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05/16/2000
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Title:
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METHOD AND APPARATUS FOR TESTING AN EMBEDDED DRAM
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09573450
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Filing Dt:
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05/16/2000
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Title:
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METHOD AND APPARATUS FOR DETECTING INTERCELL DEFECTS IN A MEMORY DEVICE
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09573741
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Filing Dt:
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05/18/2000
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Title:
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DISPOSABLE SPACER AND METHOD OF FORMING AND USING SAME
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09574471
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Filing Dt:
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05/19/2000
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Title:
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USE OF RESIDUAL ORGANIC COMPOUNDS TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09574678
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Filing Dt:
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05/17/2000
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Title:
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Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
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Patent #:
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Issue Dt:
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02/28/2006
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Application #:
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09574736
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Filing Dt:
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05/18/2000
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Title:
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REMOTE COMPUTER CONTROLLER AND CONTROL METHOD
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09574759
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Filing Dt:
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05/19/2000
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Title:
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METHODS EMPLOYING HYBRID ADHESIVE MATERIALS TO SECURE COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES TO ONE ANOTHER AND ASSEMBLIES AND PACKAGES INCLUDING COMPONENTS SECURED TO ONE ANOTHER WITH SUCH HYBRID ADHESIVE MATERIALS
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Patent #:
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Issue Dt:
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10/02/2001
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Application #:
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09574850
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Filing Dt:
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05/19/2000
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Title:
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Mounting multiple semiconductor dies in a package
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09575964
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Filing Dt:
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05/23/2000
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Title:
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Reduced cell voltage for memory device
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Patent #:
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Issue Dt:
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07/10/2001
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Application #:
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09576018
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Filing Dt:
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05/23/2000
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Title:
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Electrode structures, display devices containing the same, and methods for making the same
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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09576399
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Filing Dt:
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05/22/2000
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Title:
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Method and apparatus for application of spray adhesive to a leadframe for chip bonding
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Patent #:
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Issue Dt:
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10/16/2001
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Application #:
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09576445
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Filing Dt:
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05/22/2000
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Title:
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Differential correlated double sampling dram sense amplifier
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Patent #:
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Issue Dt:
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05/01/2001
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Application #:
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09576503
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Filing Dt:
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05/23/2000
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Title:
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Method and structure for improved alignment tolerance in multiple, singularized plugs
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09576881
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Filing Dt:
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05/22/2000
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Title:
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TEST INTERPOSER FOR USE WITH BALL GRID ARRAY PACKAGES, ASSEMBLIES AND BALL GRID ARRAY PACKAGES INCLUDING SAME, AND METHODS
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Patent #:
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Issue Dt:
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11/12/2002
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Application #:
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09577390
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Filing Dt:
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05/25/2000
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Title:
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SEMICONDUCTOR STRUCTURE HAVING A PLURALITY OF GATE STACKS
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09578255
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Filing Dt:
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05/24/2000
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Title:
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APPARATUS FOR REDUCING WARPAGE DURING APPLICATION AND CURING OF ENCAPSULANT MATERIALS ON A PRINTED CIRCUIT BOARD
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09578778
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Filing Dt:
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05/25/2000
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Title:
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Oscillator and switch-over control circuit for a high-voltage generator
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Patent #:
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Issue Dt:
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02/18/2003
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Application #:
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09578917
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Filing Dt:
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05/25/2000
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Title:
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APPARATUS AND METHOD FOR COUPLING A FIRST NODE TO A SECOND NODE USING SWITCHES WHICH ARE SELECTIVELY CLOCKED FOR FAST SWITCHING TIMES
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Patent #:
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Issue Dt:
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11/25/2003
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Application #:
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09579333
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Filing Dt:
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05/25/2000
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Publication #:
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Pub Dt:
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04/10/2003
| | | | |
Title:
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METHODS OF CLEANING SURFACES OF COPPER-CONTAINING MATERIALS, AND METHODS OF FORMING OPENINGS TO COPPER-CONTAINING SUBSTRATES
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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09579402
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Filing Dt:
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05/25/2000
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Title:
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GATE STACK STRUCTURE
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09579538
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Filing Dt:
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05/24/2000
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Title:
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Microelectronic device fabricating method, method of forming a pair of conductive device components of different base widths from a common deposited conductive layer
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09579567
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Filing Dt:
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05/26/2000
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Title:
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LEAKAGE DETECTION IN FLASH MEMORY CELL
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Patent #:
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Issue Dt:
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12/04/2001
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Application #:
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09580392
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Filing Dt:
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05/26/2000
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Title:
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Method and apparatus for storing location identification information within non-volatile memory devices
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09580662
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Filing Dt:
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05/26/2000
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Title:
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Apparatus for reducing induced switching transients
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Patent #:
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Issue Dt:
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04/24/2001
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Application #:
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09580860
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Filing Dt:
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05/30/2000
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Title:
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Vertical gate transistors in pass transistor logic decode circuits
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Patent #:
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Issue Dt:
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06/01/2004
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Application #:
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09580901
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Filing Dt:
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05/30/2000
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Title:
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STATIC PASS TRANSISTOR LOGIC WITH TRANSISTORS WITH MULTIPLE VERTICAL GATES
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09583040
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Filing Dt:
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05/30/2000
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Title:
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System for improved memory cell access
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09583478
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Filing Dt:
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05/31/2000
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Title:
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Device and method for margin testing a semiconductor memory by applying a stressing voltage simultaneously to complementary and true digit lines
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Patent #:
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Issue Dt:
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07/16/2002
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Application #:
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09583584
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Filing Dt:
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05/31/2000
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Title:
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FIELD PROGRAMMABLE LOGIC ARRAYS WITH TRANSISTORS WITH VERTICAL GATES
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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09583883
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Filing Dt:
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05/31/2000
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Title:
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HIGH SPEED BUS TOPOLOGY FOR EXPANDABLE SYSTEMS
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Patent #:
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Issue Dt:
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06/24/2003
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Application #:
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09584005
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Filing Dt:
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05/30/2000
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Title:
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SURFACE CHANNEL MOS TRANSISTORS, METHODS FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICES CONTAINING THE SAME
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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09584157
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Filing Dt:
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05/31/2000
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Title:
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MULTILEVEL COPPER INTERCONNECT WITH DOUBLE PASSIVATION
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09584240
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Filing Dt:
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05/30/2000
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Title:
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Method for removing contaminants from a semiconductor wafer
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09584256
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Filing Dt:
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05/31/2000
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Title:
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Method for forming a semiconductor connection with a top surface having an enlarged recess
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Patent #:
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Issue Dt:
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06/01/2010
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Application #:
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09584520
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Filing Dt:
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05/31/2000
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Title:
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REMOTELY MANAGING AND CONTROLLING A CONSUMER APPLIANCE
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Patent #:
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Issue Dt:
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11/26/2002
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Application #:
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09584552
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Filing Dt:
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05/31/2000
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Title:
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CLEANING COMPOSITION USEFUL IN SEMICONDUCTOR INTEGRATED CIRCUIT FABRICATION
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Patent #:
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Issue Dt:
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04/17/2001
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Application #:
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09584564
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Filing Dt:
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05/31/2000
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Title:
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Programmable memory decode circuits with transistors with vertical gates
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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09585682
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Filing Dt:
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06/01/2000
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Title:
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SEMICONDUCTOR DEVICE HAVING A SUBSTRATE AN UNDOPED SILICON OXIDE STRUCTURE AND AN OVERLAYING DOPED SILICON OXIDE STRUCTURE WITH A SIDEWALL TERMINATING AT THE UNDOPED SILICON OXIDE STRUCTURE
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09585916
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Filing Dt:
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06/02/2000
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Title:
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CMOS switch circuit for transferring high voltages, in particular for line decoding in nonvolatile memories, with reduced consumption during switching
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09586048
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Filing Dt:
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06/02/2000
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Title:
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GATE AREA RELIEF STRIP FOR A MOLDED I/C PACKAGE
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Patent #:
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Issue Dt:
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08/17/2004
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Application #:
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09586050
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Filing Dt:
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06/02/2000
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Title:
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STACKABLE BALL GRID ARRAY
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09586243
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Filing Dt:
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06/02/2000
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Title:
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CHIP SCALE PACKAGES FORMED BY WAFER LEVEL PROCESSING
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Patent #:
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Issue Dt:
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11/20/2001
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Application #:
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09586399
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Filing Dt:
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06/02/2000
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Title:
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Biasing stage for biasing the drain terminal of a nonvolatile memory cell during the read phase
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Patent #:
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Issue Dt:
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07/09/2002
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Application #:
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09586952
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Filing Dt:
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06/05/2000
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Title:
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AUTOMATED COMBI DEPOSITION APPARATUS AND METHOD
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Patent #:
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Issue Dt:
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04/03/2001
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Application #:
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09587105
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Filing Dt:
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06/01/2000
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Title:
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Methods of identifying defects in an array of memory cells and related integrated circuitry
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Patent #:
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Issue Dt:
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08/20/2002
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Application #:
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09587190
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Filing Dt:
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06/05/2000
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Title:
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PD-SOI SUBSTRATE WITH SUPPRESSED FLOATING BODY EFFECT AND METHOD FOR ITS FABRICATION
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09587297
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Filing Dt:
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06/05/2000
|
Title:
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OVERLAY ERROR REDUCTION BY MINIMIZATION OF UNPATTERNED WAFER AREA
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Patent #:
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Issue Dt:
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07/29/2003
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Application #:
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09589043
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Filing Dt:
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06/06/2000
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Title:
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DYNAMIC BUFFER ALLOCATION FOR A COMPUTER SYSTEM
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Patent #:
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Issue Dt:
|
09/09/2003
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Application #:
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09589671
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Filing Dt:
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06/07/2000
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Title:
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METHOD OF FORMING A CAPACITOR STRUCTURE
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Patent #:
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Issue Dt:
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03/26/2002
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Application #:
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09589723
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Filing Dt:
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06/08/2000
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Title:
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Reading method for non-volatile memories with sensing ratio variable with the reading voltage, and device to realize said method
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Patent #:
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Issue Dt:
|
10/08/2002
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Application #:
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09589848
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Filing Dt:
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06/08/2000
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Title:
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STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR FABRICATING SPACERS FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES
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Patent #:
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Issue Dt:
|
04/15/2003
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Application #:
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09590023
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Filing Dt:
|
06/07/2000
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Title:
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SEMICONDUCTOR PACKAGES AND METHODS FOR MAKING THE SAME
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Patent #:
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Issue Dt:
|
05/22/2001
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Application #:
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09590035
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Filing Dt:
|
06/07/2000
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Title:
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Method of chemical mechanical polishing
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Patent #:
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Issue Dt:
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05/27/2003
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Application #:
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09590418
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Filing Dt:
|
06/08/2000
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Title:
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COLLAR POSITIONABLE ABOUT A PERIPHERY OF A CONTACT PAD AND AROUND A CONDUCTIVE STRUCTURE SECURED TO THE CONTACT PADS, SEMICONDUCTOR DEVICE COMPONENTS INCLUDING SAME, AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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09590527
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Filing Dt:
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06/08/2000
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Title:
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STRUCTURES FOR STABILIZING SEMICONDUCTOR DEVICES RELATIVE TO TEST SUBSTRATES AND METHODS FOR FABRICATING THE STABILIZERS
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Patent #:
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Issue Dt:
|
11/12/2002
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Application #:
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09590612
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Filing Dt:
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06/09/2000
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Title:
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METHOD FOR USE OF BUS PARKING STATES TO COMMUNICATE DIAGNOSTIC INFORMATION
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Patent #:
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Issue Dt:
|
07/07/2009
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Application #:
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09590646
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Filing Dt:
|
06/08/2000
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Title:
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REINFORCED, SELF-ALIGNING CONDUCTIVE STRUCTURES FOR SEMICONDUCTOR DEVICE COMPONENTS AND METHODS FOR FABRICATING SAME
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Patent #:
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Issue Dt:
|
11/19/2002
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Application #:
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09590791
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Filing Dt:
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06/08/2000
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Title:
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METHODS FOR FORMING AND INTEGRATED CIRCUIT STRUCTURES CONTAINING ENHANCED-SURFACE-AREA CONDUCTIVE LAYERS
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Patent #:
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Issue Dt:
|
12/31/2002
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Application #:
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09591144
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Filing Dt:
|
06/09/2000
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Title:
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PRE-APPLIED ADHESION PROMOTER
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Patent #:
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Issue Dt:
|
12/11/2001
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Application #:
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09591969
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Filing Dt:
|
06/12/2000
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Title:
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SEMICONDUCTOR DEVICES COMPRISING SEMICONDUCTIVE MATERIAL SUBSTRATES AND INSULATOR LAYERS OVER THE SUBSTRATES
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Patent #:
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Issue Dt:
|
05/08/2001
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Application #:
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09592057
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Filing Dt:
|
06/12/2000
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Title:
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Method of constructing a wafer carrier
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Patent #:
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Issue Dt:
|
05/29/2001
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Application #:
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09592356
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Filing Dt:
|
06/12/2000
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Title:
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Wafer carrier having both a rigid structure and resistance to corrosive environments
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Patent #:
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Issue Dt:
|
07/23/2002
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Application #:
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09592441
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Filing Dt:
|
06/12/2000
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Title:
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
|
10/21/2003
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Application #:
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09592604
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Filing Dt:
|
06/12/2000
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Title:
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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|
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Patent #:
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Issue Dt:
|
11/11/2003
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Application #:
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09592933
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Filing Dt:
|
06/13/2000
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Title:
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REFERENCE VOLTAGE FILTER FOR MEMORY MODULES
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Patent #:
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Issue Dt:
|
08/13/2002
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Application #:
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09593046
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Filing Dt:
|
06/12/2000
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Title:
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FIXED ABRASIVE POLISHING PAD
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Patent #:
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Issue Dt:
|
01/07/2003
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Application #:
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09594050
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Filing Dt:
|
06/14/2000
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Title:
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TIMER CIRCUIT WITH PROGRAMMABLE DECODE CIRCUITRY
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Patent #:
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Issue Dt:
|
07/16/2002
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Application #:
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09594817
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Filing Dt:
|
06/16/2000
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Title:
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FERROELECTRIC MEMORY TRANSISTOR WITH HIGH-K GATE INSULATOR AND METHOD OF FABRICATION
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Patent #:
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|
Issue Dt:
|
07/08/2003
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Application #:
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09595623
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Filing Dt:
|
06/16/2000
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Title:
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METHOD AND APPARATUS FOR PACKAGING A MICROELECTRONIC DIE
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