|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
09040568
|
Filing Dt:
|
03/18/1998
|
Title:
|
MICROELECTRONIC ASSEMBLY HAVING SLIDABLE CONTACTS AND METHOD FOR MANUFACTURING THE ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2002
|
Application #:
|
09041101
|
Filing Dt:
|
03/10/1998
|
Title:
|
METHOD, DEVICE AND ARTICLE OF MANUFACTURE FOR IMPLEMENTING A REAL-TIME TASK SCHEDULING ACCELERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09044772
|
Filing Dt:
|
03/20/1998
|
Title:
|
PARABOLIC SIGNAL GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
09049221
|
Filing Dt:
|
03/27/1998
|
Title:
|
INTEGRATED CIRCUIT HAVING OUTPUT TIMING CONTROL CIRCUIT AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
09049534
|
Filing Dt:
|
03/27/1998
|
Title:
|
DUAL SYSTEM PORTABLE ELECTRONIC COMMUNICATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/23/2000
|
Application #:
|
09052248
|
Filing Dt:
|
03/31/1998
|
Title:
|
DESIGN AND METHODOLOGY FOR MANUFACTURING DATA PROCESSING SYSTEMS HAVING MULTIPLE PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/1999
|
Application #:
|
09053896
|
Filing Dt:
|
04/02/1998
|
Title:
|
VOLTAGE RECOVERY CIRCUIT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
09054561
|
Filing Dt:
|
04/03/1998
|
Title:
|
METHOD OF FABRICATING A SEMICONDUCTOR DEVICE WITH A THINNED SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/05/2000
|
Application #:
|
09054810
|
Filing Dt:
|
04/03/1998
|
Title:
|
METHOD FOR PERFORMING BRANCH PREDICTION AND RESOLUTION OF TWO OR MORE BRANCH INSTRUCTIONS WITHIN TWO OR MORE BRANCH PREDICTION BUFFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09055119
|
Filing Dt:
|
04/03/1998
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD OF MAKING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09059818
|
Filing Dt:
|
04/14/1998
|
Title:
|
INTEGRATED CIRCUIT HAVING SINGLE PROGRAMMABLE PULL DEVICE CONFIGURED TO ENABLE/DISABLE FIRST FUNCTION IN FAVOR OF SECOND FUNCTION ACCORDING TO PREDETERMINED SCHEME BEFORE/AFTER RESET
|
|
|
Patent #:
|
|
Issue Dt:
|
02/06/2001
|
Application #:
|
09062571
|
Filing Dt:
|
04/20/1998
|
Title:
|
MULTI-WAY CACHE APPARATUS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09062952
|
Filing Dt:
|
04/20/1998
|
Title:
|
DATA PROCESSING SYSTEM HAVING SELECTABLE EXCEPTION TABLE RELOCATION AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/1999
|
Application #:
|
09064075
|
Filing Dt:
|
04/22/1998
|
Title:
|
TEMPERATURE DETECTION CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
09064076
|
Filing Dt:
|
04/22/1998
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A STACKED CAPACITOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2001
|
Application #:
|
09066012
|
Filing Dt:
|
04/24/1998
|
Title:
|
OPTIMIZATION OF ORDERED STORES ON A PIPELINED BUS VIA SELF-INITIATED RETRY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09066014
|
Filing Dt:
|
04/24/1998
|
Title:
|
MULTI-STAGE PIPELINED DATA COALESCING FOR IMPROVED FREQUENCY OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
11/07/2000
|
Application #:
|
09067102
|
Filing Dt:
|
04/27/1998
|
Title:
|
DEVELOPMENT INTERFACE FOR A DATA PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/02/2000
|
Application #:
|
09069338
|
Filing Dt:
|
04/29/1998
|
Title:
|
SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
09069348
|
Filing Dt:
|
04/29/1998
|
Title:
|
INTEGRATED TEMPERATURE SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09071323
|
Filing Dt:
|
05/01/1998
|
Title:
|
PROTECTION CIRCUIT FOR A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09072052
|
Filing Dt:
|
05/04/1998
|
Title:
|
ALIGNMENT METHOD FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
09072196
|
Filing Dt:
|
05/04/1998
|
Title:
|
SUPPORT STRUCTURE, ELECTRONIC ASSEMBLY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
09072256
|
Filing Dt:
|
05/04/1998
|
Title:
|
METHOD OF MAKING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
09072339
|
Filing Dt:
|
05/04/1998
|
Title:
|
3-D SMART POWER IC
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09076048
|
Filing Dt:
|
05/11/1998
|
Title:
|
BALL GRID ARRAY WITH RECESSED SOLDER BALLS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09076149
|
Filing Dt:
|
05/12/1998
|
Title:
|
METHOD AND APPARATUS FOR LEVERAGING HISTORY BITS TO OPTIMIZE MEMORY REFRESH PERFORMANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2000
|
Application #:
|
09076412
|
Filing Dt:
|
05/12/1998
|
Title:
|
CIRCUIT FOR TRACKING RAPID CHANGES IN MID-POINT VOLTAGE OF A DATA SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/2000
|
Application #:
|
09078159
|
Filing Dt:
|
05/13/1998
|
Title:
|
BUFFER CIRCUIT, MEMORY DEVICE, AND INTEGRATED CIRCUIT FOR RECEIVING DIGITAL SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2001
|
Application #:
|
09078786
|
Filing Dt:
|
05/14/1998
|
Title:
|
COUPLING NOISE REDUCTION TECHNIQUE USING RESET TIMING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09079843
|
Filing Dt:
|
05/15/1998
|
Title:
|
PHASE-LOCKED LOOP SYSTEM AND METHOD FOR MODIFYING AN OUTPUT TRANSITION TIME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
09080480
|
Filing Dt:
|
05/18/1998
|
Title:
|
ENHANCEMENT-MODE FERROELECTRIC SEMICONDUCTOR DEVICE HAVING NON-SELF- ALIGNED SOURCE/DRAIN IMPLANT REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09082213
|
Filing Dt:
|
05/20/1998
|
Title:
|
ELECTRICALLY PROGRAMMABLE MEMORY AND METHOD OF PROGRAMMING
|
|
|
Patent #:
|
|
Issue Dt:
|
11/14/2000
|
Application #:
|
09084280
|
Filing Dt:
|
05/26/1998
|
Title:
|
CAPPED SHALLOW TRENCH ISOLATION AND METHOD OF FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
|
Application #:
|
09088019
|
Filing Dt:
|
06/01/1998
|
Title:
|
SEMICONDUCTOR DEVICE AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/31/2000
|
Application #:
|
09088027
|
Filing Dt:
|
06/01/1998
|
Title:
|
METHOD OF CHANGING THE POWER DISSIPATION ACROSS AN ARRAY OF TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
09088356
|
Filing Dt:
|
06/01/1998
|
Title:
|
POWER AMPLIFIER OUTPUT MODULE FOR DUAL-MODE DIGITAL SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
09095504
|
Filing Dt:
|
06/10/1998
|
Title:
|
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2000
|
Application #:
|
09096049
|
Filing Dt:
|
06/11/1998
|
Title:
|
LOW-POWER DECIMATOR FOR AN OVERSAMPLED ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
|
09100669
|
Filing Dt:
|
06/19/1998
|
Title:
|
DATA PROCESSOR SYSTEM HAVING BRANCH CONTROL AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2001
|
Application #:
|
09102105
|
Filing Dt:
|
06/22/1998
|
Title:
|
METHOD AND APPARATUS FOR CREATING A VOLTAGE THRESHOLD IN A FET
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
09102267
|
Filing Dt:
|
06/22/1998
|
Title:
|
METHOD FOR MAKING A DUAL-THICKNESS GATE OXIDE LAYER USING A NITRIDE/OXIDE COMPOSITE REGION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/19/2002
|
Application #:
|
09103882
|
Filing Dt:
|
06/24/1998
|
Title:
|
APPARATUS FOR DETECTING A DIAPHRAGM FAILURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2001
|
Application #:
|
09106160
|
Filing Dt:
|
06/29/1998
|
Publication #:
|
|
Pub Dt:
|
08/16/2001
| | | | |
Title:
|
AIR BAG DEPLOYMENT SYSTEM AND METHOD FOR MONITORING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
03/13/2001
|
Application #:
|
09106552
|
Filing Dt:
|
06/29/1998
|
Title:
|
ELECTRONIC COMPONENT ASSEMBLY AND METHOD OF MAKING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/22/2000
|
Application #:
|
09107963
|
Filing Dt:
|
06/30/1998
|
Title:
|
CMOS SEMICONDUCTOR DEVICES AND METHOD OF FORMATION
|
|
|
Patent #:
|
|
Issue Dt:
|
09/12/2000
|
Application #:
|
09108157
|
Filing Dt:
|
06/30/1998
|
Title:
|
DATA PROCESSING SYSTEM AND METHOD FOR MAINTAINING TRANSLATION LOOKASIDE BUFFER TLB COHERENCY WITHOUT ENFORCING COMPLETE INSTRUCTION SERIALIZATION
|
|
|
Patent #:
|
|
Issue Dt:
|
06/26/2001
|
Application #:
|
09108361
|
Filing Dt:
|
07/01/1998
|
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR COMPONENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09109719
|
Filing Dt:
|
07/02/1998
|
Title:
|
ARRANGEMENT AND METHOD FOR PRODUCING A PLURALITY OF PULSE WIDTH MODULATED SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/23/2001
|
Application #:
|
09110289
|
Filing Dt:
|
07/06/1998
|
Title:
|
HIGH FREQUENCY DIFFERENTIAL TO SINGLE-ENDED CONVERTER
|
|
|
Patent #:
|
|
Issue Dt:
|
04/20/1999
|
Application #:
|
09110976
|
Filing Dt:
|
07/07/1998
|
Title:
|
LOW SUBTHRESHOLD LEAKAGE CURRENT HFET
|
|
|
Patent #:
|
|
Issue Dt:
|
05/01/2001
|
Application #:
|
09112533
|
Filing Dt:
|
07/09/1998
|
Title:
|
APPARATUS WITH FAILURE RECOVERY AND METHOD THEREFORE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09112733
|
Filing Dt:
|
07/09/1998
|
Title:
|
INTEGRATION OF A RECEIVER FRONT-END IN MULTILAYER CERAMIC INTEGRATED CIRCUIT TECHNOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
09114193
|
Filing Dt:
|
07/18/1998
|
Title:
|
ACCELERATION SENSING DEVICE AND METHOD OF OPERATION AND FORMING
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09118877
|
Filing Dt:
|
07/20/1998
|
Title:
|
SEMICONDUCTOR DEVICE HAVING A METAL CONTAINING LAYER OVERLYING A GATE DELECTRIC
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2000
|
Application #:
|
09119945
|
Filing Dt:
|
07/21/1998
|
Title:
|
PRECISION HYSTERESIS CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
09120755
|
Filing Dt:
|
07/22/1998
|
Title:
|
ELECTRONIC DEVICE AND METHOD FOR FORMING A MEMBRANE FOR AN ELECTRONIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
09121068
|
Filing Dt:
|
07/21/1998
|
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2000
|
Application #:
|
09121700
|
Filing Dt:
|
07/24/1998
|
Title:
|
OSCILLATOR AMPLIFIER WITH FREQUENCY BASED DIGITAL MULTI-DISCRETE-LEVEL GAIN CONTROL AND METHOD OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/15/2001
|
Application #:
|
09124592
|
Filing Dt:
|
07/29/1998
|
Title:
|
NON-VOLATILE MEMORY CELL AND METHOD FOR MANUFACTURING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
06/20/2000
|
Application #:
|
09124720
|
Filing Dt:
|
07/30/1998
|
Title:
|
METHOD AND APPARATUS FOR STRESS RELIEF IN SOLDER BUMP FORMATION ON A SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/29/2001
|
Application #:
|
09127459
|
Filing Dt:
|
07/31/1998
|
Title:
|
METHOD AND APPARATUS FOR TRANSFERRING DATA ON A SPLIT BUS IN A DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2000
|
Application #:
|
09128022
|
Filing Dt:
|
08/03/1998
|
Title:
|
SEMICONDUCTOR PACKAGE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09128025
|
Filing Dt:
|
08/03/1998
|
Title:
|
MINIMIZING RECOVERY TIME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09133041
|
Filing Dt:
|
08/12/1998
|
Title:
|
HIGH BREAKDOWN VOLTAGE RESURF HFET
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09133226
|
Filing Dt:
|
08/13/1998
|
Title:
|
SYSTEM FOR ADDRESS INITIALIZATION OF GENERIC NODES IN A DISTRIBUTED COMMAND AND CONTROL SYSTEM AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/1999
|
Application #:
|
09135634
|
Filing Dt:
|
08/17/1998
|
Title:
|
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A CAPACITOR STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09138909
|
Filing Dt:
|
08/24/1998
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
Title:
|
LINKED LIST MEMORY AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09144223
|
Filing Dt:
|
08/31/1998
|
Title:
|
CIRCUIT ARRANGEMENT TO COMPENSATE NON-LINEARITIES IN A RESISTOR, AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2001
|
Application #:
|
09145778
|
Filing Dt:
|
08/26/1998
|
Title:
|
METHOD AND SYSTEM FOR ASYNCHRONOUS SAMPLE RATE CONVERSION USING A NOISE-SHAPED NUMERICALLY CONTROL OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/04/2000
|
Application #:
|
09149520
|
Filing Dt:
|
09/08/1998
|
Title:
|
AMPLIFIER WITH ACTIVE BIAS COMPENSATION AND METHOD FOR ADJUSTING QUIESCENT CURRENT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2000
|
Application #:
|
09163877
|
Filing Dt:
|
09/30/1998
|
Title:
|
QUANTUM RANDOM ADDRESS MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
09163878
|
Filing Dt:
|
09/30/1998
|
Title:
|
QUANTUM RANDOM ADDRESS MEMORY WITH NANO-DIODE MIXER
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2000
|
Application #:
|
09163880
|
Filing Dt:
|
09/30/1998
|
Title:
|
QUANTUM RANDOM ADDRESS MEMORY WITH MAGNETIC READOUT AND/OR NANO-MEMORY ELEMENTS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/14/1999
|
Application #:
|
09166756
|
Filing Dt:
|
10/05/1998
|
Title:
|
LINEAR LOW NOISE PHASE-FREQUENCY DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09187464
|
Filing Dt:
|
11/04/1998
|
Title:
|
MID SUPPLY REFERENCE GENERATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09188266
|
Filing Dt:
|
11/09/1998
|
Title:
|
CIRCUIT AND METHOD OF FREQUENCY SYNTHESIZER CONTROL WITH A SERIAL PERIPHERAL INTERFACE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2000
|
Application #:
|
09191353
|
Filing Dt:
|
11/13/1998
|
Title:
|
INTEGRATED CIRCUIT HAVING A SUPPORT STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/11/2001
|
Application #:
|
09201392
|
Filing Dt:
|
11/30/1998
|
Title:
|
CIRCUIT AND METHOD FOR REDUCING PARASITIC BIPOLAR EFFECTS DURING ELECTROSTATIC DISCHARGES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2001
|
Application #:
|
09203770
|
Filing Dt:
|
12/02/1998
|
Title:
|
METHOD AND APPARATUS FOR MAXIMUM LIKELIHOOD SEQUENCE DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2000
|
Application #:
|
09204818
|
Filing Dt:
|
12/03/1998
|
Title:
|
MULTI-CHIP ASSEMBLY HAVING A HEAT SINK AND METHOD THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2001
|
Application #:
|
09206715
|
Filing Dt:
|
12/07/1998
|
Title:
|
PROCESS FOR FORMING A COMBINATION HARDMASK AND ANTIREFLECTIVE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2000
|
Application #:
|
09207869
|
Filing Dt:
|
12/08/1998
|
Title:
|
CIRCUIT AND METHOD OF GENERATING A PHASE LOCKED LOOP SIGNAL HAVING AN OFFSET REFERENCE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2001
|
Application #:
|
09208924
|
Filing Dt:
|
12/10/1998
|
Title:
|
A METHOD OF MANUFACTURING A SENSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2000
|
Application #:
|
09210827
|
Filing Dt:
|
12/14/1998
|
Title:
|
MEMORY DATA BUS ARCHITECTURE AND METHOD OF CONFIGURING MULTI- WIDE WORD MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/1999
|
Application #:
|
09215933
|
Filing Dt:
|
12/18/1998
|
Title:
|
PROGRAMMING METHOD FOR NONVOLATILE MEMORIES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
09218515
|
Filing Dt:
|
12/22/1998
|
Title:
|
CONTROLLER CIRCUIT FOR TRANSFERRING A SET OF PERIPHERAL DATA WORDS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/1999
|
Application #:
|
09224823
|
Filing Dt:
|
01/04/1999
|
Title:
|
LEADFRAME, METHOD OF MANUFACTURING A LEADFRAME, AND METHOD OF PACKAGING AN ELECTRONIC COMPONENT UTILIZING THE LEADFRAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2001
|
Application #:
|
09226914
|
Filing Dt:
|
01/05/1999
|
Title:
|
METHOD AND APPARATUS FOR RECONSTRUCTING A LINEAR PREDICTION FILTER EXCITATION SIGNAL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2001
|
Application #:
|
09231009
|
Filing Dt:
|
01/14/1999
|
Title:
|
CLOCK RECOVERY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09232253
|
Filing Dt:
|
01/14/1999
|
Title:
|
DISTRIBUTED AIRBAG FIRING SYSTEM AND INTERFACE CIRCUIT THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2000
|
Application #:
|
09235731
|
Filing Dt:
|
01/22/1999
|
Title:
|
ELECTRONIC COMPONENT FOR MEASURING ACCELERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2001
|
Application #:
|
09236064
|
Filing Dt:
|
01/25/1999
|
Title:
|
SAMPLE AND HOLD CIRCUIT AND METHOD THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/17/2000
|
Application #:
|
09238773
|
Filing Dt:
|
01/27/1999
|
Title:
|
COMPARATOR CIRCUIT AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2001
|
Application #:
|
09241161
|
Filing Dt:
|
02/01/1999
|
Title:
|
MULTI-MASTER BUS SYSTEM PERFORMING ATOMIC TRANSACTIONS AND METHOD OF OPERATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09246633
|
Filing Dt:
|
02/08/1999
|
Title:
|
METHOD FOR TESTING A SEMICONDUCTOR DIE USING WELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2001
|
Application #:
|
09248551
|
Filing Dt:
|
02/11/1999
|
Title:
|
METHOD AND CIRCUIT FOR TESTING AN ANALOG-TO-DIGITAL CONVERTER MODULE ON A DATA PROCESSING SYSTEM HAVING AN INTERMODULE BUS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09251216
|
Filing Dt:
|
02/16/1999
|
Title:
|
FINITE IMPULSE RESPONSE FILTER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
07/17/2001
|
Application #:
|
09253875
|
Filing Dt:
|
02/22/1999
|
Title:
|
PROCESS FOR FORMING SEMICONDUCTOR DEVICE WITH THICK AND THIN FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09253876
|
Filing Dt:
|
02/22/1999
|
Publication #:
|
|
Pub Dt:
|
08/01/2002
| | | | |
Title:
|
METHOD AND APPARATUS FOR EXTENDING FATIGUE LIFE OF SOLDER JOINTS SEMICONDUCTOR DEVICE
|
|