|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/07/2002
|
Application #:
|
09917973
|
Filing Dt:
|
07/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/07/2002
| | | | |
|
Title:
|
METHOD OF USING A BANDGAP VOLTAGE COMPARATOR IN A LOW VOLTAGE DETECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
09919512
|
Filing Dt:
|
07/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SWITCHED MODE DIGITAL LOGIC METHOD, SYSTEM AND APPARATUS FOR DIRECTLY DRIVING LCD GLASS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/13/2006
|
Application #:
|
09925135
|
Filing Dt:
|
08/08/2001
|
|
Title:
|
STRUCTURE AND METHOD FOR LINKING SCATTER/GATHER LIST SEGMENTS FOR HOST ADAPTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
|
Application #:
|
09925289
|
Filing Dt:
|
08/08/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/21/2002
| | | | |
|
Title:
|
POWER MOS DEVICE WITH ASYMMETRICAL CHANNEL STRUCTURE FOR ENHANCED LINEAR OPERATION CAPABILITY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2002
|
Application #:
|
09927840
|
Filing Dt:
|
08/10/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2002
| | | | |
|
Title:
|
RADIO FREQUENCY IDENTIFICATION TAG ON A SINGLE LAYER SUBSTRATE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09929370
|
Filing Dt:
|
08/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/04/2002
| | | | |
|
Title:
|
ARRAY ARCHITECTURE AND OPERATING METHODS FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/15/2004
|
Application #:
|
09929542
|
Filing Dt:
|
08/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/11/2002
| | | | |
|
Title:
|
ARRAY ARCHITECTURE AND OPERATING METHODS FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY INTEGRATED CIRCUIT SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
09929703
|
Filing Dt:
|
08/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/18/2002
| | | | |
|
Title:
|
METHOD FOR TRANSMITTING A PLURALITY OF INFORMATION SYMBOLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09930811
|
Filing Dt:
|
08/15/2001
|
|
Title:
|
METHOD AND APPARATUS FOR STRAPPING A PLURALITY OF POLYSILICON LINES IN A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09931956
|
Filing Dt:
|
08/16/2001
|
|
Publication #:
|
|
Pub Dt:
|
07/11/2002
| | | | |
|
Title:
|
A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH FLOATING GATES HAVING MULTIPLE SHARP EDGES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2003
|
Application #:
|
09940006
|
Filing Dt:
|
08/27/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/14/2002
| | | | |
|
Title:
|
CAPACITIVE POSITION SENSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
09943435
|
Filing Dt:
|
08/02/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/06/2003
| | | | |
|
Title:
|
INDUCTORLESS METHOD AND APPARATUS FOR DRIVING ELECTROLUMINESCENT PANELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
09943804
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/17/2002
| | | | |
|
Title:
|
INTEGRATED IC CHIP PACKAGE FOR ELECTRONIC IMAGE SENSOR DIE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/13/2007
|
Application #:
|
09943886
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
TRANSMIT VIRTUAL CONCATENATION PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09944347
|
Filing Dt:
|
08/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/28/2002
| | | | |
|
Title:
|
METAL REDISTRIBUTION LAYER HAVING SOLDERABLE PADS AND WIRE BONDABLE PADS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/13/2003
|
Application #:
|
09951280
|
Filing Dt:
|
09/13/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
ELECTRONIC CIRCUIT AND METHOD FOR TESTING AND REFRESHING NON-VOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2003
|
Application #:
|
09954387
|
Filing Dt:
|
09/10/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
|
Title:
|
INTEGRATED CIRCUIT FOR CONCURRENT FLASH MEMORY WITH UNEVEN ARRAY ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09955255
|
Filing Dt:
|
09/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
LOW NOISE METHOD AND APPARATUS FOR DRIVING ELECTROLUMINESCENT PANELS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
09955278
|
Filing Dt:
|
09/11/2001
|
|
Title:
|
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/08/2003
|
Application #:
|
09955563
|
Filing Dt:
|
09/17/2001
|
|
Title:
|
PROGRAMMABLE ANALOG TAPPED DELAY LINE FILTER HAVING CASCADED DIFFERENTIAL DELAY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/11/2006
|
Application #:
|
09957061
|
Filing Dt:
|
09/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/20/2003
| | | | |
|
Title:
|
SERIAL COMMUNICATION DEVICE WITH DYNAMIC FILTER ALLOCATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
09957097
|
Filing Dt:
|
09/19/2001
|
|
Title:
|
METHOD AND APPARATUS FOR A VIRTUAL MEMORY FILE SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/13/2005
|
Application #:
|
09957283
|
Filing Dt:
|
09/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/05/2004
| | | | |
|
Title:
|
REGISTER BANK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
09957289
|
Filing Dt:
|
09/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
SERIAL COMMUNICATION DEVICE WITH MULTI-MODE OPERATION OF MESSAGE RECEIVE BUFFERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
09960544
|
Filing Dt:
|
09/21/2001
|
|
Title:
|
REPROGRAMMABLE FUSE AND METHOD OF OPERATING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
09960589
|
Filing Dt:
|
09/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
FOLDED CASCODE HIGH VOLTAGE OPERATIONAL AMPLIFIER WITH CLASS AB SOURCE FOLLOWER OUTPUT STAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09961517
|
Filing Dt:
|
09/24/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
LOW-POWER OUTPUT CONTROLLED CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2005
|
Application #:
|
09962980
|
Filing Dt:
|
09/21/2001
|
|
Title:
|
METHOD AND APPARATUS FOR EXTENDING STORAGE FUNCTIONALITY AT THE BIOS LEVEL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/08/2002
|
Application #:
|
09964762
|
Filing Dt:
|
09/27/2001
|
|
Title:
|
OPERATIONAL AMPLIFIER THAT IS CONFIGURABLE AS A PROGRAMMABLE GAIN AMPLIFIER OF A GENERAL PURPOSE AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/10/2006
|
Application #:
|
09971748
|
Filing Dt:
|
10/04/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/11/2002
| | | | |
|
Title:
|
PHASE-LOCKED LOOP CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2003
|
Application #:
|
09972179
|
Filing Dt:
|
10/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/31/2002
| | | | |
|
Title:
|
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS, AND A MEMORY ARRAY MADE THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
09972558
|
Filing Dt:
|
10/08/2001
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
|
Title:
|
AUDIO SPECTRUM ANALYZER IMPLEMENTED WITH A MINIMUM NUMBER OF MULTIPLY OPERATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2003
|
Application #:
|
09972563
|
Filing Dt:
|
10/08/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/07/2002
| | | | |
|
Title:
|
INDEPENDENTLY PROGRAMMABLE MEMORY SEGMENTS WITHIN A PMOS ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY ARRAY ACHIEVED BY N-WELL SEPARATION AND METHOD THEREFOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/30/2004
|
Application #:
|
09976511
|
Filing Dt:
|
10/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2002
| | | | |
|
Title:
|
MONOLITHIC LOSS-OF-SIGNAL DETECT CIRCUITRY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2003
|
Application #:
|
09977652
|
Filing Dt:
|
10/15/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/31/2002
| | | | |
|
Title:
|
PROGRAMMABLE POWER SUPPLY AND BROWNOUT DETECTOR METHOD FOR A MICROPROCESSOR POWER SUPPLY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/12/2005
|
Application #:
|
09982413
|
Filing Dt:
|
10/17/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
|
Title:
|
SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND VERTICAL WORD LINE TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
09999709
|
Filing Dt:
|
10/30/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
ON-CHIP INDUCTOR USING ACTIVE MAGNETIC ENERGY RECOVERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
10001557
|
Filing Dt:
|
10/24/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/30/2002
| | | | |
|
Title:
|
SELF-ALIGNED NON-VOLATILE MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2003
|
Application #:
|
10002036
|
Filing Dt:
|
11/01/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
NON-VOLATILE FLASH FUSE ELEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/22/2003
|
Application #:
|
10005317
|
Filing Dt:
|
11/06/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/15/2003
| | | | |
|
Title:
|
DUAL MODE HIGH VOLTAGE POWER SUPPLY FOR PROVIDING INCREASED SPEED IN PROGRAMMING DURING TESTING OF LOW VOLTAGE NON-VOLATILE MEMORIES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
|
Application #:
|
10010693
|
Filing Dt:
|
12/05/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/05/2002
| | | | |
|
Title:
|
A CURRENT MEASURING TERMINAL ASSEMBLY FOR A BATTERY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2005
|
Application #:
|
10010846
|
Filing Dt:
|
12/05/2001
|
|
Title:
|
METHOD AND APPARATUS FOR RAID LOAD BALANCING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2009
|
Application #:
|
10014664
|
Filing Dt:
|
12/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
METHOD OF AND APPARATUS FOR TRANSFERRING DATA
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
10017608
|
Filing Dt:
|
12/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/19/2003
| | | | |
|
Title:
|
SYSTEM AND METHOD FOR PROVIDING ASYNCHRONOUS SRAM FUNCTIONALITY WITH A DRAM ARRAY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10020491
|
Filing Dt:
|
12/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/12/2002
| | | | |
|
Title:
|
AUTOMATIC LOAD BALANCING IN SWITCH FABRICS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2007
|
Application #:
|
10022040
|
Filing Dt:
|
12/17/2001
|
|
Title:
|
ASYNCHRONOUS FAULT-TOLERANT ENCLOSURE SERVICES INTERFACE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
10022314
|
Filing Dt:
|
12/18/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/22/2002
| | | | |
|
Title:
|
ELECTRICALLY-ERASEABLE PROGRAMMABLE READ-ONLY MEMORY HAVING REDUCED-PAGE-SIZE PROGRAM AND ERASE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
10024871
|
Filing Dt:
|
12/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR END OF DISCHARGE INDICATION BASED ON CRITICAL ENERGY REQUIREMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10027665
|
Filing Dt:
|
12/20/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/26/2003
| | | | |
|
Title:
|
METHOD AND SYSTEM FOR DYNAMICALLY CLOCKING DIGITAL SYSTEMS BASED ON POWER USAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2003
|
Application #:
|
10039916
|
Filing Dt:
|
10/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
HIGH VOLTAGE BIT/COLUMN LATCH FOR VCC OPERATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2003
|
Application #:
|
10040724
|
Filing Dt:
|
10/31/2001
|
|
Publication #:
|
|
Pub Dt:
|
05/01/2003
| | | | |
|
Title:
|
SENICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS AND STRAP REGIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
10044273
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
HIGH VOLTAGE GENERATION AND REGULATION SYSTEM FOR DIGITAL MULTILEVEL NONVOLATILE MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/02/2004
|
Application #:
|
10044821
|
Filing Dt:
|
01/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/10/2003
| | | | |
|
Title:
|
BIAS DISTRIBUTION NETWORK FOR DIGITAL MULTILEVEL NONVOLATILE FLASH MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
10047166
|
Filing Dt:
|
01/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/23/2002
| | | | |
|
Title:
|
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
|
10051907
|
Filing Dt:
|
01/16/2002
|
|
Title:
|
RAID 1 WRITE MIRRORING METHOD FOR HOST ADAPTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2004
|
Application #:
|
10051960
|
Filing Dt:
|
01/16/2002
|
|
Title:
|
RAID 1 READ MIRRORING METHOD FOR HOST ADAPTERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
10052278
|
Filing Dt:
|
01/17/2002
|
|
Title:
|
HIGH SPEED BIAS VOLTAGE GENERATING CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
10056412
|
Filing Dt:
|
01/22/2002
|
|
Title:
|
EXTENDED FREQUENCY RANGE VOLTAGE-CONTROLLED OSCILLATOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2003
|
Application #:
|
10071605
|
Filing Dt:
|
02/08/2002
|
|
Publication #:
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|
Pub Dt:
|
09/26/2002
| | | | |
|
Title:
|
DEVICE GENERATING A PRECISE REFERENCE VOLTAGE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/19/2002
|
Application #:
|
10071612
|
Filing Dt:
|
02/08/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
SLAVED SUPPLY FOR SERIAL LINK, OF MASTER SLAVE TYPE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2005
|
Application #:
|
10071929
|
Filing Dt:
|
02/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/15/2002
| | | | |
|
Title:
|
DETECTING REDIRECTION DURING DATA TRANSMISSION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/21/2003
|
Application #:
|
10073036
|
Filing Dt:
|
02/12/2002
|
|
Title:
|
VARIABLE READ/WRITE MARGIN HIGH-PERFORMANCE SOFT-ERROR TOLERANT SRAM BIT CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2006
|
Application #:
|
10077466
|
Filing Dt:
|
02/14/2002
|
|
Title:
|
METHOD FOR PROVIDING A CONFIGURATION EXTENSIBLE MARKUP LANGUAGE (XML) PAGE TO A USER FOR CONFIGURING AN XML BASED STORAGE HANDLING CONTOLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/03/2009
|
Application #:
|
10081152
|
Filing Dt:
|
02/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR SCHEDULING DATA ON A MEDIUM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/25/2005
|
Application #:
|
10086937
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
ULTRA-HIGH LINEARITY RF PASSIVE MIXER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/22/2006
|
Application #:
|
10086953
|
Filing Dt:
|
02/28/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/31/2002
| | | | |
|
Title:
|
ON-CHIP INTER-SUBSYSTEM COMMUNICATION INCLUDING CONCURRENT DATA TRAFFIC ROUTING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/12/2007
|
Application #:
|
10096442
|
Filing Dt:
|
03/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/17/2002
| | | | |
|
Title:
|
TIME BASED PACKET SCHEDULING AND SORTING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/27/2004
|
Application #:
|
10096739
|
Filing Dt:
|
03/12/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/18/2002
| | | | |
|
Title:
|
METHOD OF CONTROLLING THE TURN OFF CHARACTERISTICS OF A VCSEL DIODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/05/2002
|
Application #:
|
10100535
|
Filing Dt:
|
03/18/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/08/2002
| | | | |
|
Title:
|
HIGH-SPEED, LOW-POWER SAMPLE AND HOLD CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2005
|
Application #:
|
10105741
|
Filing Dt:
|
03/20/2002
|
|
Publication #:
|
|
Pub Dt:
|
09/25/2003
| | | | |
|
Title:
|
A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH BURIED BIT-LINE AND RAISED SOURCE LINE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10108063
|
Filing Dt:
|
03/26/2002
|
|
Title:
|
METHOD AND APPARATUS FOR COMBINATION HOST BUS ADAPTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/06/2007
|
Application #:
|
10113797
|
Filing Dt:
|
03/29/2002
|
|
Title:
|
GENERIC PACKET PARSER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2005
|
Application #:
|
10115734
|
Filing Dt:
|
04/02/2002
|
|
Title:
|
METHOD AND APPARATUS FOR MINIMIZING OPTION ROM BIOS CODE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/19/2003
|
Application #:
|
10121377
|
Filing Dt:
|
04/11/2002
|
|
Title:
|
SINGLE-ENDED CURRENT SENSE AMPLIFIER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/16/2007
|
Application #:
|
10126466
|
Filing Dt:
|
04/19/2002
|
|
Title:
|
DATA STREAM PERMUTATION APPLICABLE TO LARGE DIMENSIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2004
|
Application #:
|
10131064
|
Filing Dt:
|
04/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR HIGH-VOLTAGE BATTERY ARRAY MONITORING SENSORS NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2006
|
Application #:
|
10131387
|
Filing Dt:
|
04/23/2002
|
|
Title:
|
METHOD AND APPARATUS FOR DUAL PORTING A SINGLE PORT SERIAL ATA DISK DRIVE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/22/2007
|
Application #:
|
10132788
|
Filing Dt:
|
04/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/30/2003
| | | | |
|
Title:
|
HIGH THROUGHPUT AES ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/19/2007
|
Application #:
|
10133812
|
Filing Dt:
|
04/24/2002
|
|
Title:
|
METHOD FOR MANAGING MEMORY SPACE DURING SYSTEM INITIALIZATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
10135916
|
Filing Dt:
|
04/29/2002
|
|
Title:
|
METHOD OF ERASING NONVOLATILE TUNNELING INJECTOR MEMORY CELL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
|
10136797
|
Filing Dt:
|
04/30/2002
|
|
Title:
|
METHOD OF FORMING A SEMICONDUCTOR ARRAY OF FLOATING GATE MEMORY CELLS HAVING STRAP REGIONS AND A PERIPHERAL LOGIC DEVICE REGION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/16/2007
|
Application #:
|
10138496
|
Filing Dt:
|
05/06/2002
|
|
Publication #:
|
|
Pub Dt:
|
02/20/2003
| | | | |
|
Title:
|
DATA SWITCHING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2011
|
Application #:
|
10139338
|
Filing Dt:
|
05/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
A SYSTEM AND A METHOD FOR MAINTAINING QUALITY OF SERVICE THROUGH A CONGESTED NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
10141051
|
Filing Dt:
|
05/07/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/13/2003
| | | | |
|
Title:
|
METHOD AND APPARATUS FOR EFFICIENTLY DRIVING A LOW-VOLTAGE DEVICE FROM A WIDE-RANGE INPUT SUPPLY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10143225
|
Filing Dt:
|
05/09/2002
|
|
Title:
|
ULTRA SMALL THIN WINDOWS IN FLOATING GATE TRANSISTORS DEFINED BY LOST NITRIDE SPACERS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/04/2005
|
Application #:
|
10145160
|
Filing Dt:
|
05/13/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/21/2002
| | | | |
|
Title:
|
Tuned antenna resonant circuit of a passive transponder
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/16/2004
|
Application #:
|
10146569
|
Filing Dt:
|
05/14/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR ARRAY OF NON-VOLATILE MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/02/2007
|
Application #:
|
10147699
|
Filing Dt:
|
05/16/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/20/2003
| | | | |
|
Title:
|
RF PASSIVE MIXER WITH DC OFFSET TRACKING AND LOCAL OSCILLATOR DC BIAS LEVEL-SHIFTING NETWORK FOR REDUCING EVEN-ORDER DISTORTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2003
|
Application #:
|
10147959
|
Filing Dt:
|
05/15/2002
|
|
Title:
|
METHOD AND APPARATUS FOR PROGRAMMING NON-VOLATILE MEMORY CELLS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/29/2005
|
Application #:
|
10153549
|
Filing Dt:
|
05/21/2002
|
|
Title:
|
SOFTWARE BASED SYSTEM AND METHOD FOR I/O CHIP HIDING OF PROCESSOR BASED CONTROLLERS FROM OPERATING SYSTEM
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2003
|
Application #:
|
10159648
|
Filing Dt:
|
05/29/2002
|
|
Title:
|
DUAL-MIXER LOSS OF SIGNAL DETECTION CIRCUIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/24/2004
|
Application #:
|
10167959
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
PROCESS FOR MANUFACTURING A DMOS TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2005
|
Application #:
|
10167961
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
PROCESS FOR MANUFACTURING A DMOS TRANSISTOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2005
|
Application #:
|
10170098
|
Filing Dt:
|
06/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/02/2003
| | | | |
|
Title:
|
PROCESS FOR DOPING A SEMICONDUCTOR BODY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2004
|
Application #:
|
10183834
|
Filing Dt:
|
06/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/03/2003
| | | | |
|
Title:
|
SELF ALIGNED METHOD OF FORMING A SEMICONDUCTOR MEMORY ARRAY OF FLOATING GATE MEMORY CELLS WITH HORIZONTALLY ORIENTED EDGES, AND A MEMORY ARRAY THEREBY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/06/2007
|
Application #:
|
10185307
|
Filing Dt:
|
06/27/2002
|
|
Title:
|
METHOD AND APPARATUS FOR RAID ON MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2006
|
Application #:
|
10186102
|
Filing Dt:
|
06/27/2002
|
|
Title:
|
METHOD AND STRUCTURE FOR HANDLING PACKETIZED SCSI PROTOCOL DATA OVERRUNS IN A MULTI-DATA CHANNEL HOST ADAPTER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/24/2006
|
Application #:
|
10190348
|
Filing Dt:
|
07/05/2002
|
|
Title:
|
APPARATUS AND METHOD FOR EFFICIENT DATA TRANSPORT USING TRANSPARENT FRAMING PROCEDURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/01/2005
|
Application #:
|
10192291
|
Filing Dt:
|
07/09/2002
|
|
Publication #:
|
|
Pub Dt:
|
07/24/2003
| | | | |
|
Title:
|
An array of floating gate memory cells having strap regions and a peripheral logic device region
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/03/2007
|
Application #:
|
10193131
|
Filing Dt:
|
07/12/2002
|
|
Title:
|
HIGH SPEED I-O LOOPBACK TESTING WITH LOW SPEED DC TEST CAPABILITY
|
|
