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Patent #:
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|
Issue Dt:
|
06/28/2005
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Application #:
|
09627703
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Filing Dt:
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07/28/2000
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Title:
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NON-VOLATILE MEMORY WITH FUNCTIONAL CAPABILITY OF SIMULTANEOUS MODIFICATION OF THE CONTENT AND BURST MODE READ OR PAGE MODE READ
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Patent #:
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|
Issue Dt:
|
05/28/2002
|
Application #:
|
09628145
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Filing Dt:
|
07/28/2000
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Title:
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ARRAY ORGANIZATION FOR HIGH-PERFORMANCE MEMORY DEVICES
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Patent #:
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|
Issue Dt:
|
06/12/2001
|
Application #:
|
09628183
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Filing Dt:
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07/28/2000
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Title:
|
Protection after brown out in a synchronous memory
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Patent #:
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|
Issue Dt:
|
04/02/2002
|
Application #:
|
09628197
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Filing Dt:
|
07/28/2000
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Title:
|
Address decoding in multiple-bank memory architectures
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Patent #:
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|
Issue Dt:
|
11/12/2002
|
Application #:
|
09628527
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Filing Dt:
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07/31/2000
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Title:
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FABRICATION OF SEMICONDUCTOR GETTERING STRUCTURES BY ION IMPLANTATION
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Patent #:
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|
Issue Dt:
|
01/21/2003
|
Application #:
|
09628620
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Filing Dt:
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07/31/2000
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Title:
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FABRICATION OF SEMICONDUCTOR GETTERING STRUCTURES BY ION IMPLANTATION
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Patent #:
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|
Issue Dt:
|
05/14/2002
|
Application #:
|
09628833
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Filing Dt:
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07/31/2000
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Title:
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Selectively adjusting surface tension of soldermask material
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Patent #:
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|
Issue Dt:
|
04/22/2003
|
Application #:
|
09628913
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Filing Dt:
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07/31/2000
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Title:
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SACRIFICE READ TEST MODE
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Patent #:
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|
Issue Dt:
|
08/20/2002
|
Application #:
|
09629229
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Filing Dt:
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07/31/2000
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Title:
|
ENABLING CIRCUIT FOR OUTPUT DEVICES IN ELECTRONIC MEMORIES
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|
Patent #:
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|
Issue Dt:
|
03/18/2003
|
Application #:
|
09629395
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Filing Dt:
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08/01/2000
|
Title:
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METHOD OF FORMING A CIRCUITRY FABRICATION MASK HAVING A SUBTRACTIVE ALTERNATING PHASE SHIFT REGION
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Patent #:
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|
Issue Dt:
|
09/18/2001
|
Application #:
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09629573
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Filing Dt:
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07/31/2000
|
Title:
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Method and apparatus for multiple row activation in memory devices
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|
Patent #:
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|
Issue Dt:
|
08/20/2002
|
Application #:
|
09629602
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Filing Dt:
|
07/31/2000
|
Title:
|
APPARATUS AND STRUCTURE FOR RAPID ENABLEMENT
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|
Patent #:
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|
Issue Dt:
|
08/28/2001
|
Application #:
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09629998
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Filing Dt:
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08/01/2000
|
Title:
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Multiple step methods for forming conformal layers
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Patent #:
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Issue Dt:
|
11/19/2002
|
Application #:
|
09630110
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Filing Dt:
|
08/01/2000
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Title:
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ANIMATION PACKAGER FOR AN ON-LINE BOOK
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Patent #:
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|
Issue Dt:
|
03/18/2003
|
Application #:
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09630549
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Filing Dt:
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08/01/2000
|
Title:
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LOW LOSS HIGH Q INDUCTOR
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Patent #:
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|
Issue Dt:
|
03/26/2002
|
Application #:
|
09630933
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Filing Dt:
|
08/02/2000
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Title:
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Flow process for producing non-volatile memories with differentiated removal of the sacrificial oxide
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|
Patent #:
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|
Issue Dt:
|
04/29/2003
|
Application #:
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09631003
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Filing Dt:
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08/02/2000
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Title:
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ANODICALLY-BONDED ELEMENTS FOR FLAT PANEL DISPLAYS
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Patent #:
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|
Issue Dt:
|
04/02/2002
|
Application #:
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09631187
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Filing Dt:
|
08/02/2000
|
Title:
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METHOD FOR PROGRAMMING MULTI-LEVEL NON-VOLATILE MEMORIES BY CONTROLLING THE GATE VOLTAGE
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Patent #:
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Issue Dt:
|
07/23/2002
|
Application #:
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09631259
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Filing Dt:
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08/02/2000
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Title:
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BALL ARRAY LAYOUT
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Patent #:
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Issue Dt:
|
05/06/2003
|
Application #:
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09631329
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Filing Dt:
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08/03/2000
|
Title:
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METHOD OF PASSIVATING AN OXIDE SURFACE SUBJECTED TO A CONDUCTIVE MATERIAL ANNEAL
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Patent #:
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|
Issue Dt:
|
08/19/2003
|
Application #:
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09632087
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Filing Dt:
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08/02/2000
|
Title:
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LOW PROFILE BALL GRID ARRAY PACKAGE
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Patent #:
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|
Issue Dt:
|
02/11/2003
|
Application #:
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09632088
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Filing Dt:
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08/02/2000
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Title:
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ACID BLEND FOR REMOVING ETCH RESIDUE
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Patent #:
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|
Issue Dt:
|
08/21/2001
|
Application #:
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09632234
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Filing Dt:
|
08/04/2000
|
Title:
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Methods of reducing corrosion of materials, methods of protecting aluminum within aluminum-comprising layers from electrochemical degradation during semiconductor processing, and semiconductor processing methods of forming aluminum-comprising lines
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|
Patent #:
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|
Issue Dt:
|
11/19/2002
|
Application #:
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09632493
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Filing Dt:
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08/03/2000
|
Title:
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METHOD FOR GENERATING MEMORY ADDRESSES FOR TESTING MEMORY DEVICES
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Patent #:
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|
Issue Dt:
|
09/24/2002
|
Application #:
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09632830
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Filing Dt:
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08/07/2000
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Title:
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SELECTIVE CAP LAYERS OVER RECESSED POLYSILICON PLUGS
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Patent #:
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|
Issue Dt:
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11/20/2001
|
Application #:
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09633334
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Filing Dt:
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08/07/2000
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Title:
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Row decoding circuit for a semiconductor non-volatile electrically programmable memory and corresponding method
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Patent #:
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|
Issue Dt:
|
09/20/2005
|
Application #:
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09633375
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Filing Dt:
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08/07/2000
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Title:
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CIRCUIT AND METHOD FOR MEASURING AND FORCING AN INTERNAL VOLTAGE OF AN INTEGRATED CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
11/19/2002
|
Application #:
|
09633555
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Filing Dt:
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08/07/2000
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Title:
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SEMICONDUCTOR PACKAGE HAVING METAL FOIL DIE MOUNTING PLATE
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|
Patent #:
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|
Issue Dt:
|
12/09/2003
|
Application #:
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09633556
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Filing Dt:
|
08/07/2000
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Title:
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METHODS OF INCORPORATING NITROGEN INTO SILICON-OXIDE-CONTAINING LAYERS
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Patent #:
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|
Issue Dt:
|
02/26/2002
|
Application #:
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09633925
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Filing Dt:
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08/08/2000
|
Title:
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Gate coupled voltage support for an output driver circuit
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|
Patent #:
|
|
Issue Dt:
|
02/26/2002
|
Application #:
|
09634069
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Filing Dt:
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08/08/2000
|
Title:
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Cancellation of redundant elements with a cancel bank
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|
Patent #:
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|
Issue Dt:
|
04/01/2003
|
Application #:
|
09634490
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Filing Dt:
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08/08/2000
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Title:
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TITANIUM BORIDE GATE ELECTRODE AND INTERCONNECT
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|
Patent #:
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|
Issue Dt:
|
09/18/2001
|
Application #:
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09634998
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Filing Dt:
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08/08/2000
|
Title:
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Method for repairing bump and divot defects in a phase shifting mask
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|
|
Patent #:
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|
Issue Dt:
|
09/11/2001
|
Application #:
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09635022
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Filing Dt:
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08/04/2000
|
Title:
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Die paddle clamping method for wire bond enhancement
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|
|
Patent #:
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|
Issue Dt:
|
04/08/2003
|
Application #:
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09635082
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Filing Dt:
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08/08/2000
|
Title:
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TITANIUM BORIDE GATE ELECTRODE AND INTERCONNECT AND METHODS REGARDING SAME
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Patent #:
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Issue Dt:
|
09/03/2002
|
Application #:
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09635965
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Filing Dt:
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08/10/2000
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Title:
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CIRCUIT FOR PROGRAMMING ANTIFUSE BITS
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Patent #:
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|
Issue Dt:
|
03/04/2003
|
Application #:
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09636155
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Filing Dt:
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08/10/2000
|
Title:
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INTEGRATED CIRCUIT DEVICES INCLUDING CONNECTION COMPONENTS MECHANICALLY AND ELECTRICALLY ATTACHED TO SEMICONDUCTOR DICE
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Patent #:
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|
Issue Dt:
|
09/18/2001
|
Application #:
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09636363
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Filing Dt:
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08/11/2000
|
Title:
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Data output buffer with precharge
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|
Patent #:
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|
Issue Dt:
|
06/26/2001
|
Application #:
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09636397
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Filing Dt:
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08/09/2000
|
Title:
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Floating gate MOS transistor charge injection circuit and computation devices incorporating it
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|
Patent #:
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|
Issue Dt:
|
10/01/2002
|
Application #:
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09638227
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Filing Dt:
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08/14/2000
|
Title:
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METHOD FOR FORMING CONDUCTIVE STRUCTURES
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Patent #:
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|
Issue Dt:
|
03/18/2003
|
Application #:
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09638276
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Filing Dt:
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08/14/2000
|
Title:
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REDUCED TERMINAL TESTING SYSTEM
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Patent #:
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Issue Dt:
|
02/18/2003
|
Application #:
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09638390
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Filing Dt:
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08/15/2000
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Title:
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LOW CAPACITANCE WIRING LAYOUT AND METHOD FOR MAKING SAME
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Patent #:
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|
Issue Dt:
|
03/26/2002
|
Application #:
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09638415
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Filing Dt:
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08/14/2000
|
Title:
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MAGNETO-RESISTIVE MEMORY WITH SHARED WORDLINE AND SENSE LINE
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|
Patent #:
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|
Issue Dt:
|
05/21/2002
|
Application #:
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09638419
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Filing Dt:
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08/14/2000
|
Title:
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PASSIVATED MAGNETO-RESISTIVE BIT STRUCTURE AND PASSIVATION METHOD THEREFOR
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Patent #:
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Issue Dt:
|
12/10/2002
|
Application #:
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09638637
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Filing Dt:
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08/14/2000
|
Title:
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PULSED WRITE TECHNIQUES FOR MAGNETORESISTIVE MEMORIES
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Patent #:
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Issue Dt:
|
11/05/2002
|
Application #:
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09639088
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Filing Dt:
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08/16/2000
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Title:
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METHOD OF FORMING NOBLE METAL PATTERN
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|
Patent #:
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|
Issue Dt:
|
08/20/2002
|
Application #:
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09639090
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Filing Dt:
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08/16/2000
|
Title:
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METHOD FOR MAKING SHALLOW TRENCHES FOR ISOLATION
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Patent #:
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|
Issue Dt:
|
05/01/2001
|
Application #:
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09639358
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Filing Dt:
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08/14/2000
|
Title:
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Low profile multi-ic chip package connector
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Patent #:
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Issue Dt:
|
09/25/2001
|
Application #:
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09639359
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Filing Dt:
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08/14/2000
|
Title:
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Plastic lead frames for semiconductor devices, packages including same, and methods of fabrication
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Patent #:
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|
Issue Dt:
|
02/18/2003
|
Application #:
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09639369
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Filing Dt:
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08/15/2000
|
Title:
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TREATMENT OF EXPOSED SILICON AND SILICON DIOXIDE SURFACES
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Patent #:
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|
Issue Dt:
|
03/11/2003
|
Application #:
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09639395
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Filing Dt:
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08/15/2000
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Title:
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INTERPOSERS HAVING ENCAPSULANT FILL CONTROL FEATURES
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Patent #:
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|
Issue Dt:
|
07/22/2003
|
Application #:
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09639422
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Filing Dt:
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08/14/2000
|
Title:
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HERMETIC CHIP AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
|
09/24/2002
|
Application #:
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09639580
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Filing Dt:
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08/14/2000
|
Title:
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NUCLEATION FOR IMPROVED FLASH ERASE CHARACTERISTICS
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Patent #:
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Issue Dt:
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01/25/2005
|
Application #:
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09639625
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Filing Dt:
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08/15/2000
|
Title:
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PLASMA INDUCED DEPLETION OF FLUORINE FROM SURFACES OF FLUORINATED LOW-K DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
|
10/30/2001
|
Application #:
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09639875
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Filing Dt:
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08/16/2000
|
Title:
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Device and method for repairing a semiconductor memory
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Patent #:
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Issue Dt:
|
09/25/2007
|
Application #:
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09639917
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Filing Dt:
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08/16/2000
|
Title:
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METHOD AND APPARATUS FOR REMOVING ENCAPSULATING MATERIAL FROM A PACKAGED MICROELECTRONIC DEVICE
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Patent #:
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Issue Dt:
|
03/12/2002
|
Application #:
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09639991
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Filing Dt:
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08/16/2000
|
Title:
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Method and apparatus for reducing current drain caused by row to column shorts in a memory device
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Patent #:
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|
Issue Dt:
|
12/02/2003
|
Application #:
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09640333
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Filing Dt:
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08/16/2000
|
Title:
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STRUCTURE INCLUDING ELECTROPHORETICALLY DEPOSITED PATTERNABLE MATERIAL FOR USE IN PROVIDING A DISPLAY
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Patent #:
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Issue Dt:
|
04/20/2004
|
Application #:
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09640740
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Filing Dt:
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08/18/2000
|
Title:
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METHOD AND APPARATUS FOR COMBINING ARCHITECTURES WITH LOGIC OPTION
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Patent #:
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|
Issue Dt:
|
04/22/2003
|
Application #:
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09640741
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Filing Dt:
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08/18/2000
|
Title:
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PROGRAMMABLE ELEMENT LATCH CIRCUIT
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Patent #:
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|
Issue Dt:
|
12/03/2002
|
Application #:
|
09641065
|
Filing Dt:
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08/17/2000
|
Title:
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INTEGRATED CIRCUIT TEST MODE WITH EXTERNALLY FORCED REFERENCE VOLTAGE
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Patent #:
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|
Issue Dt:
|
10/01/2002
|
Application #:
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09641067
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Filing Dt:
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08/17/2000
|
Title:
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NOVEL MASKED NITROGEN ENHANCED GATE OXIDE
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|
Patent #:
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|
Issue Dt:
|
08/27/2002
|
Application #:
|
09641165
|
Filing Dt:
|
08/16/2000
|
Title:
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METHOD AND APPARATUS FOR PREDICTING PROCESS CHARACTERISTICS OF POLYURETHANE PADS
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Patent #:
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|
Issue Dt:
|
11/11/2003
|
Application #:
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09641518
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Filing Dt:
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08/21/2000
|
Title:
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MEMORY DEVICE HAVING POSTED WRITE PER COMMAND
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|
Patent #:
|
|
Issue Dt:
|
07/24/2001
|
Application #:
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09641623
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Filing Dt:
|
08/18/2000
|
Title:
|
Package stack via bottom leaded plastic (BLP) packaging
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|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
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09641881
|
Filing Dt:
|
08/17/2000
|
Title:
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METHOD AND SYSTEM FOR HIDING REFRESHES IN A DYNAMIC RANDOM ACCESS MEMORY
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|
Patent #:
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|
Issue Dt:
|
04/08/2003
|
Application #:
|
09642019
|
Filing Dt:
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08/21/2000
|
Title:
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METHOD AND DEVICE FOR IMPROVED LITHOGRAPHIC CRITICAL DIMENSION CONTROL
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|
Patent #:
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|
Issue Dt:
|
02/05/2002
|
Application #:
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09642089
|
Filing Dt:
|
08/21/2000
|
Title:
|
Memory circuit with local isolation and pre-charge circuits
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|
Patent #:
|
|
Issue Dt:
|
06/04/2002
|
Application #:
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09642134
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Filing Dt:
|
08/18/2000
|
Title:
|
DEVICE AND METHOD FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
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Patent #:
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|
Issue Dt:
|
12/17/2002
|
Application #:
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09642341
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Filing Dt:
|
08/21/2000
|
Title:
|
MULTIPLE BIT LINE COLUMN REDUNDANCY
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|
Patent #:
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|
Issue Dt:
|
10/22/2002
|
Application #:
|
09642355
|
Filing Dt:
|
08/21/2000
|
Title:
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DEVICE AND METHOD FOR REDUCING IDLE CYCLES IN A SEMICONDUCTOR MEMORY DEVICE
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|
Patent #:
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|
Issue Dt:
|
08/28/2001
|
Application #:
|
09642399
|
Filing Dt:
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08/18/2000
|
Title:
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Apparatus for forming materials
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|
Patent #:
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|
Issue Dt:
|
07/02/2002
|
Application #:
|
09642427
|
Filing Dt:
|
08/21/2000
|
Title:
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REDUCTION/OXIDATION MATERIAL REMOVAL METHOD
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|
Patent #:
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|
Issue Dt:
|
09/03/2002
|
Application #:
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09642683
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Filing Dt:
|
08/21/2000
|
Title:
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ARCHITECTURE, PACKAGE ORIENTATION AND ASSEMBLY OF MEMORY DEVICES
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|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
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09642774
|
Filing Dt:
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08/22/2000
|
Title:
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METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
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|
Patent #:
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|
Issue Dt:
|
08/21/2001
|
Application #:
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09642775
|
Filing Dt:
|
08/22/2000
|
Title:
|
Column redundancy for prefetch
|
|
|
Patent #:
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|
Issue Dt:
|
03/19/2002
|
Application #:
|
09642781
|
Filing Dt:
|
08/22/2000
|
Title:
|
Method of consturcting a very wide, very fast distributed memory
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|
|
Patent #:
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|
Issue Dt:
|
07/17/2001
|
Application #:
|
09642956
|
Filing Dt:
|
08/21/2000
|
Title:
|
Low temperature anti-reflective coating for IC lithography
|
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|
Patent #:
|
|
Issue Dt:
|
02/25/2003
|
Application #:
|
09642960
|
Filing Dt:
|
08/21/2000
|
Title:
|
INTEGRATED CIRCUITS USING OPTICAL FIBER INTERCONNECTS FORMED THROUGH A SEMICONDUCTOR WAFER AND METHODS FOR FORMING SAME
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Patent #:
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Issue Dt:
|
09/17/2002
|
Application #:
|
09642976
|
Filing Dt:
|
08/18/2000
|
Title:
|
PREHEATING OF CHEMICAL VAPOR DEPOSITION PRECURSORS
|
|
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Patent #:
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Issue Dt:
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03/20/2007
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Application #:
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09643004
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Filing Dt:
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08/21/2000
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Title:
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LOW SELECTIVITY DEPOSITION METHODS
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Patent #:
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Issue Dt:
|
05/29/2001
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Application #:
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09643202
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Filing Dt:
|
08/21/2000
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Title:
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Microelectronic substrate assemblies and methods of manufacturing such microelectronic substrate assemblies for use in mechanical and chemical-mechanical planarization processes
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Patent #:
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Issue Dt:
|
08/20/2002
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Application #:
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09643296
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Filing Dt:
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08/22/2000
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Title:
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VERTICAL GATE TRANSISTORS IN PASS TRANSISTOR PROGRAMMABLE LOGIC ARRAYS
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Patent #:
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Issue Dt:
|
06/29/2004
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Application #:
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09643526
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Filing Dt:
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08/22/2000
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Title:
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CIRCUIT BOARD
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Patent #:
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Issue Dt:
|
05/13/2003
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Application #:
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09644196
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Filing Dt:
|
08/22/2000
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Title:
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APPARATUS AND METHODS OF SEMICONDUCTOR PACKAGES HAVING CIRCUIT-BEARING INTERCONNECT COMPONENTS
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Patent #:
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Issue Dt:
|
01/28/2003
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Application #:
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09644254
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Filing Dt:
|
08/22/2000
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Title:
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METHOD OF FORMING A NON-CONFORMAL LAYER OVER AND EXPOSING A TRENCH
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Patent #:
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Issue Dt:
|
09/03/2002
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Application #:
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09644257
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Filing Dt:
|
08/22/2000
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Title:
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COATED SEMICONDUCTOR DIE/LEADFRAME ASSEMBLY AND METHOD FOR COATING THE ASSEMBLY
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Patent #:
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Issue Dt:
|
07/17/2001
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Application #:
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09644352
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Filing Dt:
|
08/23/2000
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Title:
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Method for using thin spacers and oxidation in gate oxides
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Patent #:
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|
Issue Dt:
|
05/13/2003
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Application #:
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09644365
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Filing Dt:
|
08/23/2000
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Title:
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SMALL SCALE ACTUATORS AND METHODS FOR THEIR FORMATION AND USE
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Patent #:
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Issue Dt:
|
08/06/2002
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Application #:
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09644497
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Filing Dt:
|
08/23/2000
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Title:
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METHOD FOR CELL MARGIN TESTING A DYNAMIC CELL PLATE SENSING MEMORY ARCHITECTURE
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|
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Patent #:
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|
Issue Dt:
|
01/04/2005
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Application #:
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09644700
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Filing Dt:
|
08/24/2000
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Title:
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METHOD FOR SIMULTANEOUS FORMATION OF FUSE AND CAPACITOR PLATE AND RESULTING STRUCTURE
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|
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Patent #:
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|
Issue Dt:
|
08/19/2003
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Application #:
|
09644766
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Filing Dt:
|
08/23/2000
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Title:
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STACKED MICROELECTRONIC DIES AND METHODS FOR STACKING MICROELECTRONIC DIES
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Patent #:
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Issue Dt:
|
07/09/2002
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Application #:
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09645256
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Filing Dt:
|
08/24/2000
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Title:
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HIGH DENSITY STACKABLE AND FLEXIBLE SUBTRATE-BASED DEVICES AND SYSTEMS AND METHODS OF FABRICATING
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|
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Patent #:
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Issue Dt:
|
08/31/2004
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Application #:
|
09645373
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Filing Dt:
|
08/24/2000
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Title:
|
HIGH DENSITY STACKABLE AND FLEXIBLE SUBSTRATE-BASED DEVICES AND SYSTEMS AND METHODS OF FABRICATING
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|
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Patent #:
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Issue Dt:
|
06/22/2004
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Application #:
|
09645580
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Filing Dt:
|
08/25/2000
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Title:
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SINGLE INSTRUCTION MULTIPLE DATA MASSIVELY PARALLEL PROCESSOR SYSTEMS ON A CHIP AND SYSTEM USING SAME
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|
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Patent #:
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|
Issue Dt:
|
10/29/2002
|
Application #:
|
09645711
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Filing Dt:
|
08/24/2000
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Title:
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PROCESS FOR REALIZING AN INTERMEDIATE DIELECTRIC LAYER FOR ENHANCING THE PLANARITY IN SEMICONDUCTOR ELECTRONIC DEVICES
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|
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Patent #:
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|
Issue Dt:
|
08/26/2003
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Application #:
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09645833
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Filing Dt:
|
08/25/2000
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Title:
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METHODS OF BALL GRID ARRAY
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|
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Patent #:
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|
Issue Dt:
|
12/30/2008
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Application #:
|
09645903
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Filing Dt:
|
08/25/2000
|
Title:
|
METHODS FOR FABRICATING RESIDUE-FREE CONTACT OPENINGS
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|
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Patent #:
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|
Issue Dt:
|
02/25/2003
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Application #:
|
09645904
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Filing Dt:
|
08/25/2000
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Title:
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METHOD AND APPARATUS FOR MARKING A BARE SEMICONDUCTOR DIE WITH A TAPE HAVING OPTICAL MARKING PROPERTIES
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|
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Patent #:
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|
Issue Dt:
|
06/04/2002
|
Application #:
|
09645905
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Filing Dt:
|
08/25/2000
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Title:
|
Surface mount ic using silicon vias in an area array format or same size as die array
|
|