|
|
Patent #:
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|
Issue Dt:
|
06/11/2002
|
Application #:
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09645907
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Filing Dt:
|
08/25/2000
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Title:
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Tantalum - aluminum - nitrogen material for semiconductor devices
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|
Patent #:
|
|
Issue Dt:
|
07/02/2002
|
Application #:
|
09645947
|
Filing Dt:
|
08/25/2000
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Title:
|
USE OF PALLADIUM IN IC MANUFACTURING
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|
Patent #:
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|
Issue Dt:
|
09/04/2001
|
Application #:
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09647194
|
Filing Dt:
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10/20/2000
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Title:
|
Memory system
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|
Patent #:
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|
Issue Dt:
|
09/11/2001
|
Application #:
|
09648008
|
Filing Dt:
|
08/21/2000
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Title:
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Field effect transistor having improved hot carrier immunity
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|
Patent #:
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|
Issue Dt:
|
07/24/2007
|
Application #:
|
09648044
|
Filing Dt:
|
08/25/2000
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Title:
|
METHOD AND DEVICE TO REDUCE GATE-INDUCED DRAIN LEAKAGE (GIDL) CURRENT IN THIN GATE OXIDES MOSFETS
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|
Patent #:
|
|
Issue Dt:
|
12/26/2006
|
Application #:
|
09648271
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Filing Dt:
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08/25/2000
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Title:
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FLASH MEMORY ARCHITECTURE WITH SEPARATE STORAGE OF OVERHEAD AND USER DATA
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|
Patent #:
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|
Issue Dt:
|
06/10/2003
|
Application #:
|
09648316
|
Filing Dt:
|
08/25/2000
|
Title:
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INTEGRATED CIRCUIT DEVICE HAVING REDUCED BOW AND METHOD FOR MAKING SAME
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|
Patent #:
|
|
Issue Dt:
|
03/23/2004
|
Application #:
|
09648508
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Filing Dt:
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08/25/2000
|
Title:
|
WRITE AND ERASE PROTECTION IN A SYNCHRONOUS MEMORY
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|
Patent #:
|
|
Issue Dt:
|
05/15/2001
|
Application #:
|
09648585
|
Filing Dt:
|
08/25/2000
|
Title:
|
METHOD OF FORMING MEMORY CIRCUITRY
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|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09648696
|
Filing Dt:
|
08/25/2000
|
Title:
|
RESIDUE-FREE CONTACT OPENINGS AND METHODS FOR FABRICATING SAME
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|
Patent #:
|
|
Issue Dt:
|
08/14/2001
|
Application #:
|
09648703
|
Filing Dt:
|
08/25/2000
|
Title:
|
Clock generation circuits and methods
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|
Patent #:
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|
Issue Dt:
|
03/19/2002
|
Application #:
|
09648705
|
Filing Dt:
|
08/25/2000
|
Title:
|
Differential sensing in a memory with reference current
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|
Patent #:
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|
Issue Dt:
|
10/30/2001
|
Application #:
|
09648722
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Filing Dt:
|
08/25/2000
|
Title:
|
Adjustable pre-charge in a memory
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|
Patent #:
|
|
Issue Dt:
|
01/14/2003
|
Application #:
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09648723
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Filing Dt:
|
08/25/2000
|
Title:
|
DIFFERENTIAL SENSING IN A MEMORY
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|
Patent #:
|
|
Issue Dt:
|
04/01/2003
|
Application #:
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09648880
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Filing Dt:
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08/25/2000
|
Title:
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MEMORY DEVICE POWER DISTRIBUTION
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|
Patent #:
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|
Issue Dt:
|
07/05/2005
|
Application #:
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09648919
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Filing Dt:
|
08/25/2000
|
Title:
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ELECTROSTATIC DISCHARGE PROTECTION DEVICE
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|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09648923
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Filing Dt:
|
08/25/2000
|
Title:
|
MEMORY DEVICE REDUNDANCY SELECTION HAVING TEST INPUTS
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|
Patent #:
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|
Issue Dt:
|
02/22/2005
|
Application #:
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09649160
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Filing Dt:
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08/28/2000
|
Title:
|
METHOD AND APPARATUS FOR EPOXY LOC DIE ATTACHMENT
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|
Patent #:
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|
Issue Dt:
|
05/14/2002
|
Application #:
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09649192
|
Filing Dt:
|
08/28/2000
|
Title:
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Method and apparatus for reducing the lock time of DLL
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|
Patent #:
|
|
Issue Dt:
|
07/29/2003
|
Application #:
|
09649225
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Filing Dt:
|
08/28/2000
|
Title:
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Methods of fabricating semiconductor substrate-based BGA interconnection
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|
|
Patent #:
|
|
Issue Dt:
|
09/10/2002
|
Application #:
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09649246
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Filing Dt:
|
08/28/2000
|
Title:
|
GRADED LDD IMPLANT PROCESS FOR SUB-HALF-MICRON MOS DEVICES
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|
Patent #:
|
|
Issue Dt:
|
07/16/2002
|
Application #:
|
09649344
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Filing Dt:
|
08/28/2000
|
Title:
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Memory circuit having improved sense-amplifier block and method for forming same
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|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
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09649428
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Filing Dt:
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08/28/2000
|
Title:
|
PACKAGED MICROELECTRONIC DEVICES WITH INTERCONNECTING UNITS AND METHODS FOR MANUFACTURING AND USING THE INTERCONNECTING UNITS
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Patent #:
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|
Issue Dt:
|
10/16/2001
|
Application #:
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09649448
|
Filing Dt:
|
08/25/2000
|
Title:
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Current limiting negative switch circuit
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|
Patent #:
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|
Issue Dt:
|
06/18/2002
|
Application #:
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09649555
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Filing Dt:
|
08/28/2000
|
Title:
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HIGH SPEED LOW POWER INPUT BUFFER
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|
Patent #:
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|
Issue Dt:
|
09/24/2002
|
Application #:
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09649556
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Filing Dt:
|
08/28/2000
|
Title:
|
METAL COMPLEXES WITH CHELATING O-AND/OR N-DONOR LIGANDS
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|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
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09649691
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Filing Dt:
|
08/28/2000
|
Title:
|
SCHEME FOR DELAY LOCKED LOOP RESET PROTECTION
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|
Patent #:
|
|
Issue Dt:
|
04/15/2003
|
Application #:
|
09649765
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Filing Dt:
|
08/28/2000
|
Title:
|
MICROELECTRONIC DEVICE ASSEMBLIES HAVING A SHIELDED INPUT AND METHODS FOR MANUFACTURING AND OPERATING SUCH MICROELECTRONIC DEVICE ASSEMBLIES
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Patent #:
|
|
Issue Dt:
|
04/30/2002
|
Application #:
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09649828
|
Filing Dt:
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08/29/2000
|
Title:
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Double pass transistor logic with vertical gate transistors
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|
|
Patent #:
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|
Issue Dt:
|
05/24/2005
|
Application #:
|
09649897
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Filing Dt:
|
08/28/2000
|
Title:
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GAS DELIVERY DEVICE FOR IMPROVED DEPOSITION OF DIELECTRIC MATERIAL
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|
Patent #:
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|
Issue Dt:
|
08/13/2002
|
Application #:
|
09649907
|
Filing Dt:
|
08/30/2000
|
Title:
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OVERLAY TARGET DESIGN METHOD WITH PTICH DETERMINATION TO MINIMIZE IMPACT OF LENS ABERRATIONS
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|
Patent #:
|
|
Issue Dt:
|
03/02/2004
|
Application #:
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09649964
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Filing Dt:
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08/29/2000
|
Title:
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FILM FRAME SUBSTRATE FIXTURE
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|
Patent #:
|
|
Issue Dt:
|
03/09/2004
|
Application #:
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09649966
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Filing Dt:
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08/29/2000
|
Title:
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FILM FRAME SUBSTRATE FIXTURE
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|
Patent #:
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|
Issue Dt:
|
07/16/2002
|
Application #:
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09649970
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Filing Dt:
|
08/28/2000
|
Title:
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METHOD AND APPARATUS FOR PHASE-SPLITTING A CLOCK SIGNAL
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|
Patent #:
|
|
Issue Dt:
|
06/24/2003
|
Application #:
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09650071
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Filing Dt:
|
08/29/2000
|
Title:
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METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT
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|
Patent #:
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|
Issue Dt:
|
06/12/2001
|
Application #:
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09650080
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Filing Dt:
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08/29/2000
|
Title:
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Film frame substrate fixture
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|
|
Patent #:
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|
Issue Dt:
|
03/25/2003
|
Application #:
|
09650081
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Filing Dt:
|
08/29/2000
|
Title:
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SILICON ON INSULATOR DRAM PROCESS UTILIZING BOTH FULLY AND PARTIALLY DEPLETED DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
11/26/2002
|
Application #:
|
09650125
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Filing Dt:
|
08/29/2000
|
Title:
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U-SHAPE TAPE FOR BOC FBGA PACKAGE TO IMPROVE MOLDABILITY
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|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09650215
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Filing Dt:
|
08/29/2000
|
Title:
|
A METHOD OF PREPARING A CAPACITOR ON INTEGRATED CIRCUIT DEVICE CONTAINING ISOLATED DIELECTRIC MATERIAL
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|
|
Patent #:
|
|
Issue Dt:
|
06/10/2003
|
Application #:
|
09650231
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Filing Dt:
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08/29/2000
|
Title:
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METHODS FOR PREPARING RUTHENIUM AND OSMIUM COMPOUNDS
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|
Patent #:
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|
Issue Dt:
|
10/16/2001
|
Application #:
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09650475
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Filing Dt:
|
08/29/2000
|
Title:
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Method and apparatus for adjusting control signal timing in a memory device
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|
Patent #:
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|
Issue Dt:
|
03/05/2002
|
Application #:
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09650534
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Filing Dt:
|
08/30/2000
|
Title:
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Device and method for protecting an integrated circuit during an ESD event
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|
|
Patent #:
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|
Issue Dt:
|
09/10/2002
|
Application #:
|
09650552
|
Filing Dt:
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08/30/2000
|
Title:
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DELAY LINE TAP SETTING OVERRIDE FOR DELAY LOCKED LOOP (DLL) TESTABILITY
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|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09650567
|
Filing Dt:
|
08/30/2000
|
Title:
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Full page increment/decrement burst for DDR SDRAM/SGRAM
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|
|
Patent #:
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|
Issue Dt:
|
12/24/2002
|
Application #:
|
09650600
|
Filing Dt:
|
08/30/2000
|
Title:
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MEMORY ADDRESS DECODE ARRAY WITH VERTICAL TRANSISTORS
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|
Patent #:
|
|
Issue Dt:
|
03/19/2002
|
Application #:
|
09650720
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Filing Dt:
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08/30/2000
|
Title:
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Method and apparatus for digital delay locked loop circuits
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|
|
Patent #:
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|
Issue Dt:
|
12/04/2001
|
Application #:
|
09650721
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Filing Dt:
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08/30/2000
|
Title:
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Multi stage refresh control of a memory device
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|
|
Patent #:
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|
Issue Dt:
|
07/09/2002
|
Application #:
|
09650778
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Filing Dt:
|
08/29/2000
|
Title:
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MATERIAL REMOVAL METHOD USING GERMANIUM
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|
|
Patent #:
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|
Issue Dt:
|
02/11/2003
|
Application #:
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09650779
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Filing Dt:
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08/29/2000
|
Title:
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METHOD FOR APPLYING UNIFORM PRESSURIZED FILM ACROSS WAFER
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|
Patent #:
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|
Issue Dt:
|
04/08/2003
|
Application #:
|
09650784
|
Filing Dt:
|
08/30/2000
|
Title:
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AMMONIA GAS PASSIVATION ON NITRIDE ENCAPSULATED DEVICES
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|
Patent #:
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|
Issue Dt:
|
07/09/2002
|
Application #:
|
09650796
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Filing Dt:
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08/30/2000
|
Title:
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METHOD AND APPARATUS FOR MARKING AND IDENTIFYING A DEFECTIVE DIE SITE
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|
Patent #:
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|
Issue Dt:
|
08/27/2002
|
Application #:
|
09650840
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Filing Dt:
|
08/30/2000
|
Title:
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UPHILL SCREEN PRINTING IN THE MANUFACTURING OF MICROELECTRONIC COMPONENTS
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|
Patent #:
|
|
Issue Dt:
|
08/07/2001
|
Application #:
|
09650879
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Filing Dt:
|
08/30/2000
|
Title:
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Apparatus and method for programming voltage protection in a non-volatile memory system
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|
Patent #:
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|
Issue Dt:
|
10/14/2003
|
Application #:
|
09651040
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Filing Dt:
|
08/30/2000
|
Title:
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METHOD AND APPARATUS FOR ELECTROLYTIC PLATING OF SUREFACE METALS
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|
Patent #:
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|
Issue Dt:
|
01/15/2002
|
Application #:
|
09651063
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Filing Dt:
|
08/30/2000
|
Title:
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Apparatus and method for programming voltage protection in a non-volatile memory system
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|
Patent #:
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|
Issue Dt:
|
04/17/2007
|
Application #:
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09651159
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Filing Dt:
|
08/30/2000
|
Title:
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OVERFLOW DETECTION AND CLAMPING WITH PARALLEL OPERAND PROCESSING FOR FIXED-POINT MULTIPLIERS
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|
Patent #:
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|
Issue Dt:
|
01/07/2003
|
Application #:
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09651199
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Filing Dt:
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08/30/2000
|
Title:
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MEMORY CELL HAVING A VERTICAL TRANSISTOR WITH BURIED SOURCE/DRAIN AND DUAL GATES
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|
Patent #:
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|
Issue Dt:
|
09/03/2002
|
Application #:
|
09651325
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Filing Dt:
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08/30/2000
|
Title:
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WAFER PROCESSING APPARATUS
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|
Patent #:
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|
Issue Dt:
|
07/30/2002
|
Application #:
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09651330
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Filing Dt:
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08/29/2000
|
Title:
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HEAT SINK CHIP PACKAGE
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|
Patent #:
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|
Issue Dt:
|
07/10/2001
|
Application #:
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09651332
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Filing Dt:
|
08/31/2000
|
Title:
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Semiconductor programmable test arrangement such as an antifuse ID circuit having common programming switches
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|
|
Patent #:
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|
Issue Dt:
|
10/08/2002
|
Application #:
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09651380
|
Filing Dt:
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08/29/2000
|
Title:
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THIN DIELECTRIC FILMS FOR DRAM STORAGE CAPACITORS
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|
Patent #:
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|
Issue Dt:
|
05/27/2003
|
Application #:
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09651391
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Filing Dt:
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08/29/2000
|
Title:
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FUSE READ SEQUENCE FOR AUTO REFRESH POWER REDUCTION
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|
Patent #:
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|
Issue Dt:
|
05/11/2004
|
Application #:
|
09651422
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Filing Dt:
|
08/30/2000
|
Title:
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METHODS OF FORMING INSULATIVE MATERIAL AGAINST CONDUCTIVE STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
06/10/2003
|
Application #:
|
09651448
|
Filing Dt:
|
08/30/2000
|
Title:
|
MICROELECTRONIC ASSEMBLY WITH PRE-DISPOSED FILL MATERIAL AND ASSOCIATED METHOD OF MANUFACTURE
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|
Patent #:
|
|
Issue Dt:
|
09/25/2001
|
Application #:
|
09651460
|
Filing Dt:
|
08/30/2000
|
Title:
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Semiconductor device including combed bond pad opening, assemblies and methods
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|
|
Patent #:
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|
Issue Dt:
|
11/06/2001
|
Application #:
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09651461
|
Filing Dt:
|
08/30/2000
|
Title:
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Method of attaching a leadframe to singulated semiconductor dice
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|
|
Patent #:
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|
Issue Dt:
|
10/08/2002
|
Application #:
|
09651462
|
Filing Dt:
|
08/30/2000
|
Title:
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UTILIZATION OF DISAPPEARING SILICON HARD MASK FOR FABRICATION OF SEMICONDUCTOR STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
07/30/2002
|
Application #:
|
09651472
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Filing Dt:
|
08/30/2000
|
Title:
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ENHANCED FUSE CONFIGURATIONS FOR LOW-VOLTAGE FLASH MEMORIES
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|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09651475
|
Filing Dt:
|
08/30/2000
|
Title:
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NOVEL HIGH-K DIELECTRIC MATERIALS AND PROCESSES FOR MANUFACTURING THEM
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|
Patent #:
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|
Issue Dt:
|
09/30/2003
|
Application #:
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09651478
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Filing Dt:
|
08/30/2000
|
Title:
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ENHANCED PROTECTION FOR INPUT BUFFERS OF LOW-VOLTAGE FLASH MEMORIES
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Patent #:
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|
Issue Dt:
|
08/28/2001
|
Application #:
|
09651489
|
Filing Dt:
|
08/30/2000
|
Title:
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Apparatus and method for facilitating circuit board processing
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|
Patent #:
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|
Issue Dt:
|
06/07/2005
|
Application #:
|
09651620
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Filing Dt:
|
08/30/2000
|
Title:
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METHOD FOR THE FORMATION OF RUSIXOY-CONTAINING BARRIER LAYERS FOR HIGH-K DIELECTRICS
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Patent #:
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|
Issue Dt:
|
01/28/2003
|
Application #:
|
09651631
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Filing Dt:
|
08/30/2000
|
Title:
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INTEGRATED CIRCUIT COMPARATOR OR AMPLIFIER
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Patent #:
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|
Issue Dt:
|
02/10/2004
|
Application #:
|
09651699
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Filing Dt:
|
08/30/2000
|
Title:
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DEVICES CONTAINING PLATINUM-RHODIUM LAYERS AND METHODS
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|
Patent #:
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|
Issue Dt:
|
07/11/2006
|
Application #:
|
09651779
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Filing Dt:
|
08/30/2000
|
Title:
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METHODS AND APPARATUS FOR REMOVING CONDUCTIVE MATERIAL FROM A MICROELECTRONIC SUBSTRATE
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|
Patent #:
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Issue Dt:
|
07/05/2005
|
Application #:
|
09651790
|
Filing Dt:
|
08/30/2000
|
Title:
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RESIDUE FREE OVERLAY TARGET
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|
|
Patent #:
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|
Issue Dt:
|
12/23/2003
|
Application #:
|
09651815
|
Filing Dt:
|
08/30/2000
|
Title:
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METHODS FOR FORMING VOID REGIONS, DIELECTRIC REGIONS AND CAPACITOR CONSTRUCTIONS
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|
Patent #:
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|
Issue Dt:
|
05/28/2002
|
Application #:
|
09651816
|
Filing Dt:
|
08/30/2000
|
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING A PLURALITY OF CAPACITORS ON A SUBSTRATE, BIT LINE CONTACTS AND METHOD OF FORMING BIT LINE CONTACTS
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|
Patent #:
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|
Issue Dt:
|
12/07/2004
|
Application #:
|
09651858
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Filing Dt:
|
08/30/2000
|
Title:
|
METHOD AND SYSTEM FOR STORING DEVICE TEST INFORMATION ON A SEMICONDUCTOR DEVICE USING ON-DEVICE LOGIC FOR DETERMINATION OF TEST RESULTS
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|
|
Patent #:
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|
Issue Dt:
|
09/17/2002
|
Application #:
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09651861
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Filing Dt:
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08/30/2000
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Title:
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METHODS OF FABRICATING BURIED DIGIT LINES AND SEMICONDUCTOR DEVICES INCLUDING SAME
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Patent #:
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Issue Dt:
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08/31/2004
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Application #:
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09651871
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Filing Dt:
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08/31/2000
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Title:
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GAS PULSING FOR ETCH PROFILE CONTROL
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09651997
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Filing Dt:
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08/31/2000
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Title:
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METHOD AND APPARATUS FOR MAGNETIC SHIELDING OF AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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06/28/2005
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Application #:
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09652003
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Filing Dt:
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08/31/2000
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Title:
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METHOD AND APPARATUS FOR CONNECTING A MASSIVELY PARALLEL PROCESSOR ARRAY TO A MEMORY ARRAY IN A BIT SERIAL MANNER
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Patent #:
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Issue Dt:
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01/21/2003
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Application #:
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09652059
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Filing Dt:
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08/31/2000
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Title:
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METHOD OF ENHANCING THE CONDUCTIVITY OF A CONDUCTIVE SURFACE
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Patent #:
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Issue Dt:
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12/02/2003
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Application #:
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09652060
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Filing Dt:
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08/31/2000
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Title:
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METHOD OF FORMING A SEMICONDUCTOR CHIP CARRIER
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09652070
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Filing Dt:
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08/31/2000
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Title:
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METHOD OF SELECTIVELY FORMING LOCAL INTERCONNECTS USING DESIGN RULES
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Patent #:
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Issue Dt:
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05/24/2005
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Application #:
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09652071
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Filing Dt:
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08/31/2000
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Title:
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APPARATUS FOR DETECTING MIXED INTERLACED AND PROGRESSIVE ORIGINAL SOURCES IN A VIDEO SEQUENCE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09652076
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Filing Dt:
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08/31/2000
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Title:
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OVERMOLDING ENCAPSULATION PROCESS
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Patent #:
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Issue Dt:
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04/09/2002
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Application #:
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09652188
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Filing Dt:
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08/31/2000
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Title:
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Use of selective ozone TEOS oxide to create variable thickness layers and spacers
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Patent #:
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Issue Dt:
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02/11/2003
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Application #:
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09652208
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Filing Dt:
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08/31/2000
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Title:
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ELECTROLESS DEPOSITION OF DOPED NOBLE METALS AND NOBLE METAL ALLOYS
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Patent #:
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Issue Dt:
|
09/07/2004
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Application #:
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09652216
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Filing Dt:
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08/30/2000
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Title:
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METHOD AND APPARATUS FOR REDUCING SUBSTRATE BIAS VOLTAGE DROP
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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09652217
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Filing Dt:
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08/30/2000
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Title:
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Latched row or column select enable driver
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Patent #:
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Issue Dt:
|
03/16/2004
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Application #:
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09652218
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Filing Dt:
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08/30/2000
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Title:
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WAFER ALIGNMENT SYSTEM
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Patent #:
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Issue Dt:
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05/13/2003
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Application #:
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09652225
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Filing Dt:
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08/29/2000
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Title:
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METHOD AND APPARATUS FOR ATTACHING A WORKPIECE TO A WORKPIECE SUPPORT
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Patent #:
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Issue Dt:
|
08/14/2001
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Application #:
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09652274
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Filing Dt:
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08/31/2000
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Title:
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Method and apparatus providing redundancy for fabricating highly reliable memory modules
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Patent #:
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Issue Dt:
|
12/17/2002
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Application #:
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09652320
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Filing Dt:
|
08/31/2000
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Title:
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METHOD OF FORMING LIGHTLY DOPED DRAIN MOS TRANSISTOR INCLUDING FORMING SPACERS ON GATE ELECTRODE PATTERN BEFORE EXPOSING GATE INSULATOR
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Patent #:
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Issue Dt:
|
08/17/2004
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Application #:
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09652364
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Filing Dt:
|
08/31/2000
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Title:
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PHASE DETECTOR FOR ALL-DIGITAL PHASE LOCKED AND DELAY LOCKED LOOPS
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Patent #:
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Issue Dt:
|
10/07/2003
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Application #:
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09652429
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Filing Dt:
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08/31/2000
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Title:
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GATE DIELECTRIC ANTIFUSE CIRCUITS AND METHODS FOR OPERATING SAME
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Patent #:
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Issue Dt:
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09/18/2007
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Application #:
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09652495
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Filing Dt:
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08/31/2000
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Title:
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CARRIER FOR WAFER-SCALE PACKAGE AND WAFER-SCALE PACKAGE INCLUDING THE CARRIER
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Patent #:
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Issue Dt:
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04/15/2003
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Application #:
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09652530
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Filing Dt:
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08/31/2000
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Title:
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METHODS OF ENHANCING SELECTIVITY OF ETCHING SILICON DIOXIDE RELATIVE TO ONE OR MORE ORGANIC SUBSTANCES
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