skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/28/2008
Application #:
11275035
Filing Dt:
12/05/2005
Publication #:
Pub Dt:
06/07/2007
Title:
AUTOMATED SIMULATION TESTBENCH GENERATION FOR SERIALIZER/DESERIALIZER DATAPATH SYSTEMS
2
Patent #:
Issue Dt:
02/09/2010
Application #:
11275058
Filing Dt:
12/06/2005
Publication #:
Pub Dt:
06/07/2007
Title:
ON DEMAND CIRCUIT FUNCTION EXECUTION EMPLOYING OPTICAL SENSING
3
Patent #:
Issue Dt:
02/02/2010
Application #:
11275076
Filing Dt:
12/08/2005
Publication #:
Pub Dt:
06/14/2007
Title:
A METHOD FOR IC WIRING YIELD OPTIMIZATION, INCLUDING WIRE WIDENING DURING AND AFTER ROUTING
4
Patent #:
Issue Dt:
06/14/2016
Application #:
11275091
Filing Dt:
12/09/2005
Publication #:
Pub Dt:
06/14/2007
Title:
METHOD AND SYSTEM OF COMMUNICATING BETWEEN PEER PROCESSORS IN SoC ENVIRONMENT
5
Patent #:
Issue Dt:
12/07/2010
Application #:
11275092
Filing Dt:
12/09/2005
Publication #:
Pub Dt:
07/19/2007
Title:
METHOD AND SYSTEM OF COHERENT DESIGN VERIFICATION OF INTER-CLUSTER INTERACTIONS
6
Patent #:
Issue Dt:
02/24/2009
Application #:
11275275
Filing Dt:
12/21/2005
Publication #:
Pub Dt:
06/21/2007
Title:
SEMICONDUCTOR YIELD ESTIMATION
7
Patent #:
Issue Dt:
10/26/2010
Application #:
11275417
Filing Dt:
12/30/2005
Publication #:
Pub Dt:
07/05/2007
Title:
PIXEL ARRAY, IMAGING SENSOR INCLUDING THE PIXEL ARRAY AND DIGITAL CAMERA INCLUDING THE IMAGING SENSOR
8
Patent #:
Issue Dt:
09/21/2010
Application #:
11275481
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
08/09/2007
Title:
INTEGRATED CIRCUIT STRUCTURES WITH SILICON GERMANIUM FILM INCORPORATED AS LOCAL INTERCONNECT AND/OR CONTACT
9
Patent #:
Issue Dt:
12/30/2008
Application #:
11275482
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
04/27/2006
Title:
INTEGRATED CIRCUIT STRUCTURES FOR PREVENTING CHARGING DAMAGE
10
Patent #:
Issue Dt:
04/14/2009
Application #:
11275492
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
07/12/2007
Title:
SRAM ARRAY AND ANALOG FET WITH DUAL-STRAIN LAYERS COMPRISING RELAXED REGIONS
11
Patent #:
Issue Dt:
01/06/2009
Application #:
11275514
Filing Dt:
01/11/2006
Publication #:
Pub Dt:
07/12/2007
Title:
SEMICONDUCTOR TRANSISTORS WITH EXPANDED TOP PORTIONS OF GATES
12
Patent #:
Issue Dt:
09/07/2010
Application #:
11275536
Filing Dt:
01/12/2006
Publication #:
Pub Dt:
07/12/2007
Title:
METHOD FOR INCREASING THE MANUFACTURING YIELD OF PROGRAMMABLE LOGIC DEVICES
13
Patent #:
Issue Dt:
07/01/2008
Application #:
11275540
Filing Dt:
01/13/2006
Publication #:
Pub Dt:
05/11/2006
Title:
MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERATING CONDITION AS ARRAY
14
Patent #:
Issue Dt:
10/13/2009
Application #:
11275604
Filing Dt:
01/19/2006
Publication #:
Pub Dt:
08/16/2007
Title:
DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE
15
Patent #:
Issue Dt:
12/04/2007
Application #:
11275611
Filing Dt:
01/19/2006
Publication #:
Pub Dt:
07/19/2007
Title:
INTEGRATED THIN-FILM RESISTOR WITH DIRECT CONTACT
16
Patent #:
Issue Dt:
11/20/2007
Application #:
11275638
Filing Dt:
01/20/2006
Publication #:
Pub Dt:
07/26/2007
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
17
Patent #:
Issue Dt:
10/28/2008
Application #:
11275644
Filing Dt:
01/20/2006
Publication #:
Pub Dt:
07/26/2007
Title:
STRUCTURE AND METHOD FOR ENHANCED TRIPLE WELL LATCHUP ROBUSTNESS
18
Patent #:
Issue Dt:
05/26/2009
Application #:
11275694
Filing Dt:
01/25/2006
Publication #:
Pub Dt:
07/26/2007
Title:
SYSTEM AND METHOD FOR STORING AND TRANSPORTING PHOTOMASKS IN FLUID
19
Patent #:
Issue Dt:
01/08/2008
Application #:
11275773
Filing Dt:
01/27/2006
Publication #:
Pub Dt:
04/20/2006
Title:
NOISE REDUCTION IN DIGITAL SYSTEMS
20
Patent #:
Issue Dt:
06/16/2009
Application #:
11275867
Filing Dt:
02/01/2006
Publication #:
Pub Dt:
08/02/2007
Title:
SOLDER WALL STRUCTURE IN FLIP-CHIP TECHNOLOGIES
21
Patent #:
Issue Dt:
11/13/2007
Application #:
11276024
Filing Dt:
02/10/2006
Publication #:
Pub Dt:
05/04/2006
Title:
METHOD TO ELIMINATE ARSENIC CONTAMINATION IN TRENCH CAPACITORS
22
Patent #:
Issue Dt:
02/09/2010
Application #:
11276085
Filing Dt:
02/14/2006
Publication #:
Pub Dt:
08/16/2007
Title:
A CMOS IMAGER PHOTODIODE WITH ENHANCED CAPACITANCE
23
Patent #:
Issue Dt:
08/10/2010
Application #:
11276130
Filing Dt:
02/15/2006
Publication #:
Pub Dt:
08/16/2007
Title:
SWITCHING SYSTEM FOR SIGNAL MONITORING AND SWITCH-BACK CONTROL
24
Patent #:
NONE
Issue Dt:
Application #:
11276160
Filing Dt:
02/16/2006
Publication #:
Pub Dt:
08/16/2007
Title:
PIXEL SENSOR STRUCTURE INCLUDING LIGHT PIPE AND METHOD FOR FABRICATION THEREOF
25
Patent #:
Issue Dt:
01/05/2010
Application #:
11276232
Filing Dt:
02/20/2006
Publication #:
Pub Dt:
08/23/2007
Title:
PHASE CALIBRATION FOR ATTENUATING PHASE-SHIFT MASKS
26
Patent #:
Issue Dt:
02/01/2011
Application #:
11276236
Filing Dt:
02/20/2006
Publication #:
Pub Dt:
08/23/2007
Title:
PROCESSOR PIPELINE ARCHITECTURE LOGIC STATE RETENTION SYSTEMS AND METHODS
27
Patent #:
Issue Dt:
06/15/2010
Application #:
11276248
Filing Dt:
02/21/2006
Publication #:
Pub Dt:
08/23/2007
Title:
METHOD FOR NEUTRALIZING TRAPPED CHARGE IN A CHARGE ACCUMULATION LAYER OF A SEMICONDUCTOR STRUCTURE
28
Patent #:
Issue Dt:
03/22/2011
Application #:
11276282
Filing Dt:
02/22/2006
Publication #:
Pub Dt:
08/23/2007
Title:
METHOD OF FABRICATING A PRECISION BURIED RESISTOR
29
Patent #:
Issue Dt:
05/12/2009
Application #:
11276366
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
MULTI-ORIENTATION SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE, AND METHOD OF FABRICATING SAME
30
Patent #:
Issue Dt:
07/14/2009
Application #:
11276369
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
HIGH PERFORMANCE TAPERED VARACTOR
31
Patent #:
Issue Dt:
08/14/2007
Application #:
11276380
Filing Dt:
02/27/2006
Publication #:
Pub Dt:
08/30/2007
Title:
CHIP UNDERFILL IN FLIP-CHIP TECHNOLOGIES
32
Patent #:
Issue Dt:
02/10/2009
Application #:
11276413
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
MICROCONTROLLER FOR LOGIC BUILT-IN SELF TEST (LBIST)
33
Patent #:
Issue Dt:
05/05/2009
Application #:
11276433
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
TESTING OF MULTIPLE ASYNCHRONOUS LOGIC DOMAINS
34
Patent #:
Issue Dt:
11/11/2008
Application #:
11276451
Filing Dt:
02/28/2006
Publication #:
Pub Dt:
08/30/2007
Title:
INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES
35
Patent #:
Issue Dt:
02/10/2009
Application #:
11276511
Filing Dt:
03/03/2006
Publication #:
Pub Dt:
09/06/2007
Title:
IDENTIFYING PARASITIC DIODE(S) IN AN INTEGRATED CIRCUIT PHYSICAL DESIGN
36
Patent #:
Issue Dt:
04/28/2009
Application #:
11277306
Filing Dt:
03/23/2006
Publication #:
Pub Dt:
10/18/2007
Title:
ERROR DETECTION AND CORRECTION IN SEMICONDUCTOR STRUCTURES
37
Patent #:
Issue Dt:
07/22/2008
Application #:
11277315
Filing Dt:
03/23/2006
Publication #:
Pub Dt:
09/27/2007
Title:
METHOD OF IMPROVING FUSE STATE DETECTION AND YIELD IN SEMICONDUCTOR APPLICATIONS
38
Patent #:
Issue Dt:
07/22/2008
Application #:
11277385
Filing Dt:
03/24/2006
Publication #:
Pub Dt:
09/27/2007
Title:
STATIC TIMING SLACKS ANALYSIS AND MODIFICATION
39
Patent #:
Issue Dt:
01/20/2009
Application #:
11277398
Filing Dt:
03/24/2006
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD OF FORMING A CRACK STOP VOID IN A LOW-K DIELECTRIC LAYER BETWEEN ADJACENT FUSEES
40
Patent #:
Issue Dt:
04/29/2008
Application #:
11277677
Filing Dt:
03/28/2006
Publication #:
Pub Dt:
10/11/2007
Title:
DUAL-PLANE COMPLEMENTARY METAL OXIDE SEMICONDUCTOR
41
Patent #:
Issue Dt:
10/16/2007
Application #:
11278118
Filing Dt:
03/30/2006
Publication #:
Pub Dt:
10/04/2007
Title:
METHODS OF CREATING A DICTIONARY FOR DATA COMPRESSION
42
Patent #:
Issue Dt:
02/10/2009
Application #:
11278162
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
10/04/2007
Title:
METHOD FOR IMPLEMENTING OVERLAY-BASED MODIFICATION OF VLSI DESIGN LAYOUT
43
Patent #:
Issue Dt:
12/11/2007
Application #:
11278169
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
10/04/2007
Title:
APPARATUS FOR IMPLEMENTING DYNAMIC DATA PATH WITH INTERLOCKED KEEPER AND RESTORE DEVICES
44
Patent #:
Issue Dt:
11/18/2008
Application #:
11278262
Filing Dt:
03/31/2006
Publication #:
Pub Dt:
10/04/2007
Title:
METHOD AND ARCHITECTURE FOR POWER MANAGEMENT OF AN ELECTRONIC DEVICE
45
Patent #:
Issue Dt:
03/03/2009
Application #:
11278910
Filing Dt:
04/06/2006
Publication #:
Pub Dt:
07/27/2006
Title:
PROTECTING SILICON GERMANIUM SIDEWALL WITH SILICON FOR STRAINED SILICON/SILICON MOSFETS
46
Patent #:
Issue Dt:
07/15/2008
Application #:
11278924
Filing Dt:
04/06/2006
Publication #:
Pub Dt:
07/27/2006
Title:
METHODOLOGY FOR PLACEMENT BASED ON CIRCUIT FUNCTION AND LATCHUP SENSITIVITY
47
Patent #:
Issue Dt:
10/06/2009
Application #:
11279019
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
10/11/2007
Title:
LOW LEAKAGE METAL-CONTAINING CAP PROCESS USING OXIDATION
48
Patent #:
Issue Dt:
10/23/2007
Application #:
11279063
Filing Dt:
04/07/2006
Publication #:
Pub Dt:
10/11/2007
Title:
INTEGRATED CIRCUIT CHIP WITH FETS HAVING MIXED BODY THICKNESSES AND METHOD OF MANUFACTURE THEREOF
49
Patent #:
Issue Dt:
12/02/2008
Application #:
11279237
Filing Dt:
04/10/2006
Publication #:
Pub Dt:
10/18/2007
Title:
METHODS AND READABLE MEDIA FOR USING RELATIVE POSITIONING IN STRUCTURES WITH DYNAMIC RANGES
50
Patent #:
Issue Dt:
10/14/2008
Application #:
11279283
Filing Dt:
04/11/2006
Publication #:
Pub Dt:
10/11/2007
Title:
VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GRID CONSTRAINTS
51
Patent #:
Issue Dt:
02/03/2009
Application #:
11279300
Filing Dt:
04/11/2006
Publication #:
Pub Dt:
10/11/2007
Title:
METHOD FOR COMPUTING THE SENSITIVITY OF A VLSI DESIGN TO BOTH RANDOM AND SYSTEMATIC DEFECTS USING A CRITICAL AREA ANALYSIS TOOL
52
Patent #:
Issue Dt:
09/09/2008
Application #:
11279312
Filing Dt:
04/11/2006
Publication #:
Pub Dt:
10/18/2007
Title:
METHOD FOR VERIFYING PERFORMANCE OF AN ARRAY BY SIMULATING OPERATION OF EDGE CELLS IN A FULL ARRAY MODEL
53
Patent #:
Issue Dt:
04/29/2008
Application #:
11279434
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
10/18/2007
Title:
VERTICAL PARALLEL PLATE CAPACITOR USING SPACER SHAPED ELECTRODES AND METHOD FOR FABRICATION THEREOF
54
Patent #:
Issue Dt:
12/02/2008
Application #:
11279507
Filing Dt:
04/12/2006
Publication #:
Pub Dt:
10/18/2007
Title:
DETERMINING HISTORY STATE OF DATA BASED ON STATE OF PARTIALLY DEPLETED SILICON-ON-INSULATOR
55
Patent #:
Issue Dt:
07/08/2008
Application #:
11279639
Filing Dt:
04/13/2006
Publication #:
Pub Dt:
11/08/2007
Title:
DETERMINING RELATIVE AMOUNT OF USAGE OF DATA RETAINING DEVICE BASED ON POTENTIAL OF CHARGE STORING DEVICE
56
Patent #:
NONE
Issue Dt:
Application #:
11279659
Filing Dt:
04/13/2006
Publication #:
Pub Dt:
08/24/2006
Title:
Field Effect Transistor With Etched-Back Gate Dielectric
57
Patent #:
Issue Dt:
01/27/2009
Application #:
11279758
Filing Dt:
04/14/2006
Publication #:
Pub Dt:
10/18/2007
Title:
MINIMUM LAYOUT PERTURBATION-BASED ARTWORK LEGALIZATION WITH GRID CONSTRAINTS FOR HIERARCHICAL DESIGNS
58
Patent #:
Issue Dt:
05/18/2010
Application #:
11279934
Filing Dt:
04/17/2006
Publication #:
Pub Dt:
10/18/2007
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURE
59
Patent #:
Issue Dt:
09/11/2007
Application #:
11279962
Filing Dt:
04/17/2006
Title:
WELL ISOLATION TRENCHES (WIT) FOR CMOS DEVICES
60
Patent #:
Issue Dt:
07/28/2009
Application #:
11281032
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
06/29/2006
Title:
DEPOSITION OF HAFNIUM OXIDE AND/OR ZIRCONIUM OXIDE AND FABRICATION OF PASSIVATED ELECTRONIC STRUCTURES
61
Patent #:
Issue Dt:
04/14/2009
Application #:
11281196
Filing Dt:
11/16/2005
Publication #:
Pub Dt:
07/19/2007
Title:
PLUG-IN PROBLEM RELIEF ACTUATORS
62
Patent #:
Issue Dt:
04/08/2008
Application #:
11281688
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
05/17/2007
Title:
PRINTED CIRCUIT BOARD AND CHIP MODULE
63
Patent #:
Issue Dt:
06/22/2010
Application #:
11282041
Filing Dt:
11/17/2005
Publication #:
Pub Dt:
05/17/2007
Title:
CIRCUIT ON A PRINTED CIRCUIT BOARD
64
Patent #:
Issue Dt:
11/20/2007
Application #:
11283882
Filing Dt:
11/22/2005
Publication #:
Pub Dt:
04/06/2006
Title:
METHOD FOR REDUCED N+ DIFFUSION IN STRAINED SI ON SIGE SUBSTRATE
65
Patent #:
NONE
Issue Dt:
Application #:
11284358
Filing Dt:
11/21/2005
Publication #:
Pub Dt:
05/24/2007
Title:
Water castable-water strippable top coats for 193 nm immersion lithography
66
Patent #:
Issue Dt:
11/16/2010
Application #:
11285338
Filing Dt:
11/22/2005
Publication #:
Pub Dt:
05/24/2007
Title:
SATISFIABILITY (SAT) BASED BOUNDED MODEL CHECKERS
67
Patent #:
Issue Dt:
08/11/2009
Application #:
11286582
Filing Dt:
11/25/2005
Publication #:
Pub Dt:
05/18/2006
Title:
DATA STORAGE SYSTEMS
68
Patent #:
Issue Dt:
06/10/2008
Application #:
11289066
Filing Dt:
11/29/2005
Publication #:
Pub Dt:
05/31/2007
Title:
GENERATION OF HARDWARE THERMAL PROFILES FOR A SET OF PROCESSORS
69
Patent #:
Issue Dt:
10/28/2008
Application #:
11293774
Filing Dt:
12/02/2005
Publication #:
Pub Dt:
04/20/2006
Title:
ULTRA-THIN, HIGH QUALITY STRAINED SILICON-ON-INSULATOR FORMED BY ELASTIC STRAIN TRANSFER
70
Patent #:
NONE
Issue Dt:
Application #:
11293990
Filing Dt:
12/05/2005
Publication #:
Pub Dt:
04/20/2006
Title:
Fabrication of semiconductor dies with micro-pins and structures produced therewith
71
Patent #:
Issue Dt:
01/27/2009
Application #:
11295936
Filing Dt:
12/07/2005
Publication #:
Pub Dt:
06/07/2007
Title:
CLOCK-GATING THROUGH DATA INDEPENDENT LOGIC
72
Patent #:
NONE
Issue Dt:
Application #:
11296780
Filing Dt:
12/07/2005
Publication #:
Pub Dt:
07/06/2006
Title:
Method of achieving timing closure in digital integrated circuits by optimizing individual macros
73
Patent #:
Issue Dt:
12/09/2008
Application #:
11297308
Filing Dt:
12/08/2005
Publication #:
Pub Dt:
06/14/2007
Title:
METHOD AND APPARATUS FOR PERFORMING TEMPORAL CHECKING
74
Patent #:
Issue Dt:
03/11/2008
Application #:
11297730
Filing Dt:
12/08/2005
Publication #:
Pub Dt:
06/14/2007
Title:
METHODS AND APPARATUS FOR INLINE VARIABILITY MEASUREMENT OF INTEGRATED CIRCUIT COMPONENTS
75
Patent #:
Issue Dt:
10/31/2006
Application #:
11298800
Filing Dt:
12/09/2005
Publication #:
Pub Dt:
05/04/2006
Title:
OUT OF THE BOX VERTICAL TRANSISTOR FOR EDRAM ON SOI
76
Patent #:
Issue Dt:
12/16/2008
Application #:
11299497
Filing Dt:
12/12/2005
Publication #:
Pub Dt:
05/18/2006
Title:
DATABASE MINING METHOD AND COMPUTER READABLE MEDIUM CARRYING INSTRUCTIONS FOR COVERAGE ANALYSIS OF FUNCTIONAL VERIFICATION OF INTEGRATED CIRCUIT DESIGNS
77
Patent #:
Issue Dt:
12/04/2007
Application #:
11299682
Filing Dt:
12/13/2005
Publication #:
Pub Dt:
07/20/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD HAVING MULTIPLE SUBCOLLECTORS FORMED ON A COMMON WAFER
78
Patent #:
Issue Dt:
03/24/2009
Application #:
11301112
Filing Dt:
12/12/2005
Publication #:
Pub Dt:
06/14/2007
Title:
EXTENDING INCREMENTAL VERIFICATION OF CIRCUIT DESIGN TO ENCOMPASS VERIFICATION RESTRAINTS
79
Patent #:
Issue Dt:
08/04/2009
Application #:
11303715
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
DUAL METAL GATE SELF-ALIGNED INTEGRATION
80
Patent #:
Issue Dt:
10/14/2008
Application #:
11303792
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
SYSTEM AND METHOD OF CRITICALITY PREDICTION IN STATISTICAL TIMING ANALYSIS
81
Patent #:
Issue Dt:
08/21/2007
Application #:
11304799
Filing Dt:
12/14/2005
Publication #:
Pub Dt:
06/14/2007
Title:
METHOD AND SYSTEM FOR PERFORMING CHARACTER-BASED STREAMING OF MIXED-BYTE ENCODED DATA
82
Patent #:
Issue Dt:
12/09/2008
Application #:
11304955
Filing Dt:
12/15/2005
Publication #:
Pub Dt:
06/21/2007
Title:
METHOD AND APPARATUS FOR DIFFUSION BASED CELL PLACEMENT MIGRATION
83
Patent #:
Issue Dt:
05/18/2010
Application #:
11305584
Filing Dt:
12/16/2005
Publication #:
Pub Dt:
06/21/2007
Title:
FORMATION OF RAISED SOURCE/DRAIN STRUCTURES IN NFET WITH EMBEDDED SIGE IN PFET
84
Patent #:
Issue Dt:
10/14/2008
Application #:
11306597
Filing Dt:
01/04/2006
Publication #:
Pub Dt:
07/12/2007
Title:
ELECTRICAL FUSES COMPRISING THIN FILM TRANSISTORS (TFTS), AND METHODS FOR PROGRAMMING SAME
85
Patent #:
Issue Dt:
02/05/2008
Application #:
11306669
Filing Dt:
01/06/2006
Publication #:
Pub Dt:
07/12/2007
Title:
TRENCH MEMORY
86
Patent #:
Issue Dt:
09/06/2011
Application #:
11306670
Filing Dt:
01/06/2006
Publication #:
Pub Dt:
07/12/2007
Title:
TRANSISTORS WITH GATE STACKS HAVING METAL ELECTRODES
87
Patent #:
Issue Dt:
09/22/2009
Application #:
11306708
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
07/12/2007
Title:
RETICLE STORAGE POD (RSP) TRANSPORT SYSTEM UTILIZING FOUP ADAPTER PLATE
88
Patent #:
Issue Dt:
07/14/2009
Application #:
11306709
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
07/12/2007
Title:
SEMICONDUCTOR STRUCTURE INCLUDING TRENCH CAPACITOR AND TRENCH RESISTOR
89
Patent #:
Issue Dt:
08/17/2010
Application #:
11306716
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
07/12/2007
Title:
SEMICONDUCTOR DEVICE STRUCTURE HAVING LOW AND HIGH PERFORMANCE DEVICES OF SAME CONDUCTIVE TYPE ON SAME SUBSTRATE
90
Patent #:
Issue Dt:
08/26/2008
Application #:
11306719
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
07/12/2007
Title:
AIR BREAK FOR IMPROVED SILICIDE FORMATION WITH COMPOSITE CAPS
91
Patent #:
Issue Dt:
08/31/2010
Application #:
11306720
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
08/07/2008
Title:
PROBE TIP CLEANING APPARATUS AND METHOD OF USE
92
Patent #:
Issue Dt:
01/04/2011
Application #:
11306721
Filing Dt:
01/09/2006
Publication #:
Pub Dt:
10/23/2008
Title:
METHOD OF FORMING A CROSS-SECTION HOURGLASS SHAPED CHANNEL REGION FOR CHARGE CARRIER MOBILITY MODIFICATION
93
Patent #:
Issue Dt:
09/08/2009
Application #:
11306746
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
07/12/2007
Title:
INTEGRATED CIRCUIT COMB CAPACITOR
94
Patent #:
Issue Dt:
03/17/2009
Application #:
11306748
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
12/06/2007
Title:
CMOS WITH DUAL METAL GATE
95
Patent #:
Issue Dt:
02/03/2009
Application #:
11306749
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD OF MANUFACTURING A MULTIPLE PORT MEMORY HAVING A PLURALITY OF PARALLEL CONNECTED TRENCH CAPACITORS IN A CELL
96
Patent #:
Issue Dt:
03/10/2009
Application #:
11306750
Filing Dt:
01/10/2006
Publication #:
Pub Dt:
09/20/2007
Title:
MULTILAYER OPC FOR DESIGN AWARE MANUFACTURING
97
Patent #:
Issue Dt:
01/06/2009
Application #:
11306825
Filing Dt:
01/12/2006
Publication #:
Pub Dt:
07/12/2007
Title:
METHOD TO IMPROVE TIME DEPENDENT DIELECTRIC BREAKDOWN
98
Patent #:
Issue Dt:
11/27/2007
Application #:
11306827
Filing Dt:
01/12/2006
Publication #:
Pub Dt:
07/26/2007
Title:
METHOD AND STRUCTURE TO PROCESS THICK AND THIN FINS AND VARIABLE FIN TO FIN SPACING
99
Patent #:
Issue Dt:
03/11/2008
Application #:
11306930
Filing Dt:
01/17/2006
Publication #:
Pub Dt:
07/19/2007
Title:
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE WITH A PLATING ENHANCEMENT LAYER
100
Patent #:
Issue Dt:
07/29/2008
Application #:
11306932
Filing Dt:
01/17/2006
Publication #:
Pub Dt:
07/19/2007
Title:
METHOD FOR DIRECT ELECTROPLATING OF COPPER ONTO A NON-COPPER PLATEABLE LAYER
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

Search Results as of: 05/28/2024 02:45 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT