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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:049490/0001   Pages: 892
Recorded: 11/29/2018
Conveyance: SECURITY AGREEMENT
1
Patent #:
Issue Dt:
07/22/2008
Application #:
11865305
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
02/07/2008
Title:
LAND GRID ARRAY (LGA) INTERPOSER UTILIZING METAL-ON-ELASTOMER HEMI-TORUS AND OTHER MULTIPLE POINTS OF CONTACT GEOMETRIES
2
Patent #:
Issue Dt:
05/20/2008
Application #:
11865395
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
01/31/2008
Title:
LAND GRID ARRAY (LGA) INTERPOSER UTILIZING METAL-ON-ELASTOMER HEMI-TORUS AND OTHER MULTIPLE POINTS OF CONTACT GEOMETRIES
3
Patent #:
Issue Dt:
04/22/2008
Application #:
11865423
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
01/24/2008
Title:
LAND GRID ARRAY (LGA) INTERPOSER UTILIZING METAL-ON-ELASTOMER HEMI-TORUS AND OTHER MULTIPLE POINTS OF CONTACT GEOMETRIES
4
Patent #:
Issue Dt:
04/22/2008
Application #:
11865440
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
01/31/2008
Title:
LAND GRID ARRAY (LGA) INTERPOSER UTILIZING METAL-ON-ELASTOMER HEMI-TORUS AND OTHER MULTIPLE POINTS OF CONTACT GEOMETRIES
5
Patent #:
Issue Dt:
06/14/2011
Application #:
11865728
Filing Dt:
10/01/2007
Publication #:
Pub Dt:
01/24/2008
Title:
METHOD AND APPARATUS FOR MANUFACTURING DIAMOND SHAPED CHIPS
6
Patent #:
Issue Dt:
07/10/2012
Application #:
11865780
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
12/10/2009
Title:
HIGH DENSITY STABLE STATIC RANDOM ACCESS MEMORY
7
Patent #:
Issue Dt:
12/16/2008
Application #:
11865797
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
02/07/2008
Title:
DETERMINING FLEET MATCHING PROBLEM AND ROOT CAUSE ISSUE FOR MEASUREMENT SYSTEM
8
Patent #:
Issue Dt:
02/22/2011
Application #:
11865982
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
04/02/2009
Title:
PHOTOMASK AND METHOD OF MAKING THEREOF
9
Patent #:
Issue Dt:
02/23/2010
Application #:
11866060
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
04/02/2009
Title:
METHOD AND APPARATUS FOR RANDOMIZING DISPATCH ORDER FOR SINGLE WAFER PROCESSING
10
Patent #:
Issue Dt:
11/13/2012
Application #:
11866110
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
03/20/2008
Title:
RATIOED FEEDBACK BODY VOLTAGE BIAS GENERATOR
11
Patent #:
Issue Dt:
01/06/2009
Application #:
11866435
Filing Dt:
10/03/2007
Publication #:
Pub Dt:
04/17/2008
Title:
CORNER DOMINATED TRIGATE FIELD EFFECT TRANSISTOR
12
Patent #:
Issue Dt:
08/30/2011
Application #:
11866455
Filing Dt:
10/03/2007
Publication #:
Pub Dt:
04/09/2009
Title:
METHODS FOR FABRICATING CONTACTS TO PILLAR STRUCTURES IN INTEGRATED CIRCUITS
13
Patent #:
Issue Dt:
05/10/2011
Application #:
11866461
Filing Dt:
10/03/2007
Publication #:
Pub Dt:
08/28/2008
Title:
SEMICONDUCTOR DEVICE HAVING A STRAINED SEMICONDUCTOR ALLOY CONCENTRATION PROFILE
14
Patent #:
Issue Dt:
03/02/2010
Application #:
11866502
Filing Dt:
10/03/2007
Publication #:
Pub Dt:
04/09/2009
Title:
CIRCUITS AND METHODS FOR CHARACTERIZING DEVICE VARIATION IN ELECTRONIC MEMORY CIRCUITS
15
Patent #:
Issue Dt:
03/06/2012
Application #:
11867235
Filing Dt:
10/04/2007
Publication #:
Pub Dt:
04/09/2009
Title:
FABRICATION OF SOI WITH GETTERING LAYER
16
Patent #:
Issue Dt:
03/29/2011
Application #:
11867428
Filing Dt:
10/04/2007
Publication #:
Pub Dt:
04/09/2009
Title:
MIXED LITHOGRAPHY WITH DUAL RESIST AND A SINGLE PATTERN TRANSFER
17
Patent #:
Issue Dt:
04/01/2014
Application #:
11867743
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
04/09/2009
Title:
ELECTRONIC DEVICE AND METHOD OF BIASING
18
Patent #:
Issue Dt:
04/13/2010
Application #:
11867840
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
11/20/2008
Title:
SIDEWALL SEMICONDUCTOR TRANSISTORS
19
Patent #:
Issue Dt:
03/20/2012
Application #:
11867995
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
01/01/2009
Title:
STRUCTURES AND METHODS OF FORMING SIGE AND SIGEC BURIED LAYER FOR SOI/SIGE TECHNOLOGY
20
Patent #:
Issue Dt:
04/28/2009
Application #:
11868046
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
01/31/2008
Title:
METHOD FOR IMPROVING SENSING MARGIN OF ELECTRICALLY PROGRAMMABLE FUSES
21
Patent #:
Issue Dt:
12/21/2010
Application #:
11868320
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
01/31/2008
Title:
IMMERSION TOPCOAT MATERIALS WITH IMPROVED PERFORMANCE
22
Patent #:
Issue Dt:
02/08/2011
Application #:
11868789
Filing Dt:
10/08/2007
Publication #:
Pub Dt:
08/28/2008
Title:
TECHNIQUE FOR PATTERNING DIFFERENTLY STRESSED LAYERS FORMED ABOVE TRANSISTORS BY ENHANCED ETCH CONTROL STRATEGIES
23
Patent #:
Issue Dt:
11/30/2010
Application #:
11869145
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
01/22/2009
Title:
ASYMMETRIC FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD
24
Patent #:
Issue Dt:
01/31/2012
Application #:
11869178
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
04/09/2009
Title:
SELF-ASSEMBLED SIDEWALL SPACER
25
Patent #:
Issue Dt:
10/16/2012
Application #:
11869179
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
04/09/2009
Title:
AN ON-CHIP IDENTIFICATION CIRCUIT INCORPORATING PAIRS OF CONDUCTORS, EACH HAVING AN ESSENTIALLY RANDOM CHANCE OF BEING SHORTED TOGETHER AS A RESULT OF PROCESS VARIATIONS
26
Patent #:
Issue Dt:
12/27/2011
Application #:
11869216
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
01/31/2008
Title:
STRUCTURE FOR DYNAMICALLY ADJUSTING PIPELINED DATA PATHS FOR IMPROVED POWER MANAGEMENT
27
Patent #:
Issue Dt:
02/21/2012
Application #:
11869306
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
04/09/2009
Title:
METHOD AND DEVICE FOR SELECTIVELY ADDING TIMING MARGIN IN AN INTEGRATED CIRCUIT
28
Patent #:
Issue Dt:
06/14/2011
Application #:
11869373
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
02/07/2008
Title:
PHOTORESIST TRIMMING PROCESS
29
Patent #:
Issue Dt:
01/17/2012
Application #:
11869522
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
04/09/2009
Title:
TWO-STEP SIMULATION METHODOLOGY FOR AGING SIMULATIONS
30
Patent #:
Issue Dt:
02/22/2011
Application #:
11869593
Filing Dt:
10/09/2007
Publication #:
Pub Dt:
01/31/2008
Title:
SPIN-CURRENT SWITCHABLE MAGNETIC MEMORY ELEMENT AND METHOD OF FABRICATING THE MEMORY ELEMENT
31
Patent #:
Issue Dt:
01/04/2011
Application #:
11869841
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
10/30/2008
Title:
IMPLEMENTING APS VOLTAGE LEVEL ACTIVATION WITH SECONDARY CHIP IN STACKED-CHIP TECHNOLOGY
32
Patent #:
Issue Dt:
06/08/2010
Application #:
11870167
Filing Dt:
10/10/2007
Publication #:
Pub Dt:
04/16/2009
Title:
PHOTOSENSITIVE SELF-ASSEMBLED MONOLAYER FOR SELECTIVE PLACEMENT OF HYDROPHILIC STRUCTURES
33
Patent #:
Issue Dt:
06/17/2008
Application #:
11870437
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
04/10/2008
Title:
LOCAL COLLECTOR IMPLANT STRUCTURE FOR HETEROJUNCTION BIPOLAR TRANSISTORS
34
Patent #:
Issue Dt:
02/03/2009
Application #:
11870463
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
07/24/2008
Title:
WAVEGUIDE POLARIZATION BEAM SPLITTERS AND METHOD OF FABRICATING A WAVEGUIDE WIRE-GRID POLARIZATION BEAM SPLITTER
35
Patent #:
Issue Dt:
09/01/2009
Application #:
11870567
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
02/14/2008
Title:
SEMICONDUCTOR DEVICES
36
Patent #:
Issue Dt:
02/21/2012
Application #:
11870575
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
01/22/2009
Title:
STRUCTURE AND METHOD TO OPTIMIZE COMPUTATIONAL EFFICIENCY IN LOW-POWER ENVIRONMENTS
37
Patent #:
Issue Dt:
10/09/2012
Application #:
11870875
Filing Dt:
10/11/2007
Publication #:
Pub Dt:
07/19/2012
Title:
SOLID STATE KLYSTRON
38
Patent #:
Issue Dt:
02/01/2011
Application #:
11871179
Filing Dt:
10/12/2007
Publication #:
Pub Dt:
04/16/2009
Title:
METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR AUTOMATICALLY WAIVING NON-COMPUTE INDICATIONS FOR A TIMING ANALYSIS PROCESS
39
Patent #:
Issue Dt:
11/30/2010
Application #:
11871204
Filing Dt:
10/12/2007
Publication #:
Pub Dt:
04/16/2009
Title:
SEMICONDUCTOR CHIP PACKAGES HAVING REDUCED STRESS
40
Patent #:
Issue Dt:
05/17/2011
Application #:
11871713
Filing Dt:
10/12/2007
Publication #:
Pub Dt:
10/16/2008
Title:
APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
41
Patent #:
Issue Dt:
11/18/2008
Application #:
11872060
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
02/07/2008
Title:
METHOD OF INSPECTING INTEGRATED CIRCUITS DURING FABRICATION
42
Patent #:
Issue Dt:
07/29/2008
Application #:
11872085
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD AND APPARATUS FOR IN-SYSTEM REDUNDANT ARRAY REPAIR ON INTEGRATED CIRCUITS
43
Patent #:
Issue Dt:
07/08/2008
Application #:
11872088
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
04/03/2008
Title:
METHOD AND APPARATUS FOR IN-SYSTEM REDUNDANT ARRAY REPAIR ON INTEGRATED CIRCUITS
44
Patent #:
Issue Dt:
03/20/2012
Application #:
11872168
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
04/16/2009
Title:
DISPLAY OF DATA USED FOR SYSTEM PERFORMANCE ANALYSIS
45
Patent #:
Issue Dt:
10/27/2009
Application #:
11872273
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
02/07/2008
Title:
DESIGN STRUCTURE FOR IMPROVING SENSING MARGIN OF ELECTRICALLY PROGRAMMABLE FUSES
46
Patent #:
Issue Dt:
10/30/2012
Application #:
11872291
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
05/31/2012
Title:
SEMICONDUCTOR STRUCTURES HAVING IMPROVED CONTACT RESISTANCE
47
Patent #:
Issue Dt:
10/13/2009
Application #:
11872399
Filing Dt:
10/15/2007
Publication #:
Pub Dt:
07/31/2008
Title:
METHODS FOR FABRICATING DEVICE FEATURES HAVING SMALL DIMENSIONS
48
Patent #:
Issue Dt:
02/08/2011
Application #:
11872731
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
DESIGN STRUCTURE FOR PERFORMING ITERATIVE SYNTHESIS OF AN INTEGRATED CIRCUIT DESIGN TO ATTAIN POWER CLOSURE
49
Patent #:
Issue Dt:
02/08/2011
Application #:
11872796
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
CONDUCTOR STRUCTURE INCLUDING MANGANESE OXIDE CAPPING LAYER
50
Patent #:
Issue Dt:
03/22/2011
Application #:
11872870
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
CURRENT DISTRIBUTION STRUCTURE AND METHOD
51
Patent #:
Issue Dt:
12/28/2010
Application #:
11872924
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
DESIGN STRUCTURE FOR PARTITIONED DUMMY FILL SHAPES FOR REDUCED MASK BIAS WITH ALTERNATING PHASE SHIFT MASKS
52
Patent #:
Issue Dt:
05/31/2011
Application #:
11872970
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
DEEP TRENCH CAPACITOR AND METHOD
53
Patent #:
Issue Dt:
02/15/2011
Application #:
11873092
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
04/16/2009
Title:
METHOD FOR CREATING WAFER BATCHES IN AN AUTOMATED BATCH PROCESS TOOL
54
Patent #:
Issue Dt:
07/12/2011
Application #:
11873316
Filing Dt:
10/16/2007
Publication #:
Pub Dt:
09/04/2008
Title:
FIELD EFFECT TRANSISTOR DEVICE INCLUDING AN ARRAY OF CHANNEL ELEMENTS
55
Patent #:
Issue Dt:
10/07/2014
Application #:
11873455
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
AUTOMATED INTEGRATION OF FEEDBACK FROM FIELD FAILURE TO ORDER CONFIGURATOR FOR DYNAMIC OPTIMIZATION OF MANUFACTURING TEST PROCESSES
56
Patent #:
Issue Dt:
10/12/2010
Application #:
11873515
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
DESIGN STRUCTURE FOR MULTIPLE SOURCE-SINGLE DRAIN FIELD EFFECT SEMICONDUCTOR DEVICE AND CIRCUIT
57
Patent #:
Issue Dt:
12/14/2010
Application #:
11873521
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
FIN-TYPE FIELD EFFECT TRANSISTOR STRUCTURE WITH MERGED SOURCE/DRAIN SILICIDE AND METHOD OF FORMING THE STRUCTURE
58
Patent #:
Issue Dt:
10/27/2009
Application #:
11873534
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
01/29/2009
Title:
IMPLEMENTING ENHANCED SRAM READ PERFORMANCE SORT RING OSCILLATOR (PSRO)
59
Patent #:
Issue Dt:
03/08/2011
Application #:
11873711
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
DESIGN STRUCTURES INCLUDING MEANS FOR LATERAL CURRENT CARRYING CAPABILITY IMPROVEMENT IN SEMICONDUCTOR DEVICES
60
Patent #:
Issue Dt:
02/22/2011
Application #:
11873919
Filing Dt:
10/17/2007
Publication #:
Pub Dt:
04/23/2009
Title:
SYSTEM FOR IMPROVING A LOGIC CIRCUIT AND ASSOCIATED METHODS
61
Patent #:
Issue Dt:
02/21/2012
Application #:
11874232
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
METHOD AND APPARATUS FOR PARALLEL AND SERIAL DATA TRANSFER
62
Patent #:
Issue Dt:
11/23/2010
Application #:
11874281
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
02/14/2008
Title:
SIMULTANEOUS COMPUTATION OF MULTIPLE POINTS ON ONE OR MULTIPLE CUT LINES
63
Patent #:
Issue Dt:
02/15/2011
Application #:
11874402
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
10/02/2008
Title:
PROCESSOR COMPRISING A FIRST AND A SECOND MODE OF OPERATION AND METHOD OF OPERATING THE SAME
64
Patent #:
Issue Dt:
02/01/2011
Application #:
11874454
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
BODY TIE TEST STRUCTURE FOR ACCURATE BODY EFFECT MEASUREMENT
65
Patent #:
Issue Dt:
08/23/2011
Application #:
11874518
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
METHOD OF OPTIMIZING QUEUE TIMES IN A PRODUCTION CYCLE
66
Patent #:
Issue Dt:
06/07/2011
Application #:
11874565
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
SEMICONDUCTOR-ON-INSULATOR SUBSTRATE WITH A DIFFUSION BARRIER
67
Patent #:
Issue Dt:
03/05/2013
Application #:
11874582
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
PROGRAMMABLE VIA DEVICES
68
Patent #:
Issue Dt:
01/25/2011
Application #:
11874620
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
02/14/2008
Title:
ACCURATELY MODELING AN ASYNCHRONOUS INTERFACE USING EXPANDED LOGIC ELEMENTS
69
Patent #:
Issue Dt:
11/22/2011
Application #:
11874861
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
04/23/2009
Title:
ON-CHIP TEMPERATURE GRADIENT MINIMIZATION USING CARBON NANOTUBE COOLING STRUCTURES WITH VARIABLE COOLING CAPACITY
70
Patent #:
Issue Dt:
10/21/2008
Application #:
11875004
Filing Dt:
10/19/2007
Publication #:
Pub Dt:
02/14/2008
Title:
MEMORY ARRAY HAVING A REDUNDANT MEMORY ELEMENT
71
Patent #:
Issue Dt:
05/25/2010
Application #:
11875011
Filing Dt:
10/19/2007
Publication #:
Pub Dt:
02/14/2008
Title:
ENABLING MEMORY REDUNDANCY DURING TESTING
72
Patent #:
Issue Dt:
07/19/2011
Application #:
11875013
Filing Dt:
10/19/2007
Publication #:
Pub Dt:
02/07/2008
Title:
DESIGN STRUCTURES INCORPORATING SEMICONDUCTOR DEVICE STRUCTURES WITH REDUCED JUNCTION CAPACITANCE AND DRAIN INDUCED BARRIER LOWERING
73
Patent #:
Issue Dt:
10/26/2010
Application #:
11875032
Filing Dt:
10/19/2007
Publication #:
Pub Dt:
04/23/2009
Title:
TRANSITION BALANCING FOR NOISE REDUCTION/DI/DT REDUCTION DURING DESIGN, SYNTHESIS, AND PHYSICAL DESIGN
74
Patent #:
Issue Dt:
07/19/2011
Application #:
11875193
Filing Dt:
10/19/2007
Publication #:
Pub Dt:
05/22/2008
Title:
DESIGN STRUCTURES INCORPORATING INTERCONNECT STRUCTURES WITH IMPROVED ELECTROMIGRATION RESISTANCE
75
Patent #:
Issue Dt:
02/28/2012
Application #:
11876035
Filing Dt:
10/22/2007
Publication #:
Pub Dt:
02/28/2008
Title:
IMPROVING DESIGN MANUFACTURING, AND TRANSPORTATION IN MASS MANUFACTURING THROUGH ANALYSIS OF DEFECT DATA
76
Patent #:
Issue Dt:
02/17/2009
Application #:
11876605
Filing Dt:
10/22/2007
Publication #:
Pub Dt:
02/28/2008
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
77
Patent #:
Issue Dt:
03/29/2011
Application #:
11877016
Filing Dt:
10/23/2007
Publication #:
Pub Dt:
04/23/2009
Title:
CONTROLLED DOPING OF SEMICONDUCTOR NANOWIRES
78
Patent #:
Issue Dt:
06/17/2008
Application #:
11877859
Filing Dt:
10/24/2007
Title:
MECHANICALLY DECOUPLED OPTO-MECHANICAL CONNECTOR FOR FLEXIBLE OPTICAL WAVEGUIDES EMBEDDED AND/OR ATTACHED TO A PRINTED CIRCUIT BOARD
79
Patent #:
Issue Dt:
08/19/2008
Application #:
11877898
Filing Dt:
10/24/2007
Title:
LIMITED SWITCH DYNAMIC LOGIC CELL BASED REGISTER
80
Patent #:
Issue Dt:
11/13/2012
Application #:
11879937
Filing Dt:
07/18/2007
Publication #:
Pub Dt:
01/22/2009
Title:
TEST STRUCTURE FOR DETERMINING GATE-TO-BODY TUNNELING CURRENT IN A FLOATING BODY FET
81
Patent #:
Issue Dt:
09/07/2010
Application #:
11882163
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
02/05/2009
Title:
METHOD AND MATERIALS FOR PATTERNING A NEUTRAL SURFACE
82
Patent #:
Issue Dt:
11/16/2010
Application #:
11891165
Filing Dt:
08/09/2007
Publication #:
Pub Dt:
08/28/2008
Title:
TIME STAMPING TRANSACTIONS TO VALIDATE ATOMIC OPERATIONS IN MULTIPROCESSOR SYSTEMS
83
Patent #:
Issue Dt:
03/23/2010
Application #:
11923152
Filing Dt:
10/24/2007
Publication #:
Pub Dt:
07/31/2008
Title:
PHASE SHIFTING AND COMBINING ARCHITECTURE FOR PHASED ARRAYS
84
Patent #:
Issue Dt:
12/21/2010
Application #:
11923413
Filing Dt:
10/24/2007
Publication #:
Pub Dt:
02/14/2008
Title:
METHOD AND STRUCTURE FOR CONTROLLED IMPEDANCE WIRE BONDS USING CO-DISPENSING OF DIELECTRIC SPACERS
85
Patent #:
Issue Dt:
08/09/2011
Application #:
11923663
Filing Dt:
12/03/2007
Publication #:
Pub Dt:
06/04/2009
Title:
DESIGN VERIFICATION TECHNIQUE
86
Patent #:
Issue Dt:
05/29/2012
Application #:
11923686
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
03/27/2008
Title:
STRUCTURE AND LAYOUT OF A FET PRIME CELL
87
Patent #:
Issue Dt:
02/23/2010
Application #:
11923701
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD AND CIRCUIT FOR DETECTING AND COMPENSATING FOR A DEGRADATION OF A SEMICONDUCTOR DEVICE
88
Patent #:
Issue Dt:
06/30/2015
Application #:
11923864
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
TUNABLE CAPACITOR
89
Patent #:
Issue Dt:
01/06/2009
Application #:
11923900
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/28/2008
Title:
RADIATION HARDENED PROGRAMMABLE PHASE FREQUENCY DIVIDER
90
Patent #:
Issue Dt:
05/26/2009
Application #:
11923956
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
05/29/2008
Title:
OPTICALLY CONNECTABLE CIRCUIT BOARD WITH OPTICAL COMPONENT(S) MOUNTED THEREON
91
Patent #:
Issue Dt:
12/09/2008
Application #:
11924024
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
92
Patent #:
Issue Dt:
03/22/2011
Application #:
11924059
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SRAM CELL HAVING A RECTANGULAR COMBINED ACTIVE AREA FOR PLANAR PASS GATE AND PLANAR PULL-DOWN NFETS
93
Patent #:
Issue Dt:
11/15/2011
Application #:
11924146
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
07/24/2008
Title:
PROCESSING TASKS WITH FAILURE RECOVERY
94
Patent #:
Issue Dt:
03/03/2009
Application #:
11924207
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
95
Patent #:
Issue Dt:
02/09/2010
Application #:
11924239
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
96
Patent #:
Issue Dt:
02/24/2009
Application #:
11924283
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
97
Patent #:
Issue Dt:
11/09/2010
Application #:
11924650
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
LATERAL DIFFUSION FIELD EFFECT TRANSISTOR WITH ASYMMETRIC GATE DIELECTRIC PROFILE
98
Patent #:
Issue Dt:
05/03/2011
Application #:
11924662
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SUBSTRATE ANCHOR STRUCTURE AND METHOD
99
Patent #:
Issue Dt:
08/09/2011
Application #:
11924735
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
TECHNIQUES FOR IMPEDING REVERSE ENGINEERING
100
Patent #:
Issue Dt:
09/29/2009
Application #:
11924825
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD FOR PRODUCING A DOPED NITRIDE FILM, DOPED OXIDE FILM AND OTHER DOPED FILMS
Assignor
1
Exec Dt:
11/27/2018
Assignee
1
1100 NORTH MARKET STREET
WILMINGTON, DELAWARE 19801
Correspondence name and address
CT CORPORATION
4400 EASTON COMMONS WAY
SUITE 125
COLUMBUS, OH 43219

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