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04/10/2001
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09265253
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03/09/1999
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CAPACITIVE COUPLED DRIVER CIRCUIT
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09/25/2001
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09266038
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03/11/1999
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METHOD FOR NONDESTRUCTIVE MEASUREMENT OF DOPANT CONCENTRATIONS AND PROFILES IN THE DRIFT REGION OF CERTAIN SEMICONDUCTOR DEVICES
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02/12/2002
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09266039
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03/11/1999
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09/05/2000
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03/11/1999
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01/30/2001
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03/18/1999
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STEEP EDGE TIME-DELAY RELAY
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02/06/2001
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09271124
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03/17/1999
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08/06/2002
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03/18/1999
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10/25/2001
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CMP UNIFORMITY
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08/01/2000
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09272077
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03/18/1999
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DRAM CELL ARRANGEMENT
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04/03/2001
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09272215
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03/18/1999
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MEMORY CELL LAYOUT FOR REDUCED INTERACTION BETWEEN STORAGE NODES AND TRANSISTORS
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03/13/2001
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09272217
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03/18/1999
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MEMORY CELL THAT INCLUDES A VERTICAL TRANSISTOR AND A TRENCH CAPACITOR
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11/21/2000
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09272218
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03/18/1999
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MEMORY CELL THAT INCLUDES A VERTICAL TRANSISTOR AND A TRENCH CAPACITOR
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06/03/2003
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03/18/1999
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INTEGRATED CIRCUIT WITH A HOUSING ACCOMMODATING THE INTEGRATED CIRCUIT
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08/28/2001
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09272968
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03/19/1999
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MOS TRANSISTOR IN A SINGLE-TRANSISTOR MEMORY CELL HAVING A LOCALLY THICKENED GATE OXIDE, AND PRODUCTION PROCESS
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03/28/2000
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03/23/1999
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METHOD FOR PROGRAMMING A ROM CELL ARRANGEMENT
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04/02/2002
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03/22/1999
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SKEW POINTER GENERATION
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05/08/2001
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03/23/1999
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03/28/2000
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03/23/1999
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03/20/2001
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03/24/1999
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DYNAMIC RANDOM ACCESS MEMORY
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06/12/2001
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03/25/1999
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SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHODS
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02/17/2004
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09277281
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03/26/1999
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CONFIGURATION FOR INDENTIFYING CONTACT FAULTS DURING THE TESTING OF INTEGRATED CIRCUITS
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07/04/2000
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09277669
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03/26/1999
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STACKED CAPACITOR MEMORY CELL AND METHOD OF MANUFACUTRE
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12/19/2000
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03/26/1999
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IN-SITU METHOD FOR PREPARING AND HIGHLIGHTING OF DEFECTS FOR FAILURE ANALYSIS
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04/10/2001
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03/29/1999
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METHOD FOR REDUCING CORNER ROUNDING IN MASK FABRICATION UTILIZING ELLIPTICAL ENERGY BEAM
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04/04/2000
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03/30/1999
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DECODED AUTOREFRESH MODE IN A DRAM
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11/27/2001
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03/30/1999
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09/17/2002
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09281021
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03/30/1999
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REDUCED SIGNAL TEST FOR DYNAMIC RANDOM ACCESS MEMORY
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01/02/2001
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03/30/1999
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METHOD FOR PRODUCING BARRIER-FREE SEMICONDUCTOR MEMORY CONFIGURATIONS
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03/06/2001
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09281822
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03/30/1999
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METHOD FOR THE PRODUCTION OF AN INTEGRATED SEMICONDUCTOR MEMORY CONFIGURATION
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02/12/2002
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09282094
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03/30/1999
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PROCESS FOR PRODUCING HIGH-EPSILON DIELECTRIC LAYER OR FERROELECTRIC LAYER
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10/02/2001
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09282097
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03/30/1999
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PROCESS FOR PRODUCING BARRIER-FREE SEMICONDUCTOR MEMORY CONFIGURATIONS
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03/27/2001
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03/31/1999
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ISOLATION COLLAR NITRIDE LINER FOR DRAM PROCESS IMPROVEMENT
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04/30/2002
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09282745
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03/31/1999
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METHOD OF IMPROVING THE ETCH RESISTANCE OF CHEMICALLY AMPLIFIED PHOTORESISTS BY INTRODUCING SILICON AFTER PATTERNING
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06/11/2002
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04/08/1999
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METHOD FOR FABRICATING A STACKED CAPACITOR IN A SEMICONDUCTOR CONFIGURATION, AND STACKED CAPACITOR FABRICATED BY THIS METHOD
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09/25/2001
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04/09/1999
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METHOD AND APPARATUS FOR THE TREATMENT OF OBJECTS, PREFERABLY WAFERS
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06/26/2001
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04/20/1999
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DELAY ELEMENT USING A DELAY LOCKED LOOP
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05/16/2000
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04/26/1999
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RADIATION-SENSITIVE MIXTURE AND ITS USE
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12/17/2002
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09299979
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04/27/1999
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YIELD PREDICTION AND STATISTICAL PROCESS CONTROL USING PREDICTED DEFECT RELATED YIELD LOSS
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08/14/2001
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04/28/1999
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METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT ARRANGEMENT HAVING AT LEAST ONE MOS TRANSISTOR
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03/04/2003
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04/30/1999
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CONFIGURATION FOR TESTING A PLURALITY OF MEMORY CHIPS ON A WAFER
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09/12/2000
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04/30/1999
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METHOD FOR FABRICATING A CAPACITOR FOR A SEMICONDUCTOR MEMORY CONFIGURATION
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10/29/2002
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04/30/1999
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STATIC RANDOM ACCESS MEMORY (SRAM)
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10/01/2002
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09302768
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04/30/1999
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DOUBLE GATED TRANSISTOR
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04/30/2002
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09306617
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05/06/1999
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MOSFETS WITH IMPROVED SHORT CHANNEL EFFECTS AND METHOD OF MAKING THE SAME
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06/29/2004
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05/13/1999
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OPTIMIZED-DELAY MULTIPLEXER
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03/06/2001
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09311120
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05/13/1999
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CIRCUIT CONFIGURATION FOR PRODUCING COMPLEMENTARY SIGNALS
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02/20/2001
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09311471
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05/13/1999
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FORMATION OF 5F2 CELL WITH PARTIALLY VERTICAL TRANSISTOR AND GATE CONDUCTOR ALIGNED BURIED STRAP WITH RAISED SHALLOW TRENCH ISOLATION REGION
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10/03/2000
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05/14/1999
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MANUFACTURING METHOD FOR A CAPACITOR IN AN INTEGRATED STORAGE CIRCUIT
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03/20/2001
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05/14/1999
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MANUFACTURING METHOD FOR A CAPACITOR IN AN INTEGRATED MEMORY CIRCUIT
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11/18/2003
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05/17/1999
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ON CHIP PROGRAMMABLE DATA PATTERN GENERATOR FOR SEMICONDUCTOR MEMORIES
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03/12/2002
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05/17/1999
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ON CHIP DATA COMPARATOR WITH VARIABLE DATA AND COMPARE RESULT COMPRESSION
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03/19/2002
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05/17/1999
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METHOD OF HOLDING A WAFER AND TESTING THE INTEGRATED CIRCUITS ON THE WAFER
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10/25/2005
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09313424
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05/17/1999
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03/27/2001
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05/19/1999
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DIFFERENTIAL TRENCH OPEN PROCESS
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11/07/2000
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05/20/1999
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SEMICONDUCTOR MEMORY HAVING DIFFERENTIAL BIT LINES
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06/11/2002
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05/20/1999
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01/02/2001
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05/25/1999
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TEMPERATURE CONTROLLED DEGASSIFICATION OF DEIONIZED WATER FOR MEGASONIC CLEANING OF SEMICONDUCTOR WAFERS
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04/10/2001
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05/27/1999
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FUSE-LATCH CIRCUIT
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09/18/2001
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09322717
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05/28/1999
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CIRCUIT CONFIGURATION FOR BURN-IN SYSTEMS FOR TESTING MODULES BY USING A BOARD
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12/12/2000
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09322718
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05/28/1999
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CONFIGURATION FOR CROSSTALK ATTENUATION IN WORD LINES OF DRAM CIRCUITS
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03/13/2001
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09323363
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06/01/1999
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SENSING OF MEMORY CELL VIA A PLATELINE
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10/30/2001
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06/03/1999
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LOW TEMPERATURE SACRIFICIAL OXIDE FORMATION
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03/05/2002
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06/03/1999
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LOW TEMPERATURE SELF-ALIGNED COLLAR FORMATION
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05/08/2001
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06/04/1999
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BONDING PAD TEST CONFIGURATION
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04/17/2001
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09326889
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06/07/1999
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LAYOUT AND WIRING SCHEME FOR MEMORY CELLS WITH VERTICAL TRANSISTORS
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09/25/2001
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09327699
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06/08/1999
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INTEGRATED SEMICONDUCTOR CIRCUIT HAVING DUMMY STRUCTURES
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05/14/2002
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06/08/1999
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LOW TEMPERFATURE OXIDATION OF CONDUCTIVE LAYERS FOR SEMICONDUCTOR FABRICATION
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07/30/2002
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09328763
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06/09/1999
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METHOD FOR EXPANDING TRENCHES BY AN ANISOTROPIC WET ETCH
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04/30/2002
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09333228
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06/14/1999
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11/29/2001
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IMPROVED METHODS AND APPARATUS FOR CHEMICAL MECHANICAL PLANARIZATION (CMP) OF A SEMICONDUCTOR WAFER
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06/27/2000
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09333539
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06/15/1999
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HIERARCHICAL PREFETCH FOR SEMICONDUCTOR MEMORIES
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07/10/2001
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09335561
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06/18/1999
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DEVICE FOR THE DEPOSITION OF SUBSTANCES
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02/27/2001
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09337168
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06/21/1999
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DEVICE PERFORMANCE BY EMPLOYING AN IMPROVED METHOD FOR FORMING HALO IMPLANTS
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04/09/2002
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06/24/1999
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SEMICONDUCTOR MANUFACTURING METHODS
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01/16/2001
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06/30/1999
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DYNAMIC SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INITIALIZING A DYNAMIC SEMICONDUCTOR MEMORY DEVICE
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12/05/2000
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06/30/1999
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DYNAMIC SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR INTIALIZING A DYNAMIC SEMICONDUCTOR MEMORY DEVICE
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08/08/2000
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09344922
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06/28/1999
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INTEGRATED MEMORY
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10/10/2000
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07/01/1999
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OUTPUT DRIVER OF AN INTEGRATED SEMICONDUCTOR CHIP
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04/29/2003
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07/14/1999
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Title:
|
CONFIGURATION AND METHOD FOR STORING THE TEST RESULTS OBTAINED BY A BIST CIRCUIT
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|
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Patent #:
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Issue Dt:
|
04/02/2002
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Application #:
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09353612
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Filing Dt:
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07/14/1999
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Title:
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CONFIGURATION FOR TESTING CHIPS
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Patent #:
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Issue Dt:
|
02/20/2001
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Application #:
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09356402
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Filing Dt:
|
07/16/1999
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Title:
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METHOD OF PRODUCING A STACKED CAPACITOR
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|
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Patent #:
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Issue Dt:
|
10/17/2000
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Application #:
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09356811
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Filing Dt:
|
07/19/1999
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Title:
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INTEGRATED CIRCUIT WITH A VOLTAGE REGULATOR
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|
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Patent #:
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Issue Dt:
|
01/06/2004
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Application #:
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09356813
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Filing Dt:
|
07/19/1999
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Title:
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INTEGRATED CIRCUIT HAVING A SELF-TEST DEVICE
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Patent #:
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Issue Dt:
|
08/21/2001
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Application #:
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09356955
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Filing Dt:
|
07/19/1999
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Title:
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CONFIGURATION FOR TESTING INTEGRATED COMPONENTS
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|
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Patent #:
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|
Issue Dt:
|
12/31/2002
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Application #:
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09359291
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Filing Dt:
|
07/22/1999
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Title:
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TRANSISTORS HAVING INDEPENDENTLY ADJUSTABLE PARAMETERS
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Patent #:
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|
Issue Dt:
|
11/20/2001
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Application #:
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09359292
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Filing Dt:
|
07/22/1999
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Title:
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CRYSTAL-AXIS-ALIGNED VERTICAL SIDE WALL DEVICE
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|
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Patent #:
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|
Issue Dt:
|
12/02/2003
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Application #:
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09360944
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Filing Dt:
|
07/26/1999
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Title:
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PROCESS FOR CLEANING CVD UNITS
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|
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Patent #:
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|
Issue Dt:
|
07/17/2001
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Application #:
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09360973
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Filing Dt:
|
07/27/1999
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Title:
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COMPOSITE MEMBER COMPOSED OF AT LEAST TWO INTEGRATED CIRCUITS AND METHOD FOR THE MANUFACTURE OF A COMPOSITE MEMBER COMPOSED OF AT LEAST TWO INTEGRATED CIRCUITS
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Patent #:
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|
Issue Dt:
|
10/23/2001
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Application #:
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09363263
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Filing Dt:
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07/29/1999
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Title:
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INTEGRATED SEMICONDUCTOR CHIP WITH MODULAR DUMMY STRUCTURES
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|
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Patent #:
|
|
Issue Dt:
|
12/07/2004
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Application #:
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09363277
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Filing Dt:
|
07/28/1999
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Title:
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TRENCH CAPACITOR WITH AN INSULATION COLLAR AND METHOD FOR PRODUCING A TRENCH CAPACITOR
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|
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Patent #:
|
|
Issue Dt:
|
07/02/2002
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Application #:
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09368134
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Filing Dt:
|
08/04/1999
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Title:
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INTEGRATED CIRCUIT HAVING A SELF-TEST DEVICE AND METHOD FOR PRODUCING THE INTEGRATED CIRCUIT
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|
|
Patent #:
|
|
Issue Dt:
|
11/06/2001
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Application #:
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09372307
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Filing Dt:
|
08/11/1999
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Title:
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METHOD OF TESTING LEAKAGE CURRENT AT A CONTACT-MAKING POINT IN AN INTEGRATED CIRCUIT BY DETERMINING A POTENTIAL AT THE CONTACT-MAKING POINT
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|
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Patent #:
|
|
Issue Dt:
|
09/04/2001
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Application #:
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09373476
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Filing Dt:
|
08/12/1999
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Title:
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METHOD OF MINIMIZING THE ACCESS TIME IN SEMICONDUCTOR MEMORIES
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|
|
Patent #:
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|
Issue Dt:
|
03/12/2002
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Application #:
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09374537
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Filing Dt:
|
08/16/1999
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Title:
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METHOD FOR FABRICATING 4F2 MEMORY CELLS WITH IMPROVED GATE CONDUCTOR STRUCTURE
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|
|
Patent #:
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|
Issue Dt:
|
09/25/2001
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Application #:
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09374538
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Filing Dt:
|
08/16/1999
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Title:
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METHOD FOR FABRICATION OF ENLARGED STACKED CAPACITORS USING ISOTROPIC ETCHING
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|
|
Patent #:
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|
Issue Dt:
|
11/28/2000
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Application #:
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09374687
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Filing Dt:
|
08/16/1999
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Title:
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VERTICAL DRAM CELL WITH WORDLINE SELF-ALIGNED TO STORAGE TRENCH
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|
|
Patent #:
|
|
Issue Dt:
|
09/30/2003
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Application #:
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09374893
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Filing Dt:
|
08/13/1999
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Title:
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PROCESS FOR PRODUCING STRUCTURED LAYERS, PROCESS FOR PRODUCING COMPONENTS OF AN INTEGRATED CIRCUIT, AND PROCESS FOR PRODUCING A MEMORY CONFIGURATION
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|
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Patent #:
|
|
Issue Dt:
|
06/27/2000
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Application #:
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09374894
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Filing Dt:
|
08/13/1999
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Title:
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COMBINED PRECHARGING AND HOMOGENIZING CIRCUIT
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|
|
Patent #:
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|
Issue Dt:
|
04/23/2002
|
Application #:
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09374895
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Filing Dt:
|
08/13/1999
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Title:
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INTEGRATED SEMICONDUCTOR CHIP HAVING LEADS TO ONE OR MORE EXTERNAL TERMINALS
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|
|
Patent #:
|
|
Issue Dt:
|
12/23/2003
|
Application #:
|
09377588
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Filing Dt:
|
08/19/1999
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Title:
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SYNCHRONIZED DATA CAPTURING CIRCUITS USING REDUCED VOLTAGE LEVELS AND METHODS THEREFOR
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|
|
Patent #:
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|
Issue Dt:
|
08/22/2000
|
Application #:
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09382933
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Filing Dt:
|
08/25/1999
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Title:
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SILYLATION METHOD FOR REDUCING CRITICAL DIMENSION LOSS AND RESIST LOSS
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|
|
Patent #:
|
|
Issue Dt:
|
03/05/2002
|
Application #:
|
09383666
|
Filing Dt:
|
08/26/1999
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Title:
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SIDEWALL OXIDE PROCESS FOR IMPROVED SHALLOW JUNCTION FORMATION IN SUPPORT REGION
|
|