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05/24/2011
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12183313
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07/31/2008
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02/04/2010
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08/27/2013
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12183462
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07/31/2008
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02/04/2010
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06/15/2010
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12183533
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07/31/2008
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12/04/2008
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DYNAMIC MEMORY ALLOCATION BETWEEN INBOUND AND OUTBOUND BUFFERS IN A PROTOCOL HANDLER
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06/14/2011
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12183549
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07/31/2008
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12/18/2008
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06/14/2011
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12183578
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07/31/2008
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12/18/2008
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VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GRID CONSTRAINTS
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09/27/2011
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12183898
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07/31/2008
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02/04/2010
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09/27/2011
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12183958
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07/31/2008
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02/04/2010
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SYSTEM AND METHOD FOR AUTOMATED PLACEMENT IN CUSTOM VLSI CIRCUIT DESIGN WITH SCHEMATIC-DRIVEN PLACEMENT
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05/03/2011
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07/31/2008
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02/04/2010
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BIAS CIRCUIT FOR A MOS DEVICE
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05/04/2010
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12184421
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08/01/2008
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11/27/2008
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03/16/2010
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12185095
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08/03/2008
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01/29/2009
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HIGH-RATE RLL ENCODING
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09/29/2009
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12185172
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08/04/2008
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12/18/2008
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ON-CHIP AC SELF-TEST CONTROLLER
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10/18/2011
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12185259
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08/04/2008
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02/04/2010
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05/01/2012
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12185759
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08/04/2008
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11/27/2008
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Title:
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DIELECTRIC INTERCONNECT STRUCTURES AND METHODS FOR FORMING THE SAME
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10/30/2012
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12186061
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08/05/2008
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02/11/2010
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Title:
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03/20/2012
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12186588
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08/06/2008
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02/11/2010
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ROBUST JITTER-FREE REMOTE CLOCK OFFSET MEASURING METHOD
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03/03/2015
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12186630
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08/06/2008
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08/06/2009
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ESD POWER CLAMP WITH STABLE POWER START UP FUNCTION
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01/04/2011
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12186655
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08/06/2008
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03/12/2009
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DUAL-SIDED CHIP ATTACHED MODULES
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05/03/2011
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12186750
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08/06/2008
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02/11/2010
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05/17/2011
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12186762
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08/06/2008
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02/11/2010
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METHOD FOR SEMICONDUCTOR DEVICE HAVING RADIATION HARDENED INSULATORS AND DESIGN STRUCTURE THEREOF
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01/04/2011
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12186767
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08/06/2008
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12/18/2008
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HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
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02/18/2014
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12186821
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08/06/2008
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09/03/2009
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COMPUTER SYSTEM COMPRISING A SECURE BOOT MECHANISM
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11/02/2010
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12187003
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08/06/2008
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02/11/2010
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ELECTRICAL ANTIFUSE HAVING A MULTI-THICKNESS DIELECTRIC LAYER
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11/08/2011
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12187164
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08/06/2008
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11/27/2008
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POWER DELIVERY ANALYSIS AND DESIGN
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04/19/2011
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12187415
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08/07/2008
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02/11/2010
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INTEGRATED CIRCUIT STRUCTURE, DESIGN STRUCTURE, AND METHOD HAVING IMPROVED ISOLATION AND HARMONICS
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09/28/2010
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12187419
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08/07/2008
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02/11/2010
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INTEGRATED CIRCUIT STRUCTURE, DESIGN STRUCTURE, AND METHOD HAVING IMPROVED ISOLATION AND HARMONICS
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05/17/2011
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12187436
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08/07/2008
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02/11/2010
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Title:
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INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
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07/31/2012
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12187442
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08/07/2008
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02/11/2010
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Title:
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INTEGRATED MILLIMETER WAVE ANTENNA AND TRANSCEIVER ON A SUBSTRATE
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06/19/2012
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12187511
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08/07/2008
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02/11/2010
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MEMORY CONTROLLER FOR REDUCING TIME TO INITIALIZE MAIN MEMORY
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12/07/2010
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12187759
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08/07/2008
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01/01/2009
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PROBE FOR SCANNING OVER A SUBSTRATE AND A DATA STORAGE DEVICE
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04/10/2012
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12187767
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08/07/2008
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11/27/2008
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METHOD OF FORMING METAL/HIGH-K GATE STACKS WITH HIGH MOBILITY
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03/16/2010
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12188230
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08/08/2008
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02/11/2010
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METHOD OF MAKING THROUGH WAFER VIAS
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06/28/2011
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12188234
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08/08/2008
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02/11/2010
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METAL WIRING STRUCTURE FOR INTEGRATION WITH THROUGH SUBSTRATE VIAS
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07/03/2012
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12188235
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08/08/2008
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02/11/2010
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COMBINATION VIA AND PAD STRUCTURE FOR IMPROVED SOLDER BUMP ELECTROMIGRATION CHARACTERISTICS
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03/20/2012
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12188243
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08/08/2008
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02/11/2010
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CIRCUIT STRUCTURES AND METHODS WITH BEOL LAYERS CONFIGURED TO BLOCK ELECTROMAGNETIC EDGE INTERFERENCE
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10/12/2010
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12188324
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08/08/2008
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09/03/2009
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REDUCTION OF MEMORY INSTABILITY BY LOCAL ADAPTATION OF RE-CRYSTALLIZATION CONDITIONS IN A CACHE AREA OF A SEMICONDUCTOR DEVICE
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09/06/2011
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12188366
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08/08/2008
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02/11/2010
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METHOD OF FORMING A HIGH PERFORMANCE FET AND A HIGH VOLTAGE FET ON A SOI SUBSTRATE
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02/21/2012
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12188381
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08/08/2008
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02/11/2010
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SEMICONDUCTOR STRUCTURE INCLUDING A HIGH PERFORMANCE FET AND A HIGH VOLTAGE FET ON A SOI SUBSTRATE
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08/09/2011
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08/08/2008
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02/11/2010
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METHODS AND SYSTEMS FOR ON-THE-FLY CHIP VERIFICATION
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11/08/2011
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12189983
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08/12/2008
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02/18/2010
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NON-VOLATILE PROGRAMMABLE OPTICAL ELEMENT EMPLOYING F-CENTERS
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11/23/2010
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12190028
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08/12/2008
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02/18/2010
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FIELD EFFECT TRANSISTOR WITH SUPPRESSED CORNER LEAKAGE THROUGH CHANNEL MATERIAL BAND-EDGE MODULATION, DESIGN STRUCTURE AND METHOD
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02/28/2012
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08/12/2008
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02/18/2010
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FIELD EFFECT TRANSISTOR WITH CHANNEL REGION EDGE AND CENTER PORTIONS HAVING DIFFERENT BAND STRUCTURES FOR SUPPRESSED CORNER LEAKAGE
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10/11/2011
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12190067
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08/12/2008
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02/18/2010
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STRUCTURE AND METHOD OF USING ASYMMETRIC JUNCTION ENGINEERED SRAM PASS GATES, AND DESIGN STRUCTURE
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05/31/2011
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12190123
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08/12/2008
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02/18/2010
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METAL-GATE HIGH-K REFERENCE STRUCTURE
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12/21/2010
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12190173
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08/12/2008
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02/18/2010
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METHOD OF MAKING A SIDEWALL-PROTECTED METALLIC PILLAR ON A SEMICONDUCTOR SUBSTRATE
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06/17/2014
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12190220
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08/12/2008
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02/18/2010
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CHANGING EFFECTIVE WORK FUNCTION USING ION IMPLANTATION DURING DUAL WORK FUNCTION METAL GATE INTEGRATION
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01/24/2012
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12191379
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08/14/2008
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02/18/2010
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STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING A STRUCTURE HAVING VIAS AND HIGH DENSITY CAPACITORS
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02/28/2012
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12191385
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08/14/2008
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02/18/2010
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STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING A STRUCTURE HAVING VIAS AND HIGH DENSITY CAPACITORS
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01/18/2011
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12191425
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08/14/2008
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02/18/2010
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FINFET WITH LONGITUDINAL STRESS IN A CHANNEL
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01/08/2013
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08/14/2008
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03/05/2009
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SYSTEM FOR PERFORMING A CO-SIMULATION AND/OR EMULATION OF HARDWARE AND SOFTWARE
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02/14/2012
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12191519
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08/14/2008
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02/18/2010
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07/31/2012
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12191522
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08/14/2008
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02/18/2010
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INTERCONNECT STRUCTURES, DESIGN STRUCTURE AND METHOD OF MANUFACTURE
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03/13/2012
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12191538
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08/14/2008
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02/18/2010
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VALIDATING MANUFACTURING TEST RULES PERTAINING TO AN ELECTRONIC COMPONENT
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04/19/2011
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12191543
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08/14/2008
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02/18/2010
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REDUNDANT BARRIER STRUCTURE FOR INTERCONNECT AND WIRING APPLICATIONS, DESIGN STRUCTURE AND METHOD OF MANUFACTURE
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07/12/2011
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12191633
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08/14/2008
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02/18/2010
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METHODS FOR FORMING BACK-END-OF-LINE RESISTIVE SEMICONDUCTOR STRUCTURES
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06/12/2012
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12191635
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08/14/2008
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02/18/2010
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SCALABLE REDUCTION IN REGISTERS WITH SAT-BASED RESUBSTITIUTION
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12/08/2009
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12191666
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08/14/2008
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12/04/2008
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CIRCUITS AND METHODS FOR IMPLEMENTING TRANSFORMER-COUPLED AMPLIFIERS AT MILLIMETER WAVE FREQUENCIES
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05/10/2011
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12191683
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08/14/2008
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Pub Dt:
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02/18/2010
| | | | |
Title:
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BACK-END-OF-LINE RESISTIVE SEMICONDUCTOR STRUCTURES
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Patent #:
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Issue Dt:
|
03/08/2011
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Application #:
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12191687
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Filing Dt:
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08/14/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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SUSPENDED GERMANIUM PHOTODETECTOR FOR SILICON WAVEGUIDE
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Patent #:
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Issue Dt:
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12/27/2011
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Application #:
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12192272
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
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DESIGN STRUCTURE FOR SWITCHING DIGITAL CIRCUIT CLOCK NET DRIVER WITHOUT LOSING CLOCK PULSES
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Patent #:
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Issue Dt:
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04/03/2012
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Application #:
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12192309
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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12/04/2008
| | | | |
Title:
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DESIGN STRUCTURE FOR IMPROVED LOGIC SIMULATION USING A NEGATIVE UNKNOWN BOOLEAN STATE
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Patent #:
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Issue Dt:
|
08/23/2011
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Application #:
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12192387
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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ELECTRICALLY PROGRAMMABLE FUSE AND FABRICATION METHOD
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Patent #:
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Issue Dt:
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08/23/2011
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Application #:
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12192491
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING DUAL METAL GATE VT ROLL-UP STRUCTURE
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Patent #:
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Issue Dt:
|
06/21/2011
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Application #:
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12192517
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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STRUCTURE, DESIGN STRUCTURE AND METHOD OF MANUFACTURING DUAL METAL GATE VT ROLL-UP STRUCTURE
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Patent #:
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Issue Dt:
|
07/12/2011
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Application #:
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12192554
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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SPLIT-GATE DRAM WITH MUGFET, DESIGN STRUCTURE, AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12192571
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
|
02/18/2010
| | | | |
Title:
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METHOD, CIRCUIT, AND DESIGN STRUCTURE FOR CAPTURING DATA ACROSS A PSEUDO-SYNCHRONOUS INTERFACE
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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12192586
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Filing Dt:
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08/15/2008
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Publication #:
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Pub Dt:
|
02/18/2010
| | | | |
Title:
|
METHOD, CIRCUIT, AND DESIGN STRUCTURE FOR CAPTURING DATA ACROSS A PSEUDO-SYNCHRONOUS INTERFACE
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Patent #:
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Issue Dt:
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01/10/2012
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Application #:
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12193058
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
|
02/18/2010
| | | | |
Title:
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DESIGN STRUCTURE FOR COUPLE NOISE CHARACTERIZATION USING A SINGLE OSCILLATOR
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Patent #:
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Issue Dt:
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06/07/2011
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Application #:
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12193059
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
|
02/18/2010
| | | | |
Title:
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STRUCTURE FOR COUPLE NOISE CHARACTERIZATION USING A SINGLE OSCILLATOR
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Patent #:
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Issue Dt:
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07/12/2011
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Application #:
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12193119
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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IDENTIFICATION OF VOLTAGE REFERENCE ERRORS IN PCB DESIGNS
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Patent #:
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Issue Dt:
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06/17/2014
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Application #:
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12193339
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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SELF-ALIGNED BORDERLESS CONTACTS FOR HIGH DENSITY ELECTRONIC AND MEMORY DEVICE INTEGRATION
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Patent #:
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Issue Dt:
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01/03/2012
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Application #:
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12193497
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Filing Dt:
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08/18/2008
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Publication #:
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Pub Dt:
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02/18/2010
| | | | |
Title:
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METHOD FOR MONITORING THERMAL CONTROL
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Patent #:
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Issue Dt:
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05/29/2012
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Application #:
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12193825
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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FABRICATING PRODUCT CHIPS AND DIE WITH A FEATURE PATTERN THAT CONTAINS INFORMATION RELATING TO THE PRODUCT CHIP
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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12193834
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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METHODS OF ION MILLING FOR MAGNETIC HEADS AND SYSTEMS FORMED THEREBY
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Patent #:
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Issue Dt:
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07/31/2012
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Application #:
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12193837
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
|
02/25/2010
| | | | |
Title:
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A METHOD FOR VIA STUB ELIMINATION
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12193842
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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METHOD OF FORMING A SUBSTRATE HAVING A PLURALITY OF INSULATOR LAYERS
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Patent #:
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Issue Dt:
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08/07/2012
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Application #:
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12194039
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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A FIELD EFFECT TRANSISTOR HAVING A GATE STRUCTURE WITH A FIRST SECTION ABOVE A CENTER PORTION OF THE CHANNEL REGION AND HAVING A FIRST EFFECTIVE WORK FUNCTION AND SECOND SECTIONS ABOVE EDGES OF THE CHANNEL REGION AND HAVING A SECOND EFFECTIVE WORK FUNCTION
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Patent #:
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Issue Dt:
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03/06/2012
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Application #:
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12194065
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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3D INTEGRATED CIRCUIT DEVICE FABRICATION WITH PRECISELY CONTROLLABLE SUBSTRATE REMOVAL
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Patent #:
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Issue Dt:
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10/30/2012
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Application #:
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12194198
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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3D INTEGRATED CIRCUIT DEVICE FABRICATION USING INTERFACE WAFER AS PERMANENT CARRIER
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Patent #:
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Issue Dt:
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03/19/2013
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Application #:
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12194211
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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12/16/2010
| | | | |
Title:
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METHOD FOR FABRICATING A 3D INTEGRATED CIRCUIT DEVICE HAVING LOWER-COST ACTIVE CIRCUITRY LAYERS STACKED BEFORE HIGHER-COST ACTIVE CIRCUITRY LAYER
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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12194448
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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ELECTRONIC PACKAGE WITH A THERMAL INTERPOSER AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12194526
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Filing Dt:
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08/19/2008
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Publication #:
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Pub Dt:
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02/25/2010
| | | | |
Title:
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NANOSCALE ELECTRODES FOR PHASE CHANGE MEMORY DEVICES
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Patent #:
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Issue Dt:
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02/08/2011
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Application #:
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12194563
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Filing Dt:
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08/20/2008
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Publication #:
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Pub Dt:
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12/18/2008
| | | | |
Title:
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METHOD AND STURCTURE FOR SELF-ALIGNED DEVICE CONTACTS
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Patent #:
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Issue Dt:
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01/11/2011
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Application #:
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12194564
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Filing Dt:
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08/20/2008
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Publication #:
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Pub Dt:
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12/11/2008
| | | | |
Title:
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HIGH CAPACITANCE DENSITY VERTICAL NATURAL CAPACITORS
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Patent #:
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Issue Dt:
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02/21/2012
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Application #:
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12194570
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Filing Dt:
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08/20/2008
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Publication #:
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Pub Dt:
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12/11/2008
| | | | |
Title:
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ON CHIP TIMING ADJUSTMENT IN MULTI-CHANNEL FAST DATA TRANSFER
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Patent #:
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Issue Dt:
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03/13/2012
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Application #:
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12194571
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Filing Dt:
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08/20/2008
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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ADAPTIVE CLOCK AND EQUALIZATION CONTROL SYSTEMS AND METHODS FOR DATA RECEIVERS IN COMMUNICATIONS SYSTEMS
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Patent #:
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Issue Dt:
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03/01/2011
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Application #:
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12195456
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Filing Dt:
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08/21/2008
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Publication #:
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Pub Dt:
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01/01/2009
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Title:
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HYBRID STRAINED ORIENTATED SUBSTRATES AND DEVICES
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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12195524
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Filing Dt:
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08/21/2008
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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METHOD OF PLACING A SEMICONDUCTING NANOSTRUCTURE AND SEMICONDUCTOR DEVICE INCLUDING THE SEMICONDUCTING NANOSTRUCTURE
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Patent #:
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Issue Dt:
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03/25/2014
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12195565
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08/21/2008
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Pub Dt:
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02/25/2010
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Title:
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OPTICAL WAVEGUIDE WITH PERIODIC SUB-WAVELENGTH SIZED REGIONS
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Issue Dt:
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09/18/2012
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12195691
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08/21/2008
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Pub Dt:
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02/25/2010
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Title:
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SMOOTH AND VERTICAL SEMICONDUCTOR FIN STRUCTURE
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Issue Dt:
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09/20/2011
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12195716
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08/21/2008
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Pub Dt:
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12/18/2008
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Title:
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TESTING SUB-SYSTEMS OF A SYSTEM-ON-A-CHIP USING A CONFIGURABLE EXTERNAL SYSTEM-ON-A-CHIP
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Issue Dt:
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03/06/2012
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Application #:
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12196840
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08/22/2008
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Pub Dt:
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02/25/2010
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Title:
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AUTOMATED ISOLATION OF LOGIC AND MACRO BLOCKS IN CHIP DESIGN TESTING
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Patent #:
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Issue Dt:
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01/19/2010
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Application #:
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12197079
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08/22/2008
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Pub Dt:
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12/18/2008
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Title:
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SEMICONDUCTOR STRUCTURE INCLUDING MIXED RARE EARTH OXIDE FORMED ON SILICON
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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12197366
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08/25/2008
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Pub Dt:
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01/08/2009
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Title:
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GREENSHEET VIA REPAIR/FILL TOOL
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Patent #:
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Issue Dt:
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08/14/2012
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12197459
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08/25/2008
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Pub Dt:
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02/25/2010
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Title:
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CMOS WITH CHANNEL P-FINFET AND CHANNEL N-FINFET HAVING DIFFERENT CRYSTALLINE ORIENTATIONS AND PARALLEL FINS
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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12197571
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08/25/2008
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Publication #:
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Pub Dt:
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12/18/2008
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Title:
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PROCESS OF MAKING A SEMICONDUCTOR DEVICE USING MULTIPLE ANTIREFLECTIVE MATERIALS
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Patent #:
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Issue Dt:
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03/23/2010
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Application #:
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12197688
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Filing Dt:
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08/25/2008
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Publication #:
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Pub Dt:
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02/26/2009
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Title:
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EMBEDDED NANOPARTICLE FILMS AND METHOD FOR THEIR FORMATION IN SELECTIVE AREAS ON A SURFACE
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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12197845
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Filing Dt:
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08/25/2008
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Publication #:
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Pub Dt:
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12/18/2008
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Title:
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HIGH TEMPERATURE PROCESSING COMPATIBLE METAL GATE ELECTRODE FOR PFETS AND METHODS FOR FABRICATION
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Patent #:
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Issue Dt:
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08/05/2014
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Application #:
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12197980
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Filing Dt:
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08/25/2008
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Publication #:
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Pub Dt:
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02/25/2010
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Title:
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OPTIMIZING A NETLIST CIRCUIT REPRESENTATION BY LEVERAGING BINARY DECISION DIAGRAMS TO PERFORM REWRITING
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Patent #:
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Issue Dt:
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11/13/2012
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Application #:
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12198239
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Filing Dt:
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08/26/2008
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Publication #:
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Pub Dt:
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03/04/2010
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Title:
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HARDWARE BASED MULTI-DIMENSIONAL ENCRYPTION
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Issue Dt:
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11/06/2012
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Application #:
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12198274
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Filing Dt:
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08/26/2008
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Publication #:
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Pub Dt:
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03/05/2009
| | | | |
Title:
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APPARATUS AND METHOD FOR ELECTROCHEMICAL PROCESSING OF THIN FILMS ON RESISTIVE SUBSTRATES
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