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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
09/07/2010
Application #:
11923919
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
HIGH-PERFORMANCE FET DEVICE LAYOUT
2
Patent #:
NONE
Issue Dt:
Application #:
11923924
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
05/08/2008
Title:
OPTICALLY CONNECTABLE CIRCUIT BOARD WITH OPTICAL COMPONENT(S) MOUNTED THEREON
3
Patent #:
Issue Dt:
05/26/2009
Application #:
11923956
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
05/29/2008
Title:
OPTICALLY CONNECTABLE CIRCUIT BOARD WITH OPTICAL COMPONENT(S) MOUNTED THEREON
4
Patent #:
NONE
Issue Dt:
Application #:
11923965
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD TO ELIMINATE ARSENIC CONTAMINATION IN TRENCH CAPACITORS
5
Patent #:
Issue Dt:
07/21/2009
Application #:
11924005
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
09/25/2008
Title:
NEGATIVE RESISTS BASED ON ACID-CATALYZED ELIMINATION OF POLAR MOLECULES
6
Patent #:
NONE
Issue Dt:
Application #:
11924015
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> Si UNDER BIAXIAL COMPRESSIVE STRAIN
7
Patent #:
Issue Dt:
12/09/2008
Application #:
11924024
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
8
Patent #:
Issue Dt:
06/22/2010
Application #:
11924045
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
DUAL WORKFUNCTION SILICIDE DIODE
9
Patent #:
Issue Dt:
06/08/2010
Application #:
11924053
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
INTEGRATION SCHEME FOR MULTIPLE METAL GATE WORK FUNCTION STRUCTURES
10
Patent #:
Issue Dt:
03/22/2011
Application #:
11924059
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SRAM CELL HAVING A RECTANGULAR COMBINED ACTIVE AREA FOR PLANAR PASS GATE AND PLANAR PULL-DOWN NFETS
11
Patent #:
Issue Dt:
07/19/2011
Application #:
11924073
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SELF ALIGNED RING ELECTRODES
12
Patent #:
Issue Dt:
03/03/2009
Application #:
11924207
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
13
Patent #:
Issue Dt:
02/09/2010
Application #:
11924239
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
14
Patent #:
Issue Dt:
02/24/2009
Application #:
11924283
Filing Dt:
10/25/2007
Publication #:
Pub Dt:
02/21/2008
Title:
HIGH SPEED DATA CHANNEL INCLUDING A CMOS VCSEL DRIVER AND A HIGH PERFORMANCE PHOTODETECTOR AND CMOS PHOTORECEIVER
15
Patent #:
Issue Dt:
11/09/2010
Application #:
11924650
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
LATERAL DIFFUSION FIELD EFFECT TRANSISTOR WITH ASYMMETRIC GATE DIELECTRIC PROFILE
16
Patent #:
Issue Dt:
08/17/2010
Application #:
11924651
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
05/22/2008
Title:
CUT-AND-PASTE IMPRINT LITHOGRAPHIC MOLD AND METHOD THEREFOR
17
Patent #:
Issue Dt:
05/03/2011
Application #:
11924662
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SUBSTRATE ANCHOR STRUCTURE AND METHOD
18
Patent #:
Issue Dt:
08/09/2011
Application #:
11924735
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
TECHNIQUES FOR IMPEDING REVERSE ENGINEERING
19
Patent #:
NONE
Issue Dt:
Application #:
11924807
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
02/28/2008
Title:
VERTICAL PARALLEL PLATE CAPACITOR USING SPACER SHAPED ELECTRODES AND METHOD FOR FABRICATION THEREOF
20
Patent #:
Issue Dt:
09/29/2009
Application #:
11924825
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD FOR PRODUCING A DOPED NITRIDE FILM, DOPED OXIDE FILM AND OTHER DOPED FILMS
21
Patent #:
NONE
Issue Dt:
Application #:
11924875
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
02/21/2008
Title:
METHODS FOR FABRICATING A SEMICONDUCTOR STRUCTURE USING A MANDREL AND SEMICONDUCTOR STRUCTURES FORMED THEREBY
22
Patent #:
Issue Dt:
08/31/2010
Application #:
11924894
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
02/21/2008
Title:
INTEGRATED CIRCUIT CHIP UTILIZING ORIENTED CARBON NANOTUBE CONDUCTIVE LAYERS
23
Patent #:
Issue Dt:
03/22/2011
Application #:
11924935
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
DETERMINING RELATIVE AMOUNT OF USAGE OF DATA RETAINING DEVICE BASED ON POTENTIAL OF CHARGE STORING DEVICE
24
Patent #:
Issue Dt:
09/07/2010
Application #:
11924955
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
DETERMINING HISTORY STATE OF DATA IN DATA RETAINING DEVICE BASED ON STATE OF PARTIALLY DEPLETED SILICON-ON-INSULATOR
25
Patent #:
Issue Dt:
12/11/2012
Application #:
11925069
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD FOR FABRICATING SUPER-STEEP RETROGRADE WELL MOSFET ON SOI OR BULK SILICON SUBSTRATE, AND DEVICE FABRICATED IN ACCORDANCE WITH THE METHOD
26
Patent #:
Issue Dt:
12/03/2013
Application #:
11925077
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
Method, Apparatus and Computer Program Product for Rule-Based Directed Problem Resolution for Servers with Scalable Proactive Monitoring
27
Patent #:
Issue Dt:
03/09/2010
Application #:
11925088
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
02/21/2008
Title:
STRAINED COMPLEMENTARY METAL OXIDE SEMICONDUCTOR (CMOS) ON ROTATED WAFERS AND METHODS THEREOF
28
Patent #:
Issue Dt:
10/20/2009
Application #:
11925161
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
05/08/2008
Title:
INTERCONNECT STRUCTURE WITH A BARRIER-REDUNDANCY FEATURE
29
Patent #:
Issue Dt:
11/23/2010
Application #:
11925164
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
ELECTRICAL FUSE HAVING A FULLY SILICIDED FUSELINK AND ENHANCED FLUX DIVERGENCE
30
Patent #:
Issue Dt:
11/10/2009
Application #:
11925168
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
STRUCTURE AND METHOD FOR FABRICATING SELF-ALIGNED METAL CONTACTS
31
Patent #:
Issue Dt:
09/07/2010
Application #:
11925170
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
OPTOELECTRONIC DEVICE WITH GERMANIUM PHOTODETECTOR
32
Patent #:
Issue Dt:
03/08/2011
Application #:
11925238
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
02/21/2008
Title:
METHOD AND SYSTEM TO REDISTRIBUTE WHITE SPACE FOR MINIMIZING WIRE LENGTH
33
Patent #:
NONE
Issue Dt:
Application #:
11925387
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Integrated Fin-Local Interconnect Structure
34
Patent #:
NONE
Issue Dt:
Application #:
11925413
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures
35
Patent #:
Issue Dt:
12/21/2010
Application #:
11925425
Filing Dt:
10/26/2007
Publication #:
Pub Dt:
04/30/2009
Title:
COLLABORATIVE TROUBLESHOOTING COMPUTER SYSTEMS USING FAULT TREE ANALYSIS
36
Patent #:
NONE
Issue Dt:
Application #:
11925983
Filing Dt:
10/28/2007
Publication #:
Pub Dt:
05/01/2008
Title:
SOI BIPOLAR TRANSISTORS WITH REDUCED SELF HEATING
37
Patent #:
Issue Dt:
04/06/2010
Application #:
11926025
Filing Dt:
10/28/2007
Publication #:
Pub Dt:
10/16/2008
Title:
ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICE
38
Patent #:
Issue Dt:
04/07/2009
Application #:
11926031
Filing Dt:
10/28/2007
Publication #:
Pub Dt:
03/20/2008
Title:
ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICE
39
Patent #:
Issue Dt:
06/30/2009
Application #:
11926289
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
03/06/2008
Title:
IC DESIGN MODELING ALLOWING DIMENSION-DEPENDENT RULE CHECKING
40
Patent #:
Issue Dt:
06/03/2008
Application #:
11926297
Filing Dt:
10/29/2007
Title:
DESIGN STRUCTURE FOR MEMORY ARRAY REPAIR WHERE REPAIR LOGIC CANNOT OPERATE AT SAME OPERATING CONDITION AS ARRAY
41
Patent #:
Issue Dt:
10/11/2011
Application #:
11926399
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
ONE-TRANSISTOR STATIC RANDOM ACCESS MEMORY WITH INTEGRATED VERTICAL PNPN DEVICE
42
Patent #:
Issue Dt:
06/01/2010
Application #:
11926556
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/21/2008
Title:
SYSTEM TO IMPROVE REQUIREMENTS, DESIGN MANUFACTURING, AND TRANSPORTATION IN MASS MANUFACTURING INDUSTRIES THROUGH ANALYSIS OF DEFECT DATA
43
Patent #:
Issue Dt:
06/15/2010
Application #:
11926567
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
03/20/2008
Title:
SYSTEM AND METHOD OF AUTOMATED WIRE AND VIA LAYOUT OPTIMIZATION DESCRIPTION
44
Patent #:
Issue Dt:
04/27/2010
Application #:
11926613
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METHOD FOR FABRICATING STRAINED SILICON-ON-INSULATOR STRUCTURES AND STRAINED SILICON-ON-INSULATOR STRUCTURES FORMED THEREBY
45
Patent #:
Issue Dt:
10/26/2010
Application #:
11926627
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/21/2008
Title:
METHODS OF FABRICATING VERTICAL CARBON NANOTUBE FIELD EFFECT TRANSISTORS FOR ARRANGEMENT IN ARRAYS AND FIELD EFFECT TRANSISTORS AND ARRAYS FORMED THEREBY
46
Patent #:
NONE
Issue Dt:
Application #:
11926635
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/21/2008
Title:
METHOD TO IMPROVE REQUIREMENTS, DESIGN MANUFACTURING, AND TRANSPORTATION IN MASS MANUFACTURING INDUSTRIES THROUGH ANALYSIS OF DEFECT DATA
47
Patent #:
Issue Dt:
04/06/2010
Application #:
11926661
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
09/18/2008
Title:
VERTICAL NANOTUBE SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF FORMING THE SAME
48
Patent #:
Issue Dt:
02/24/2009
Application #:
11926689
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
03/13/2008
Title:
VOLTAGE CONTROLLED STATIC RANDOM ACCESS MEMORY
49
Patent #:
Issue Dt:
11/09/2010
Application #:
11926722
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
FORMING SURFACE FEATURES USING SELF-ASSEMBLING MASKS
50
Patent #:
NONE
Issue Dt:
Application #:
11926781
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/21/2008
Title:
Techniques Supporting Collaborative Product Development
51
Patent #:
Issue Dt:
03/24/2009
Application #:
11927006
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/21/2008
Title:
STRAINED SI MOSFET ON TENSILE-STRAINED SIGE-ON-INSULATOR (SGOI)
52
Patent #:
Issue Dt:
10/09/2012
Application #:
11927073
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
04/30/2009
Title:
A ROBUST SPECTRAL ANALYZER FOR ONE-DIMENSIONAL AND MULTI-DIMENSIONAL DATA ANALYSIS
53
Patent #:
Issue Dt:
04/06/2010
Application #:
11927110
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
02/28/2008
Title:
SEMICONDUCTOR STRUCTURES INTEGRATING DAMASCENE-BODY FINFET'S AND PLANAR DEVICES ON A COMMON SUBSTRATE AND METHODS FOR FORMING SUCH SEMICONDUCTOR STRUCTURES
54
Patent #:
Issue Dt:
01/12/2010
Application #:
11927135
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
03/06/2008
Title:
SEMICONDUCTOR STRUCTURES FOR LATCH-UP SUPPRESSION AND METHODS OF FORMING SUCH SEMICONDUCTOR STRUCTURES
55
Patent #:
Issue Dt:
01/01/2013
Application #:
11927720
Filing Dt:
12/11/2007
Publication #:
Pub Dt:
06/11/2009
Title:
TOPOLOGIES AND METHODOLOGIES FOR AMS INTEGRATED CIRCUIT DESIGN
56
Patent #:
Issue Dt:
09/07/2010
Application #:
11927749
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
METHOD TO FABRICATE METAL GATE HIGH-K DEVICES
57
Patent #:
NONE
Issue Dt:
Application #:
11927774
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
METAL-INSULATOR-METAL CAPACITOR AND METHOD OF FABRICATING SAME
58
Patent #:
Issue Dt:
02/01/2011
Application #:
11927780
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
SEMICONDUCTOR STRUCTURES INTEGRATING DAMASCENE-BODY FINFET'S AND PLANAR DEVICES ON A COMMON SUBSTRATE AND METHODS FOR FORMING SUCH SEMICONDUCTOR STRUCTURES
59
Patent #:
Issue Dt:
05/18/2010
Application #:
11927964
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
TECHNIQUES FOR ENABLING MULTIPLE VT DEVICES USING HIGH-K METAL GATE STACKS
60
Patent #:
Issue Dt:
05/10/2011
Application #:
11928070
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/06/2008
Title:
CROSSTALK REDUCTION IN ELECTRICAL INTERCONNECTS USING DIFFERENTIAL SIGNALING
61
Patent #:
Issue Dt:
03/09/2010
Application #:
11928093
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
DESIGN STRUCTURE FOR AN AUTOMATED REAL-TIME FREQUENCY BAND SELECTION CIRCUIT FOR USE WITH A VOLTAGE CONTROLLED OSCILLATOR
62
Patent #:
Issue Dt:
11/03/2009
Application #:
11928135
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
SEMICONDUCTOR STRUCTURES WITH BODY CONTACTS AND FABRICATION METHODS THEREOF
63
Patent #:
Issue Dt:
06/24/2008
Application #:
11928205
Filing Dt:
10/30/2007
Title:
METHOD AND APPARATUS FOR EXTENDING LIFETIME RELIABILITY OF DIGITAL LOGIC DEVICES THROUGH REVERSAL OF AGING MECHANISMS
64
Patent #:
Issue Dt:
06/24/2008
Application #:
11928232
Filing Dt:
10/30/2007
Title:
METHOD AND APPARATUS FOR EXTENDING LIFETIME RELIABILITY OF DIGITAL LOGIC DEVICES THROUGH REMOVAL OF AGING MECHANISMS
65
Patent #:
Issue Dt:
10/19/2010
Application #:
11928356
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/06/2008
Title:
MOSFETS COMPRISING SOURCE/DRAIN RECESSES WITH SLANTED SIDEWALL SURFACES, AND METHODS FOR FABRICATING THE SAME
66
Patent #:
NONE
Issue Dt:
Application #:
11928391
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
SCALABLE HIGH-K DIELECTRIC GATE STACK
67
Patent #:
Issue Dt:
01/04/2011
Application #:
11928395
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
HYBRID ORIENTATION SEMICONDUCTOR STRUCTURE WITH REDUCED BOUNDARY DEFECTS AND METHOD OF FORMING SAME
68
Patent #:
Issue Dt:
03/29/2011
Application #:
11928418
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
HIGH DENSITY SRAM CELL WITH HYBRID DEVICES
69
Patent #:
NONE
Issue Dt:
Application #:
11928523
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/09/2009
Title:
Techniques for Linking Non-Coding and Gene-Coding Deoxyribonucleic Acid Sequences and Applications Thereof
70
Patent #:
NONE
Issue Dt:
Application #:
11928539
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/13/2008
Title:
Changing Chip Function Based on Fuse States
71
Patent #:
Issue Dt:
07/13/2010
Application #:
11928583
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/20/2008
Title:
ANTI-HALO COMPENSATION
72
Patent #:
Issue Dt:
11/22/2011
Application #:
11928611
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
TECHNIQUES FOR LINKING NON-CODING AND GENE-CODING DEOXYRIBONUCLEIC ACID SEQUENCES AND APPLICATIONS THEREOF
73
Patent #:
Issue Dt:
10/05/2010
Application #:
11928615
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/06/2008
Title:
METHOD OF FABRICATING HIGH-DENSITY, TRENCH-BASED NON-VOLATILE RANDOM ACCESS SONOS MEMORY CELLS FOR SOC APPLICATIONS
74
Patent #:
Issue Dt:
08/31/2010
Application #:
11928787
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
03/20/2008
Title:
METHOD FOR FORMING A MULTI-GATE DEVICE WITH HIGH K DIELECTRIC FOR CHANNEL TOP SURFACE
75
Patent #:
Issue Dt:
07/01/2008
Application #:
11929106
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
76
Patent #:
Issue Dt:
04/28/2009
Application #:
11929490
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
COPLANAR SILICON-ON-INSULATOR (SOI) REGIONS OF DIFFERENT CRYSTAL ORIENTATIONS AND METHODS OF MAKING THE SAME
77
Patent #:
NONE
Issue Dt:
Application #:
11929634
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/01/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
78
Patent #:
NONE
Issue Dt:
Application #:
11929662
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/01/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
79
Patent #:
NONE
Issue Dt:
Application #:
11929676
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
80
Patent #:
Issue Dt:
07/08/2014
Application #:
11929694
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
HIGH-VOLTAGE SILICON-ON-INSULATOR TRANSISTORS AND METHODS OF MANUFACTURING THE SAME
81
Patent #:
NONE
Issue Dt:
Application #:
11929697
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
82
Patent #:
NONE
Issue Dt:
Application #:
11929711
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
83
Patent #:
NONE
Issue Dt:
Application #:
11929736
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/01/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
84
Patent #:
NONE
Issue Dt:
Application #:
11929754
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/08/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
85
Patent #:
NONE
Issue Dt:
Application #:
11929768
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
86
Patent #:
NONE
Issue Dt:
Application #:
11929783
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/01/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
87
Patent #:
NONE
Issue Dt:
Application #:
11929806
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
88
Patent #:
NONE
Issue Dt:
Application #:
11929821
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
89
Patent #:
NONE
Issue Dt:
Application #:
11929839
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
06/05/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
90
Patent #:
NONE
Issue Dt:
Application #:
11929853
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
91
Patent #:
NONE
Issue Dt:
Application #:
11929873
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
92
Patent #:
NONE
Issue Dt:
Application #:
11929883
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
02/28/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
93
Patent #:
NONE
Issue Dt:
Application #:
11929899
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/08/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
94
Patent #:
NONE
Issue Dt:
Application #:
11929911
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
95
Patent #:
NONE
Issue Dt:
Application #:
11929924
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/22/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
96
Patent #:
NONE
Issue Dt:
Application #:
11929934
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
97
Patent #:
Issue Dt:
07/26/2011
Application #:
11929943
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
04/30/2009
Title:
EMBEDDED DRAM INTEGRATED CIRCUITS WITH EXTREMELY THIN SILICON-ON-INSULATOR PASS TRANSISTORS
98
Patent #:
NONE
Issue Dt:
Application #:
11929944
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/29/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
99
Patent #:
NONE
Issue Dt:
Application #:
11929956
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
100
Patent #:
NONE
Issue Dt:
Application #:
11929962
Filing Dt:
10/30/2007
Publication #:
Pub Dt:
05/15/2008
Title:
HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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