skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 68 of 148
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
1
Patent #:
7750459
Issue Dt:
07/06/2010
Application #:
12024394
Filing Dt:
02/01/2008
Publication #:
US20090194864
Pub Dt:
08/06/2009
Title:
INTEGRATED MODULE FOR DATA PROCESSING SYSTEM
2
Patent #:
NONE
Issue Dt:
Application #:
12024829
Filing Dt:
02/01/2008
Publication #:
US20080118866
Pub Dt:
05/22/2008
Title:
METHOD FOR FORMING A TUNABLE DEEP-ULTRVIOLET DIELECTRIC ANTIREFLECTION LAYER FOR IMAGE TRANSFER PROCESSING
3
Patent #:
8029716
Issue Dt:
10/04/2011
Application #:
12024985
Filing Dt:
02/01/2008
Publication #:
US20090194502
Pub Dt:
08/06/2009
Title:
AMORPHOUS NITRIDE RELEASE LAYERS FOR IMPRINT LITHOGRAPHY, AND METHOD OF USE
4
Patent #:
7846834
Issue Dt:
12/07/2010
Application #:
12025297
Filing Dt:
02/04/2008
Publication #:
US20090194876
Pub Dt:
08/06/2009
Title:
INTERCONNECT STRUCTURE AND METHOD FOR CU/ULTRA LOW K INTEGRATION
5
Patent #:
8215074
Issue Dt:
07/10/2012
Application #:
12026123
Filing Dt:
02/05/2008
Publication #:
US20120138571
Pub Dt:
06/07/2012
Title:
PATTERN FORMATION EMPLOYING SELF-ASSEMBLED MATERIAL
6
Patent #:
7566632
Issue Dt:
07/28/2009
Application #:
12026843
Filing Dt:
02/06/2008
Publication #:
US20090197390
Pub Dt:
08/06/2009
Title:
LOCK AND KEY STRUCTURE FOR THREE-DIMENTIONAL CHIP CONNECTION AND PROCESS THEREOF
7
Patent #:
7626702
Issue Dt:
12/01/2009
Application #:
12026869
Filing Dt:
02/06/2008
Publication #:
US20080144031
Pub Dt:
06/19/2008
Title:
OVERLAY TARGET AND MEASUREMENT METHOD USING REFERENCE AND SUB-GRIDS
8
Patent #:
7930672
Issue Dt:
04/19/2011
Application #:
12027085
Filing Dt:
02/06/2008
Publication #:
US20080127002
Pub Dt:
05/29/2008
Title:
INCREMENTAL DESIGN REDUCTION VIA ITERATIVE OVERAPPROXIMATION AND RE-ENCODING STRATEGIES
9
Patent #:
NONE
Issue Dt:
Application #:
12027407
Filing Dt:
02/07/2008
Publication #:
US20090008785
Pub Dt:
01/08/2009
Title:
ETCH PROCESS FOR IMPROVING YIELD OF DIELECTRIC CONTACTS ON NICKEL SILICIDES
10
Patent #:
7749903
Issue Dt:
07/06/2010
Application #:
12027444
Filing Dt:
02/07/2008
Publication #:
US20090203200
Pub Dt:
08/13/2009
Title:
GATE PATTERNING SCHEME WITH SELF ALIGNED INDEPENDENT GATE ETCH
11
Patent #:
7679141
Issue Dt:
03/16/2010
Application #:
12027561
Filing Dt:
02/07/2008
Publication #:
US20080116483
Pub Dt:
05/22/2008
Title:
HIGH-QUALITY SGOI BY ANNEALING NEAR THE ALLOY MELTING POINT
12
Patent #:
7993504
Issue Dt:
08/09/2011
Application #:
12027563
Filing Dt:
02/07/2008
Publication #:
US20080128086
Pub Dt:
06/05/2008
Title:
BACKSIDE UNLAYERING OF MOSFET DEVICES FOR ELECTRICAL AND PHYSICAL CHARACTERIZATION
13
Patent #:
7955958
Issue Dt:
06/07/2011
Application #:
12027675
Filing Dt:
02/07/2008
Publication #:
US20090200534
Pub Dt:
08/13/2009
Title:
METHOD FOR FABRICATION OF POLYCRYSTALLINE DIODES FOR RESISTIVE MEMORIES
14
Patent #:
8165864
Issue Dt:
04/24/2012
Application #:
12028038
Filing Dt:
02/08/2008
Publication #:
US20090204796
Pub Dt:
08/13/2009
Title:
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR VERIFYING ADDRESS GENERATION, INTERLOCKS AND BYPASSES
15
Patent #:
7989922
Issue Dt:
08/02/2011
Application #:
12028145
Filing Dt:
02/08/2008
Publication #:
US20090200642
Pub Dt:
08/13/2009
Title:
HIGHLY TUNABLE METAL-ON-SEMICONDUCTOR TRENCH VARACTOR
16
Patent #:
7838932
Issue Dt:
11/23/2010
Application #:
12028191
Filing Dt:
02/08/2008
Publication #:
US20080128712
Pub Dt:
06/05/2008
Title:
RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFORMANCE ENHANCEMENT WITH EMBEDDED SILICON CARBON
17
Patent #:
7698802
Issue Dt:
04/20/2010
Application #:
12028439
Filing Dt:
02/08/2008
Publication #:
US20080120838
Pub Dt:
05/29/2008
Title:
A METHOD FOR MANUFACTURING A CALIBRATION DEVICE
18
Patent #:
7570071
Issue Dt:
08/04/2009
Application #:
12028451
Filing Dt:
02/08/2008
Publication #:
US20080122452
Pub Dt:
05/29/2008
Title:
IMPEDANCE CALIBRATION FOR SOURCE SERIES TERMINATED SERIAL LINK TRANSMITTER
19
Patent #:
8355882
Issue Dt:
01/15/2013
Application #:
12028466
Filing Dt:
02/08/2008
Publication #:
US20090204347
Pub Dt:
08/13/2009
Title:
METHOD FOR DETECTING HIGH IMPEDANCE FAULTS BY ANALYZING A LOCAL DEVIATION FROM A REGULARIZATION
20
Patent #:
7651872
Issue Dt:
01/26/2010
Application #:
12028767
Filing Dt:
02/08/2008
Publication #:
US20080132426
Pub Dt:
06/05/2008
Title:
DISCRETE NANO-TEXTURED STRUCTURES IN BIOMOLECULAR ARRAYS, AND METHOD OF USE
21
Patent #:
7709876
Issue Dt:
05/04/2010
Application #:
12028845
Filing Dt:
02/11/2008
Publication #:
US20090201626
Pub Dt:
08/13/2009
Title:
GAP CAPACITORS FOR MONITORING STRESS IN SOLDER BALLS IN FLIP CHIP TECHNOLOGY
22
Patent #:
7935604
Issue Dt:
05/03/2011
Application #:
12028847
Filing Dt:
02/11/2008
Publication #:
US20100279480
Pub Dt:
11/04/2010
Title:
METHOD OF MAKING SMALL GEOMETRY FEATURES
23
Patent #:
7473904
Issue Dt:
01/06/2009
Application #:
12028850
Filing Dt:
02/11/2008
Publication #:
US20080128629
Pub Dt:
06/05/2008
Title:
DEVICE FOR MONITORING IONIZING RADIATION IN SILICON-ON INSULATOR INTEGRATED CIRCUITS
24
Patent #:
7960096
Issue Dt:
06/14/2011
Application #:
12028861
Filing Dt:
02/11/2008
Publication #:
US20090202952
Pub Dt:
08/13/2009
Title:
SUBLITHOGRAPHIC PATTERNING METHOD INCORPORATING A SELF-ALIGNED SINGLE MASK PROCESS
25
Patent #:
8004335
Issue Dt:
08/23/2011
Application #:
12028973
Filing Dt:
02/11/2008
Publication #:
US20090201064
Pub Dt:
08/13/2009
Title:
PHASE INTERPOLATOR SYSTEM AND ASSOCIATED METHODS
26
Patent #:
7960245
Issue Dt:
06/14/2011
Application #:
12029575
Filing Dt:
02/12/2008
Publication #:
US20080213948
Pub Dt:
09/04/2008
Title:
DUAL WIRED INTEGRATED CIRCUIT CHIPS
27
Patent #:
7939914
Issue Dt:
05/10/2011
Application #:
12029589
Filing Dt:
02/12/2008
Publication #:
US20080128812
Pub Dt:
06/05/2008
Title:
DUAL WIRED INTEGRATED CIRCUIT CHIPS
28
Patent #:
7719880
Issue Dt:
05/18/2010
Application #:
12029731
Filing Dt:
02/12/2008
Publication #:
US20090201719
Pub Dt:
08/13/2009
Title:
METHOD AND SYSTEM FOR SEMICONDUCTOR MEMORY
29
Patent #:
NONE
Issue Dt:
Application #:
12029748
Filing Dt:
02/12/2008
Publication #:
US20080142861
Pub Dt:
06/19/2008
Title:
SYMMETRIC CAPACITOR STRUCTURE
30
Patent #:
7666794
Issue Dt:
02/23/2010
Application #:
12029848
Filing Dt:
02/12/2008
Publication #:
US20080150091
Pub Dt:
06/26/2008
Title:
MULTIPLE PATTERNING USING PATTERNABLE LOW-K DIELECTRIC MATERIALS
31
Patent #:
7498801
Issue Dt:
03/03/2009
Application #:
12029913
Filing Dt:
02/12/2008
Publication #:
US20080211487
Pub Dt:
09/04/2008
Title:
APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT FOR MONITORING AND CONTROLLING A MICROCOMPUTER USING A SINGLE EXISTING PIN
32
Patent #:
8054630
Issue Dt:
11/08/2011
Application #:
12030260
Filing Dt:
02/13/2008
Publication #:
US20080205024
Pub Dt:
08/28/2008
Title:
ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
33
Patent #:
7732894
Issue Dt:
06/08/2010
Application #:
12030274
Filing Dt:
02/13/2008
Publication #:
US20090085161
Pub Dt:
04/02/2009
Title:
ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
34
Patent #:
NONE
Issue Dt:
Application #:
12030756
Filing Dt:
02/13/2008
Publication #:
US20090200683
Pub Dt:
08/13/2009
Title:
INTERCONNECT STRUCTURES WITH PARTIALLY SELF ALIGNED VIAS AND METHODS TO PRODUCE SAME
35
Patent #:
8108817
Issue Dt:
01/31/2012
Application #:
12030903
Filing Dt:
02/14/2008
Publication #:
US20090210833
Pub Dt:
08/20/2009
Title:
SEMICONDUCTOR STRUCTURE AND METHOD OF DESIGNING SEMICONDUCTOR STRUCTURE TO AVOID HIGH VOLTAGE INITIATED LATCH-UP IN LOW VOLTAGE SECTORS
36
Patent #:
7843039
Issue Dt:
11/30/2010
Application #:
12030917
Filing Dt:
02/14/2008
Publication #:
US20090206449
Pub Dt:
08/20/2009
Title:
STRESS-MODIFIED DEVICE STRUCTURES, METHODS OF FABRICATING SUCH STRESS-MODIFIED DEVICE STRUCTURES, AND DESIGN STRUCTURES FOR AN INTEGRATED CIRCUIT
37
Patent #:
NONE
Issue Dt:
Application #:
12030921
Filing Dt:
02/14/2008
Publication #:
US20080128766
Pub Dt:
06/05/2008
Title:
MOSFET STRUCTURE WITH ULTRA-LOW K SPACER
38
Patent #:
7541608
Issue Dt:
06/02/2009
Application #:
12030927
Filing Dt:
02/14/2008
Publication #:
US20080131995
Pub Dt:
06/05/2008
Title:
MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULATANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS
39
Patent #:
7943438
Issue Dt:
05/17/2011
Application #:
12031084
Filing Dt:
02/14/2008
Publication #:
US20090206367
Pub Dt:
08/20/2009
Title:
DESIGN STRUCTURE AND METHOD FOR A SILICON CONTROLLED RECTIFIER (SCR) STRUCTURE FOR SOI TECHNOLOGY
40
Patent #:
7384842
Issue Dt:
06/10/2008
Application #:
12031093
Filing Dt:
02/14/2008
Title:
METHODS INVOLVING SILICON-ON-INSULATOR TRENCH MEMORY WITH IMPLANTED PLATE
41
Patent #:
NONE
Issue Dt:
Application #:
12031106
Filing Dt:
02/14/2008
Publication #:
US20090210839
Pub Dt:
08/20/2009
Title:
TIMING CLOSURE USING MULTIPLE TIMING RUNS WHICH DISTRIBUTE THE FREQUENCY OF IDENTIFIED FAILS PER TIMING CORNER
42
Patent #:
7952531
Issue Dt:
05/31/2011
Application #:
12031282
Filing Dt:
02/14/2008
Publication #:
US20090015496
Pub Dt:
01/15/2009
Title:
PLANAR CIRCULARLY POLARIZED ANTENNAS
43
Patent #:
7818074
Issue Dt:
10/19/2010
Application #:
12031374
Filing Dt:
02/14/2008
Publication #:
US20090210176
Pub Dt:
08/20/2009
Title:
METHODS TO SELECT GOLDEN DEVICES FOR DEVICE MODEL EXTRACTIONS
44
Patent #:
7851064
Issue Dt:
12/14/2010
Application #:
12031493
Filing Dt:
02/14/2008
Publication #:
US20080160312
Pub Dt:
07/03/2008
Title:
METHODS AND STRUCTURES FOR PROMOTING STABLE SYNTHESIS OF CARBON NANOTUBES
45
Patent #:
8227792
Issue Dt:
07/24/2012
Application #:
12031530
Filing Dt:
02/14/2008
Publication #:
US20080135875
Pub Dt:
06/12/2008
Title:
RELAXED LOW-DEFECT SGOI FOR STRAINED SI CMOS APPLICATIONS
46
Patent #:
7883956
Issue Dt:
02/08/2011
Application #:
12031760
Filing Dt:
02/15/2008
Publication #:
US20090206441
Pub Dt:
08/20/2009
Title:
METHOD OF FORMING COPLANAR ACTIVE AND ISOLATION REGIONS AND STRUCTURES THEREOF
47
Patent #:
7935621
Issue Dt:
05/03/2011
Application #:
12031761
Filing Dt:
02/15/2008
Publication #:
US20090206447
Pub Dt:
08/20/2009
Title:
ANTI-FUSE DEVICE STRUCTURE AND ELECTROPLATING CIRCUIT STRUCTURE AND METHOD
48
Patent #:
NONE
Issue Dt:
Application #:
12032008
Filing Dt:
02/15/2008
Publication #:
US20090044405
Pub Dt:
02/19/2009
Title:
Interposer with Electrical Contact Button and Method
49
Patent #:
NONE
Issue Dt:
Application #:
12032063
Filing Dt:
02/15/2008
Publication #:
US20080170368
Pub Dt:
07/17/2008
Title:
Apparatuses for Dissipating Heat from Semiconductor Devices
50
Patent #:
8086980
Issue Dt:
12/27/2011
Application #:
12032276
Filing Dt:
02/15/2008
Publication #:
US20090210835
Pub Dt:
08/20/2009
Title:
EFFICIENT POWER REGION CHECKING OF MULTI-SUPPLY VOLTAGE MICROPROCESSORS
51
Patent #:
7823283
Issue Dt:
11/02/2010
Application #:
12032316
Filing Dt:
02/15/2008
Publication #:
US20080141528
Pub Dt:
06/19/2008
Title:
METHOD OF FORMING A LAND GRID ARRAY INTERPOSER
52
Patent #:
8028259
Issue Dt:
09/27/2011
Application #:
12032417
Filing Dt:
02/15/2008
Publication #:
US20090210836
Pub Dt:
08/20/2009
Title:
AUTOMATED METHOD AND APPARATUS FOR VERY EARLY VALIDATION OF CHIP POWER DISTRIBUTION NETWORKS IN SEMICONDUCTOR CHIP DESIGNS
53
Patent #:
7847496
Issue Dt:
12/07/2010
Application #:
12032420
Filing Dt:
02/15/2008
Publication #:
US20090206190
Pub Dt:
08/20/2009
Title:
DYNAMIC TAPE DRIVE CALIBRATION
54
Patent #:
7979838
Issue Dt:
07/12/2011
Application #:
12032517
Filing Dt:
02/15/2008
Publication #:
US20090210843
Pub Dt:
08/20/2009
Title:
METHOD OF AUTOMATING CREATION OF A CLOCK CONTROL DISTRIBUTION NETWORK IN AN INTEGRATED CIRCUIT FLOORPLAN
55
Patent #:
8006213
Issue Dt:
08/23/2011
Application #:
12032542
Filing Dt:
02/15/2008
Publication #:
US20090210840
Pub Dt:
08/20/2009
Title:
OPTIMIZATION METHOD OF INTEGRATED CIRCUIT DESIGN FOR REDUCTION OF GLOBAL CLOCK LOAD AND BALANCING CLOCK SKEW
56
Patent #:
8000384
Issue Dt:
08/16/2011
Application #:
12032610
Filing Dt:
02/15/2008
Publication #:
US20090207900
Pub Dt:
08/20/2009
Title:
APPARATUS FOR STABILIZING CONVERGENCE OF AN ADAPTIVE LINE EQUALIZER
57
Patent #:
7913216
Issue Dt:
03/22/2011
Application #:
12032643
Filing Dt:
02/16/2008
Publication #:
US20090210849
Pub Dt:
08/20/2009
Title:
ACCURATE PARASITICS ESTIMATION FOR HIERARCHICAL CUSTOMIZED VLSI DESIGN
58
Patent #:
8484007
Issue Dt:
07/09/2013
Application #:
12032647
Filing Dt:
02/16/2008
Publication #:
US20090210681
Pub Dt:
08/20/2009
Title:
METHOD AND APPARATUS OF HANDLING INSTRUCTION REJECTS, PARTIAL REJECTS, STALLS AND BRANCH WRONG IN A SIMULATION MODEL
59
Patent #:
7844931
Issue Dt:
11/30/2010
Application #:
12032728
Filing Dt:
02/18/2008
Publication #:
US20080216042
Pub Dt:
09/04/2008
Title:
METHOD AND COMPUTER SYSTEM FOR OPTIMIZING THE SIGNAL TIME BEHAVIOR OF AN ELECTRONIC CIRCUIT DESIGN
60
Patent #:
7886245
Issue Dt:
02/08/2011
Application #:
12032734
Filing Dt:
02/18/2008
Publication #:
US20080216043
Pub Dt:
09/04/2008
Title:
STRUCTURE FOR OPTIMIZING THE SIGNAL TIME BEHAVIOR OF AN ELECTRONIC CIRCUIT DESIGN
61
Patent #:
8010922
Issue Dt:
08/30/2011
Application #:
12032762
Filing Dt:
02/18/2008
Publication #:
US20090210842
Pub Dt:
08/20/2009
Title:
AUTOMATED METHOD FOR BUFFERING IN A VLSI DESIGN
62
Patent #:
7643357
Issue Dt:
01/05/2010
Application #:
12032798
Filing Dt:
02/18/2008
Publication #:
US20090207650
Pub Dt:
08/20/2009
Title:
SYSTEM AND METHOD FOR INTEGRATING DYNAMIC LEAKAGE REDUCTION WITH WRITE-ASSISTED SRAM ARCHITECTURE
63
Patent #:
7971162
Issue Dt:
06/28/2011
Application #:
12032841
Filing Dt:
02/18/2008
Publication #:
US20090210832
Pub Dt:
08/20/2009
Title:
VERIFICATION OF SPARE LATCH PLACEMENT IN SYNTHESIZED MACROS
64
Patent #:
NONE
Issue Dt:
Application #:
12032913
Filing Dt:
02/18/2008
Publication #:
US20080142852
Pub Dt:
06/19/2008
Title:
SEMICONDUCTOR DEVICE STRUCTURE WITH ACTIVE REGIONS HAVING DIFFERENT SURFACE DIRECTIONS
65
Patent #:
7856341
Issue Dt:
12/21/2010
Application #:
12033200
Filing Dt:
02/19/2008
Publication #:
US20090210190
Pub Dt:
08/20/2009
Title:
HEAT SINK
66
Patent #:
9368410
Issue Dt:
06/14/2016
Application #:
12033280
Filing Dt:
02/19/2008
Publication #:
US20090206407
Pub Dt:
08/20/2009
Title:
SEMICONDUCTOR DEVICES HAVING TENSILE AND/OR COMPRESSIVE STRESS AND METHODS OF MANUFACTURING
67
Patent #:
NONE
Issue Dt:
Application #:
12033303
Filing Dt:
02/19/2008
Publication #:
US20090208865
Pub Dt:
08/20/2009
Title:
PHOTOLITHOGRAPHY FOCUS IMPROVEMENT BY REDUCTION OF AUTOFOCUS RADIATION TRANSMISSION INTO SUBSTRATE
68
Patent #:
7871895
Issue Dt:
01/18/2011
Application #:
12033322
Filing Dt:
02/19/2008
Publication #:
US20090206442
Pub Dt:
08/20/2009
Title:
METHOD AND STRUCTURE FOR RELIEVING TRANSISTOR PERFORMANCE DEGRADATION DUE TO SHALLOW TRENCH ISOLATION INDUCED STRESS
69
Patent #:
7888750
Issue Dt:
02/15/2011
Application #:
12033325
Filing Dt:
02/19/2008
Publication #:
US20090206374
Pub Dt:
08/20/2009
Title:
MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT
70
Patent #:
8022478
Issue Dt:
09/20/2011
Application #:
12033359
Filing Dt:
02/19/2008
Publication #:
US20090209074
Pub Dt:
08/20/2009
Title:
METHOD OF FORMING A MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT
71
Patent #:
NONE
Issue Dt:
Application #:
12033943
Filing Dt:
02/20/2008
Publication #:
US20080146029
Pub Dt:
06/19/2008
Title:
METHOD OF FORMING AN INTERCONNECT STRUCTURE USING ORGANOSILICATE GLASS PATTERNED WITH MULTIPLE HARDMASK LAYERS
72
Patent #:
7895538
Issue Dt:
02/22/2011
Application #:
12033974
Filing Dt:
02/20/2008
Publication #:
US20090210387
Pub Dt:
08/20/2009
Title:
SYSTEM AND METHOD FOR PROVIDING A COMMON INSTRUCTION TABLE
73
Patent #:
7670901
Issue Dt:
03/02/2010
Application #:
12033984
Filing Dt:
02/20/2008
Publication #:
US20080242021
Pub Dt:
10/02/2008
Title:
METHOD OF FABRICATING A BOTTLE TRENCH AND A BOTTLE TRENCH CAPACITOR
74
Patent #:
7692590
Issue Dt:
04/06/2010
Application #:
12034023
Filing Dt:
02/20/2008
Publication #:
US20090207080
Pub Dt:
08/20/2009
Title:
RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES WITH INTEGRATED APERTURE-COUPLED PATCH ANTENNA(S)
75
Patent #:
8103998
Issue Dt:
01/24/2012
Application #:
12034161
Filing Dt:
02/20/2008
Publication #:
US20090210837
Pub Dt:
08/20/2009
Title:
VERIFYING NON-DETERMINISTIC BEHAVIOR OF A DESIGN UNDER TEST
76
Patent #:
7479801
Issue Dt:
01/20/2009
Application #:
12034185
Filing Dt:
02/20/2008
Publication #:
US20080143431
Pub Dt:
06/19/2008
Title:
POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES
77
Patent #:
8405127
Issue Dt:
03/26/2013
Application #:
12034210
Filing Dt:
02/20/2008
Publication #:
US20090206370
Pub Dt:
08/20/2009
Title:
METHOD AND APPARATUS FOR FABRICATING A HETEROJUNCTION BIPOLAR TRANSISTOR
78
Patent #:
7449378
Issue Dt:
11/11/2008
Application #:
12034296
Filing Dt:
02/20/2008
Publication #:
US20080145986
Pub Dt:
06/19/2008
Title:
STRUCTURE AND METHOD FOR IMPROVED STRESS AND YIELD IN PFETS WITH EMBEDDED SIGE SOURCE/DRAIN REGIONS
79
Patent #:
8261224
Issue Dt:
09/04/2012
Application #:
12034644
Filing Dt:
02/20/2008
Publication #:
US20090210845
Pub Dt:
08/20/2009
Title:
COMPUTER PROGRAM PRODUCT, APPARATUS, AND METHOD FOR INSERTING COMPONENTS IN A HIERARCHICAL CHIP DESIGN
80
Patent #:
7767587
Issue Dt:
08/03/2010
Application #:
12034692
Filing Dt:
02/21/2008
Publication #:
US20080146037
Pub Dt:
06/19/2008
Title:
METHOD OF FORMING AN INTERCONNECTION STRUCTURE IN A ORGANOSILICATE GLASS HAVING A POROUS LAYER WITH HIGHER CARBON CONTENT LOCATED BETWEEN TWO LOWER CARBON CONTENT NON-POROUS LAYERS.
81
Patent #:
8232647
Issue Dt:
07/31/2012
Application #:
12034708
Filing Dt:
02/21/2008
Publication #:
US20090212433
Pub Dt:
08/27/2009
Title:
STRUCTURE AND PROCESS FOR METALLIZATION IN HIGH ASPECT RATIO FEATURES
82
Patent #:
8120143
Issue Dt:
02/21/2012
Application #:
12034728
Filing Dt:
02/21/2008
Publication #:
US20080130200
Pub Dt:
06/05/2008
Title:
INTEGRATED CIRCUIT COMB CAPACITOR
83
Patent #:
7868374
Issue Dt:
01/11/2011
Application #:
12034899
Filing Dt:
02/21/2008
Publication #:
US20090212341
Pub Dt:
08/27/2009
Title:
SEMITUBULAR METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR
84
Patent #:
7825525
Issue Dt:
11/02/2010
Application #:
12034901
Filing Dt:
02/21/2008
Publication #:
US20080142995
Pub Dt:
06/19/2008
Title:
LAYOUT AND PROCESS TO CONTACT SUB-LITHOGRAPHIC STRUCTURES
85
Patent #:
NONE
Issue Dt:
Application #:
12034941
Filing Dt:
02/21/2008
Publication #:
US20090212332
Pub Dt:
08/27/2009
Title:
FIELD EFFECT TRANSISTOR WITH REDUCED OVERLAP CAPACITANCE
86
Patent #:
8021828
Issue Dt:
09/20/2011
Application #:
12034971
Filing Dt:
02/21/2008
Publication #:
US20090214959
Pub Dt:
08/27/2009
Title:
PHOTORESIST COMPOSITIONS AND METHODS RELATED TO NEAR FIELD MASKS
87
Patent #:
7781847
Issue Dt:
08/24/2010
Application #:
12034972
Filing Dt:
02/21/2008
Publication #:
US20080135948
Pub Dt:
06/12/2008
Title:
DEVICE PATTERNED WITH SUB-LITHOGRAPHIC FEATURES WITH VARIABLE WIDTHS
88
Patent #:
8053172
Issue Dt:
11/08/2011
Application #:
12035009
Filing Dt:
02/21/2008
Publication #:
US20090214981
Pub Dt:
08/27/2009
Title:
PHOTORESISTS AND METHODS FOR OPTICAL PROXIMITY CORRECTION
89
Patent #:
7560721
Issue Dt:
07/14/2009
Application #:
12035237
Filing Dt:
02/21/2008
Title:
PHASE CHANGE MATERIAL WITH FILAMENT ELECTRODE
90
Patent #:
7709401
Issue Dt:
05/04/2010
Application #:
12035448
Filing Dt:
02/22/2008
Publication #:
US20090212431
Pub Dt:
08/27/2009
Title:
METHOD OF MAKING THERMALLY PROGRAMMABLE ANTI-REVERSE ENGINEERING INTERCONNECTS WHEREIN INTERCONNECTS ONLY CONDUCT WHEN HEATED ABOVE ROOM TEMPERATURE
91
Patent #:
8969195
Issue Dt:
03/03/2015
Application #:
12035449
Filing Dt:
02/22/2008
Publication #:
US20090212434
Pub Dt:
08/27/2009
Title:
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES AND A SEMICONDUCTOR STRUCTURE
92
Patent #:
7728089
Issue Dt:
06/01/2010
Application #:
12035462
Filing Dt:
02/22/2008
Publication #:
US20080145787
Pub Dt:
06/19/2008
Title:
TOPCOAT COMPOSITIONS AND METHODS OF USE THEREOF
93
Patent #:
7987400
Issue Dt:
07/26/2011
Application #:
12035500
Filing Dt:
02/22/2008
Publication #:
US20090217115
Pub Dt:
08/27/2009
Title:
METHOD FOR OPTIMIZING SCAN CHAINS IN AN INTEGRATED CIRCUIT THAT HAS MULTIPLE LEVELS OF HIERARCHY
94
Patent #:
7882463
Issue Dt:
02/01/2011
Application #:
12035572
Filing Dt:
02/22/2008
Publication #:
US20080148210
Pub Dt:
06/19/2008
Title:
INTEGRATED CIRCUIT SELECTIVE SCALING
95
Patent #:
NONE
Issue Dt:
Application #:
12035984
Filing Dt:
02/22/2008
Publication #:
US20080288234
Pub Dt:
11/20/2008
Title:
METHOD, SYSTEM AND PROGRAM PRODUCT SUPPORTING USER TRACING IN A SIMULATOR
96
Patent #:
7906031
Issue Dt:
03/15/2011
Application #:
12036091
Filing Dt:
02/22/2008
Publication #:
US20090212016
Pub Dt:
08/27/2009
Title:
ALIGNING POLYMER FILMS
97
Patent #:
7552407
Issue Dt:
06/23/2009
Application #:
12036093
Filing Dt:
02/22/2008
Publication #:
US20080216029
Pub Dt:
09/04/2008
Title:
METHOD AND SYSTEM FOR PERFORMING TARGET ENLARGEMENT IN THE PRESENCE OF CONSTRAINTS
98
Patent #:
NONE
Issue Dt:
Application #:
12036319
Filing Dt:
02/25/2008
Publication #:
US20080145993
Pub Dt:
06/19/2008
Title:
ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
99
Patent #:
7908534
Issue Dt:
03/15/2011
Application #:
12036320
Filing Dt:
02/25/2008
Publication #:
US20090217116
Pub Dt:
08/27/2009
Title:
DIAGNOSABLE GENERAL PURPOSE TEST REGISTERS SCAN CHAIN DESIGN
100
Patent #:
7772649
Issue Dt:
08/10/2010
Application #:
12036325
Filing Dt:
02/25/2008
Publication #:
US20090212362
Pub Dt:
08/27/2009
Title:
SOI FIELD EFFECT TRANSISTOR WITH A BACK GATE FOR MODULATING A FLOATING BODY
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

Search Results as of: 05/28/2024 10:54 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT