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08/05/2004
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02/24/2005
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04/01/2004
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07/01/2004
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07/15/2004
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01/08/2004
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01/13/2005
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01/13/2005
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02/26/2004
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02/12/2004
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03/04/2004
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01/13/2005
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01/20/2005
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04/19/2005
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02/26/2004
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08/09/2005
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02/26/2004
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01/22/2004
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01/20/2005
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01/29/2004
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01/27/2005
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03/11/2004
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06/12/2007
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04/29/2004
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01/27/2005
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01/27/2005
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05/20/2004
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05/20/2004
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10/23/2007
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07/21/2003
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04/15/2004
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01/27/2005
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04/14/2005
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05/12/2005
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02/03/2005
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07/04/2006
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09/30/2004
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09/30/2004
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02/05/2004
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09/15/2009
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03/18/2004
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12/14/2004
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10/19/2004
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07/31/2003
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Publication #:
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Pub Dt:
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04/15/2004
| | | | |
Title:
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REGULATOR CIRCUIT FOR INDEPENDENT ADJUSTMENT OF PUMPS IN MULTIPLE MODES OF OPERATION
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Patent #:
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Issue Dt:
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12/19/2006
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Application #:
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10630812
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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OBTAINING SEARCH RESULTS FOR CONTENT ADDRESSABLE MEMORY
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Patent #:
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Issue Dt:
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07/26/2005
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Application #:
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10631342
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Filing Dt:
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07/30/2003
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Publication #:
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Pub Dt:
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04/15/2004
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Title:
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SEMICONDUCTOR PACKAGE ASSEMBLY AND METHOD FOR ELECTRICALLY ISOLATING MODULES
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Patent #:
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Issue Dt:
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01/16/2007
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Application #:
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10631463
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Filing Dt:
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07/30/2003
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Publication #:
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Pub Dt:
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07/08/2004
| | | | |
Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT STRUCTURES
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10631918
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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04/15/2004
| | | | |
Title:
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ROM EMBEDDED DRAM WITH DIELECTRIC REMOVAL/SHORT
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10631921
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Filing Dt:
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07/31/2003
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Title:
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TRANSISTOR GATE AND LOCAL INTERCONNECT
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Patent #:
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Issue Dt:
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08/24/2004
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Application #:
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10632579
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Filing Dt:
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07/31/2003
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Publication #:
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Pub Dt:
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02/05/2004
| | | | |
Title:
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METHODS OF FORMING MAGNETORESISTIVE MEMORY DEVICES
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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10632628
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/03/2005
| | | | |
Title:
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MULTIFREQUENCY PLASMA REACTOR
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Patent #:
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Issue Dt:
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07/18/2006
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Application #:
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10633165
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/05/2004
| | | | |
Title:
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SELF-ALIGNED POLY-METAL STRUCTURES
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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10633189
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/05/2004
| | | | |
Title:
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METHOD AND SYSTEM HAVING SWITCHING NETWORK FOR TESTING SEMICONDUCTOR COMPONENTS ON A SUBSTRATE
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Patent #:
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Issue Dt:
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06/22/2004
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Application #:
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10633247
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
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02/12/2004
| | | | |
Title:
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DUAL BANDGAP VOLTAGE REFERENCE SYSTEM AND METHOD FOR REDUCING CURRENT CONSUMPTION DURING A STANDBY MODE OF OPERATION AND FOR PROVIDING REFERENCE STABILITY DURING AN ACTIVE MODE OF OPERATION
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Patent #:
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Issue Dt:
|
06/07/2005
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Application #:
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10633434
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Filing Dt:
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08/01/2003
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Publication #:
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Pub Dt:
|
02/03/2005
| | | | |
Title:
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Semiconductor component having chip on board leadframe
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Patent #:
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Issue Dt:
|
08/09/2005
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Application #:
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10633628
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Filing Dt:
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08/05/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
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MAGNETORESISTIVE MEMORY OR SENSOR DEVICES HAVING IMPROVED SWITCHING PROPERTIES AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
|
08/29/2006
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Application #:
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10633851
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Filing Dt:
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08/04/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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INTEGRATED CIRCUIT PACKAGE ELECTRICAL ENHANCEMENT WITH IMPROVED LEAD FRAME DESIGN
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Patent #:
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Issue Dt:
|
02/22/2005
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Application #:
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10633923
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
METHOD FOR IMPLEMENTING SELECTED FUNCTIONALITY ON AN INTEGRATED CIRCUIT DEVICE
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Patent #:
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Issue Dt:
|
05/24/2005
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Application #:
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10633924
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
|
APPARATUS FOR IMPLEMENTING SELECTED FUNCTIONALITY ON AN INTEGRATED CIRCUIT DEVICE IN AN ELECTRONIC DEVICE
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Patent #:
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Issue Dt:
|
05/24/2005
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Application #:
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10633925
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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APPARATUS FOR FORMING A STACK OF PACKAGED MEMORY DICE
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10634073
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
|
METHOD OF FORMING A STACK OF PACKAGED MEMORY DICE
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Patent #:
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|
Issue Dt:
|
03/22/2005
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Application #:
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10634074
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
|
METHODS FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
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Patent #:
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Issue Dt:
|
05/31/2005
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Application #:
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10634075
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
|
ELECTRODE STRUCTURES, DISPLAY DEVICES CONTAINING THE SAME
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Patent #:
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Issue Dt:
|
09/12/2006
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Application #:
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10634123
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Filing Dt:
|
08/04/2003
|
Publication #:
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Pub Dt:
|
01/27/2005
| | | | |
Title:
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SEMICONDUCTOR SUBSTRATES INCLUDING I/O REDISTRIBUTION USING WIRE BONDS AND ANISOTROPICALLY CONDUCTIVE FILM, METHODS OF FABRICATION AND ASSEMBLIES INCLUDING SAME
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Patent #:
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Issue Dt:
|
06/12/2007
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Application #:
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10634163
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Filing Dt:
|
08/05/2003
|
Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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STUD ELECTRODE AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
|
12/26/2006
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Application #:
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10634174
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Filing Dt:
|
08/05/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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STRAINED SI/SIGE/SOI ISLANDS AND PROCESSES OF MAKING SAME
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Patent #:
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Issue Dt:
|
01/24/2006
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Application #:
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10634212
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Filing Dt:
|
08/05/2003
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Title:
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MRAM SENSE LAYER ISOLATION
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Patent #:
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Issue Dt:
|
05/22/2007
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Application #:
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10634274
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Filing Dt:
|
08/05/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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H2 PLASMA TREATMENT
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Patent #:
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Issue Dt:
|
03/20/2007
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Application #:
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10634352
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Filing Dt:
|
08/05/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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USE OF LINEAR INJECTORS TO DEPOSIT UNIFORM SELECTIVE OZONE TEOS OXIDE FILM BY PULSING REACTANTS ON AND OFF
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Patent #:
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Issue Dt:
|
09/21/2004
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Application #:
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10634594
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Filing Dt:
|
08/04/2003
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
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GLASS ATTACHMENT OVER MICRO-LENS ARRAYS
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Patent #:
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Issue Dt:
|
02/08/2005
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Application #:
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10634888
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
04/15/2004
| | | | |
Title:
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MICROTRANSFORMER FOR SYSTEM-ON-CHIP POWER SUPPLY
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Patent #:
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Issue Dt:
|
11/02/2004
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Application #:
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10634897
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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METHODS OF FORMING NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHODS OF FORMING SILVER SELENIDE COMPRISING STRUCTURES
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Patent #:
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Issue Dt:
|
06/05/2007
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Application #:
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10635947
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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WIRE BONDERS AND METHODS OF WIRE-BONDING
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Patent #:
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Issue Dt:
|
07/27/2010
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Application #:
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10636021
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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MICROFEATURE WORKPIECE PROCESSING SYSTEM FOR, E.G., SEMICONDUCTOR WAFER ANALYSIS
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Patent #:
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Issue Dt:
|
02/15/2005
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Application #:
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10636035
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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METHODS OF FORMING CAPACITORS
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Patent #:
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Issue Dt:
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08/21/2007
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Application #:
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10636038
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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METHODS OF FORMING MATERIAL ON A SUBSTRATE, AND A METHOD OF FORMING A FIELD EFFECT TRANSISTOR GATE OXIDE ON A SUBSTRATE
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Patent #:
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Issue Dt:
|
03/29/2005
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Application #:
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10636173
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Filing Dt:
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08/07/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10636179
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Filing Dt:
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08/07/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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MULTIPLE ERASE BLOCK TAGGING IN A FLASH MEMORY DEVICE
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Patent #:
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Issue Dt:
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01/04/2005
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Application #:
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10636180
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Filing Dt:
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08/07/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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BURIED DIGIT LINE STACK AND PROCESS FOR MAKING SAME
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Patent #:
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Issue Dt:
|
08/01/2006
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Application #:
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10636181
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Filing Dt:
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08/07/2003
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Publication #:
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Pub Dt:
|
02/10/2005
| | | | |
Title:
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METHOD FOR ERASING AN NROM CELL
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Patent #:
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Issue Dt:
|
02/15/2005
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Application #:
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10636332
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Filing Dt:
|
08/06/2003
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Publication #:
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Pub Dt:
|
02/26/2004
| | | | |
Title:
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STRESS BALANCED SEMICONDUCTOR PACKAGES, METHOD OF FABRICATION AND MODIFIED MOLD SEGMENT
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Patent #:
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Issue Dt:
|
01/25/2005
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Application #:
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10636535
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Filing Dt:
|
08/08/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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CURRENT SWITCHING SENSOR DETECTOR
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Patent #:
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Issue Dt:
|
08/14/2007
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Application #:
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10637031
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Filing Dt:
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08/06/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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DESCRIPTOR FOR IDENTIFYING A DEFECTIVE DIE SITE
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Patent #:
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Issue Dt:
|
12/11/2007
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Application #:
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10637096
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Filing Dt:
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08/08/2003
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Publication #:
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Pub Dt:
|
02/12/2004
| | | | |
Title:
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PROCESS FLOW FOR BUILDING MRAM STRUCTURES
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