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Patent #:
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Issue Dt:
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03/20/2012
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Application #:
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12127946
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
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09/18/2008
| | | | |
Title:
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ELECTROSTATIC DISCHARGE PROTECTION DEVICE AND METHOD OF FABRICATING SAME
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Patent #:
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Issue Dt:
|
08/14/2012
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Application #:
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12127972
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
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METHOD FOR MINIMIZING PRODUCTIVITY LOSS WHILE USING A MANUFACTURING SCHEDULER
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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12127994
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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HEAT-SHIELDED LOW POWER PCM-BASED REPROGRAMMABLE EFUSE DEVICE
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Patent #:
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Issue Dt:
|
06/28/2011
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Application #:
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12128040
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
10/23/2008
| | | | |
Title:
|
ION IMPLANTATION COMBINED WITH IN SITU OR EX SITU HEAT TREATMENT FOR IMPROVED FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
|
03/29/2011
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Application #:
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12128058
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
01/22/2009
| | | | |
Title:
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IMPORTATION OF VIRTUAL SIGNALS INTO ELECTRONIC TEST EQUIPMENT TO FACILITATE TESTING OF AN ELECTRONIC COMPONENT
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Patent #:
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Issue Dt:
|
11/23/2010
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Application #:
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12128134
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
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HYBRID FET INCORPORATING A FINFET AND A PLANAR FET
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Patent #:
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Issue Dt:
|
03/15/2016
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Application #:
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12128260
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Filing Dt:
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05/28/2008
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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METHOD AND STRUCTURE FOR DETERMINING THERMAL CYCLE RELIABILITY
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|
Patent #:
|
NONE
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Issue Dt:
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Application #:
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12128273
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Filing Dt:
|
05/28/2008
|
Publication #:
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Pub Dt:
|
06/04/2009
| | | | |
Title:
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Structure for a Method and Structure for Screening NFET-to-PFET Device Performance Offsets Within a CMOS Process
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Patent #:
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Issue Dt:
|
11/17/2009
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Application #:
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12128526
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Filing Dt:
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05/28/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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PULSED RING OSCILLATOR CIRCUIT FOR STORAGE CELL READ TIMING EVALUATION
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
12128653
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Filing Dt:
|
05/29/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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STRAINED HOT (HYBRID ORIENTATION TECHNOLOGY) MOSFETS
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Patent #:
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Issue Dt:
|
01/25/2011
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Application #:
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12128654
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Filing Dt:
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05/29/2008
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Publication #:
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Pub Dt:
|
01/22/2009
| | | | |
Title:
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STRUCTURE FOR A PHASE LOCKED LOOP WITH ADJUSTABLE VOLTAGE BASED ON TEMPERATURE
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Patent #:
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Issue Dt:
|
06/07/2011
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Application #:
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12128678
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Filing Dt:
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05/29/2008
|
Publication #:
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Pub Dt:
|
01/01/2009
| | | | |
Title:
|
DESIGN STRUCTURE FOR A PHASE LOCKED LOOP WITH STABILIZED DYNAMIC RESPONSE
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Patent #:
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Issue Dt:
|
03/22/2011
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Application #:
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12128754
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Filing Dt:
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05/29/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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DESIGN STRUCTURE FOR A DUTY CYCLE CORRECTION CIRCUIT
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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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12128761
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Filing Dt:
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05/29/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
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RADIATION HARDENED CMOS MASTER LATCH WITH REDUNDANT CLOCK INPUT CIRCUITS AND DESIGN STRUCTURE THEREFOR
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Patent #:
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Issue Dt:
|
11/08/2011
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Application #:
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12128973
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Filing Dt:
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05/29/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
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INTERCONNECT STRUCTURE FOR INTEGRATED CIRCUITS HAVING IMPROVED ELECTROMIGRATION CHARACTERISTICS
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|
Patent #:
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|
Issue Dt:
|
08/03/2010
|
Application #:
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12129033
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Filing Dt:
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05/29/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
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FIELD EFFECT STRUCTURE AND METHOD INCLUDING SPACER SHAPED METAL GATE WITH ASYMMETRIC SOURCE AND DRAIN REGIONS
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|
Patent #:
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Issue Dt:
|
03/30/2010
|
Application #:
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12129123
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Filing Dt:
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05/29/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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USING EFUSES TO STORE PLL CONFIGURATION DATA
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|
Patent #:
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|
Issue Dt:
|
09/07/2010
|
Application #:
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12129245
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Filing Dt:
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05/29/2008
|
Publication #:
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|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
PERFORMANCE EVALUATION OF ALGORITHMIC TASKS AND DYNAMIC PARAMETERIZATION ON MULTI-CORE PROCESSING SYSTEMS
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|
Patent #:
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|
Issue Dt:
|
03/23/2010
|
Application #:
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12129712
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Filing Dt:
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05/30/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
METHOD OF ADAPTIVELY SELECTING CHIPS FOR REDUCING IN-LINE TESTING IN A SEMICONDUCTOR MANUFACTURING LINE
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|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
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12129714
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Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
OPTICAL SENSOR INCLUDING STACKED PHOTOSENSITIVE DIODES
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|
Patent #:
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|
Issue Dt:
|
02/22/2011
|
Application #:
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12129716
|
Filing Dt:
|
05/30/2008
|
Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
|
OPTICAL SENSOR INCLUDING STACKED PHOTODIODES
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
12129748
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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Design Structure for a Clock Distribution Network, Structure, and Method for Providing Balanced Loading in Integrated Circuit Clock Trees
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|
Patent #:
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|
Issue Dt:
|
11/27/2012
|
Application #:
|
12129778
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
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METHOD FOR CREATING AN ERROR CORRECTION CODING SCHEME
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|
|
Patent #:
|
|
Issue Dt:
|
11/10/2009
|
Application #:
|
12129813
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
PROGRAM PRODUCT SUPPORTING SPECIFICATION OF SIGNALS FOR SIMULATION RESULT VIEWING
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|
Patent #:
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|
Issue Dt:
|
10/11/2011
|
Application #:
|
12129976
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
PREDICATE SELECTION IN BIT-LEVEL COMPOSITIONAL TRANSFORMATIONS
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12130047
|
Filing Dt:
|
05/30/2008
|
Publication #:
|
|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
PERFORMING UTILIZATION OF TRACES FOR INCREMENTAL REFINEMENT IN COUPLING A STRUCTURAL OVERAPPROXIMATION ALGORITHM AND A SATISFIABILITY SOLVER
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|
Patent #:
|
|
Issue Dt:
|
10/11/2011
|
Application #:
|
12130167
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
06/04/2009
| | | | |
Title:
|
PERFORMANCE EVALUATION OF ALGORITHMIC TASKS AND DYNAMIC PARAMETERIZATION ON MULTI-CORE PROCESSING SYSTEMS
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|
|
Patent #:
|
|
Issue Dt:
|
05/22/2012
|
Application #:
|
12130216
|
Filing Dt:
|
05/30/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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CONTROLLING COMPUTER STORAGE SYSTEMS
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|
Patent #:
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|
Issue Dt:
|
06/09/2009
|
Application #:
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12130257
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Filing Dt:
|
05/30/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
|
STATIC RANDOM ACCESS MEMORY CELL WITH IMPROVED STABILITY
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|
Patent #:
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Issue Dt:
|
12/14/2010
|
Application #:
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12130381
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Filing Dt:
|
05/30/2008
|
Publication #:
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Pub Dt:
|
01/15/2009
| | | | |
Title:
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METHOD OF FORMING ELECTRODEPOSITED CONTACTS
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|
Patent #:
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Issue Dt:
|
06/15/2010
|
Application #:
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12130408
|
Filing Dt:
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05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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MEMORY CELL WITH INDEPENDENT-GATE CONTROLLED ACCESS DEVICES AND MEMORY USING THE CELL
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Patent #:
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Issue Dt:
|
10/02/2012
|
Application #:
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12130460
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
METHOD TO TAILOR LOCATION OF PEAK ELECTRIC FIELD DIRECTLY UNDERNEATH AN EXTENSION SPACER FOR ENHANCED PROGRAMMABILITY OF A PROMPT-SHIFT DEVICE
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Patent #:
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|
Issue Dt:
|
04/26/2011
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Application #:
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12130472
|
Filing Dt:
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05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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METHOD AND APPARATUS FOR IMPROVING SRAM CELL STABILTY BY USING BOOSTED WORD LINES
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|
Patent #:
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Issue Dt:
|
08/30/2011
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Application #:
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12130476
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Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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STRUCTURE FOR AUTOMATED TRANSISTOR TUNING IN AN INTEGRATED CIRCUIT DESIGN
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|
Patent #:
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|
Issue Dt:
|
09/13/2011
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Application #:
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12130562
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Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
01/15/2009
| | | | |
Title:
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METHOD AND APPARATUS FOR PACKAGING AN INTEGRATED CHIP AND ANTENNA
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|
Patent #:
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|
Issue Dt:
|
07/19/2011
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Application #:
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12130563
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Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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DEVICE COMPRISING DOPED NANO-COMPONENT
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|
Patent #:
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|
Issue Dt:
|
03/22/2011
|
Application #:
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12130644
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
11/20/2008
| | | | |
Title:
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STRUCTURE FOR ESTIMATING POWER CONSUMPTION OF INTEGRATED CIRCUITRY
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Patent #:
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Issue Dt:
|
09/27/2011
|
Application #:
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12130675
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Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
11/20/2008
| | | | |
Title:
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STRUCTURE FOR TESTING AN OPERATION OF INTEGRATED CIRCUITRY
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|
Patent #:
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|
Issue Dt:
|
08/24/2010
|
Application #:
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12130724
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Filing Dt:
|
05/30/2008
|
Publication #:
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Pub Dt:
|
05/07/2009
| | | | |
Title:
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LOW LATENCY COUNTER EVENT INDICATION
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|
Patent #:
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|
Issue Dt:
|
03/22/2011
|
Application #:
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12130752
|
Filing Dt:
|
05/30/2008
|
Publication #:
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|
Pub Dt:
|
10/23/2008
| | | | |
Title:
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CACHE RECONFIGURATION BASED ON ANALYZING ONE OR MORE CHARACTERISTICS OF RUN-TIME PERFORMANCE DATA OR SOFTWARE HINT
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|
Patent #:
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|
Issue Dt:
|
03/09/2010
|
Application #:
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12131214
|
Filing Dt:
|
06/02/2008
|
Publication #:
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|
Pub Dt:
|
10/30/2008
| | | | |
Title:
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STACKING FAULT REDUCTION IN EPITAXIALLY GROWN SILICON
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|
Patent #:
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|
Issue Dt:
|
08/10/2010
|
Application #:
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12131307
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Filing Dt:
|
06/02/2008
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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FLEXIBLE ROW REDUNDANCY SYSTEM
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|
Patent #:
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Issue Dt:
|
07/13/2010
|
Application #:
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12131330
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Filing Dt:
|
06/02/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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DUV LASER ANNEALING AND STABILIZATION OF SICOH FILMS
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|
Patent #:
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|
Issue Dt:
|
09/13/2011
|
Application #:
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12131476
|
Filing Dt:
|
06/02/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
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VOLTAGE ISLAND PERFORMANCE/LEAKAGE SCREEN MONITOR FOR IP CHARACTERIZATION
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|
Patent #:
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|
Issue Dt:
|
06/15/2010
|
Application #:
|
12131973
|
Filing Dt:
|
06/03/2008
|
Publication #:
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|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
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|
Patent #:
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|
Issue Dt:
|
03/01/2011
|
Application #:
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12131988
|
Filing Dt:
|
06/03/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
THREE-DIMENSIONAL INTEGRATED CIRCUITS AND TECHNIQUES FOR FABRICATION THEREOF
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|
Patent #:
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|
Issue Dt:
|
06/07/2011
|
Application #:
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12132029
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Filing Dt:
|
06/03/2008
|
Publication #:
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Pub Dt:
|
12/03/2009
| | | | |
Title:
|
TECHNIQUES FOR THREE-DIMENSIONAL CIRCUIT INTEGRATION
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Patent #:
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|
Issue Dt:
|
06/15/2010
|
Application #:
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12132337
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Filing Dt:
|
06/03/2008
|
Publication #:
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|
Pub Dt:
|
12/03/2009
| | | | |
Title:
|
STRUCTURE AND METHOD OF FORMING ELECTRICALLY BLOWN METAL FUSES FOR INTEGRATED CIRCUITS
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|
Patent #:
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|
Issue Dt:
|
04/06/2010
|
Application #:
|
12132501
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Filing Dt:
|
06/03/2008
|
Publication #:
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|
Pub Dt:
|
12/11/2008
| | | | |
Title:
|
STRUCTURE FOR A CONFIGURABLE LOW POWER HIGH FAN-IN MULTIPLEXER
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|
Patent #:
|
|
Issue Dt:
|
11/10/2015
|
Application #:
|
12132561
|
Filing Dt:
|
06/03/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
METHODOLOGIES AND ANALYTICS TOOLS FOR IDENTIFYING WHITE SPACE OPPORTUNITIES IN A GIVEN INDUSTRY
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|
Patent #:
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|
Issue Dt:
|
10/19/2010
|
Application #:
|
12132698
|
Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION
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|
Patent #:
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|
Issue Dt:
|
11/29/2011
|
Application #:
|
12132705
|
Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION
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|
Patent #:
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Issue Dt:
|
06/23/2009
|
Application #:
|
12132710
|
Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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SYSTEM FOR SEARCH AND ANALYSIS OF SYSTEMATIC DEFECTS IN INTEGRATED CIRCUITS
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|
Patent #:
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|
Issue Dt:
|
10/05/2010
|
Application #:
|
12132714
|
Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
CRITICAL AREA COMPUTATION OF COMPOSITE FAULT MECHANISMS USING VORONOI DIAGRAMS
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|
Patent #:
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|
Issue Dt:
|
11/23/2010
|
Application #:
|
12132798
|
Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
12/10/2009
| | | | |
Title:
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DIFFERENTIAL NITRIDE PULLBACK TO CREATE DIFFERENTIAL NFET TO PFET DIVOTS FOR IMPROVED PERFORMANCE VERSUS LEAKAGE
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|
Patent #:
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|
Issue Dt:
|
07/19/2011
|
Application #:
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12132806
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Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
12/10/2009
| | | | |
Title:
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STRUCTURES AND METHODS TO ENHANCE CU INTERCONNECT ELECTROMIGRATION (EM) PERFORMANCE
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Patent #:
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Issue Dt:
|
08/03/2010
|
Application #:
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12132853
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Filing Dt:
|
06/04/2008
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
HYBRID SOI/BULK SEMICONDUCTOR TRANSISTORS
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|
|
Patent #:
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NONE
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Issue Dt:
|
|
Application #:
|
12132863
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Filing Dt:
|
06/04/2008
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Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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DESIGN STRUCTURE FOR RADIATION HARDENED PROGRAMMABLE PHASE FREQUENCY DIVIDER CIRCUIT
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Patent #:
|
|
Issue Dt:
|
03/08/2011
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Application #:
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12132865
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Filing Dt:
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06/04/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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MUGFET WITH STUB SOURCE AND DRAIN REGIONS
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Patent #:
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|
Issue Dt:
|
04/19/2011
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Application #:
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12132875
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Filing Dt:
|
06/04/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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DELAMINATION AND CRACK RESISTANT IMAGE SENSOR STRUCTURES AND METHODS
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|
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Patent #:
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Issue Dt:
|
06/21/2011
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Application #:
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12132887
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Filing Dt:
|
06/04/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
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CARRIER MOBILITY ENHANCED CHANNEL DEVICES AND METHOD OF MANUFACTURE
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|
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Patent #:
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|
Issue Dt:
|
11/23/2010
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Application #:
|
12132960
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Filing Dt:
|
06/04/2008
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
Title:
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PHASE LOCKED LOOP AND METHOD FOR ADJUSTING THE FREQUENCY AND PHASE IN THE PHASE LOCKED LOOP
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|
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Patent #:
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|
Issue Dt:
|
04/29/2014
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Application #:
|
12133379
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Filing Dt:
|
06/05/2008
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Publication #:
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|
Pub Dt:
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12/10/2009
| | | | |
Title:
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INTRALEVEL CONDUCTIVE LIGHT SHIELD
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|
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Patent #:
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|
Issue Dt:
|
04/17/2012
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Application #:
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12133380
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Filing Dt:
|
06/05/2008
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Publication #:
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Pub Dt:
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12/10/2009
| | | | |
Title:
|
INTERLEVEL CONDUCTIVE LIGHT SHIELD
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|
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Patent #:
|
|
Issue Dt:
|
03/05/2013
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Application #:
|
12133425
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Filing Dt:
|
06/05/2008
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Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
MIM CAPACITOR AND METHOD OF MAKING SAME
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|
|
Patent #:
|
|
Issue Dt:
|
02/23/2010
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Application #:
|
12133442
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Filing Dt:
|
06/05/2008
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Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
DESIGN OF BEOL PATTERNS TO REDUCE THE STRESSES ON STRUCTURES BELOW CHIP BONDPADS
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12133480
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Filing Dt:
|
06/05/2008
|
Publication #:
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|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
SOLUTION EFFICIENCY OF GENETIC ALGORITHM APPLICATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
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Application #:
|
12133724
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Filing Dt:
|
06/05/2008
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Publication #:
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|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
ENHANCED SPEED SORTING OF MICROPROCESSORS AT WAFER TEST
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
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Application #:
|
12133817
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Filing Dt:
|
06/05/2008
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Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR FLATBAND VOLTAGE TUNING OF HIGH-K FIELD EFFECT TRANSISTORS
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|
|
Patent #:
|
|
Issue Dt:
|
09/20/2011
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Application #:
|
12134113
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Filing Dt:
|
06/05/2008
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Publication #:
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|
Pub Dt:
|
12/31/2009
| | | | |
Title:
|
SYSTEM, METHOD, AND SERVICE FOR TRACING TRAITORS FROM CONTENT PROTECTION CIRCUMVENTION DEVICES
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12134260
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Filing Dt:
|
06/06/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
METHOD OF IMPROVING FUSE STATE DETECTION AND YIELD IN SEMICONDUCTOR APPLICATIONS
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
12134316
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Filing Dt:
|
06/06/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
FLEXIBLE CAPACITIVE COUPLER ASSEMBLY AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2010
|
Application #:
|
12134347
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Filing Dt:
|
06/06/2008
|
Publication #:
|
|
Pub Dt:
|
10/30/2008
| | | | |
Title:
|
PROGRAMMABLE HEAVY-ION SENSING DEVICE FOR ACCELERATED DRAM SOFT ERROR DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2011
|
Application #:
|
12134883
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Filing Dt:
|
06/06/2008
|
Publication #:
|
|
Pub Dt:
|
12/25/2008
| | | | |
Title:
|
INTEGRATED CIRCUIT CHIP MODULE WITH MICROCHANNEL COOLING DEVICE HAVING SPECIFIC FLUID CHANNEL ARRANGEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/28/2010
|
Application #:
|
12135229
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Filing Dt:
|
06/09/2008
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Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
APPARATUS AND METHOD FOR LOW POWER SENSING IN A MULTI-PORT SRAM USING PRE-DISCHARGED BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2011
|
Application #:
|
12135231
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Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
METHOD OF GENERATING A FUNCTIONAL DESIGN STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
12135232
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
DESIGN STRUCTURE FOR COMPENSATING FOR VARIANCES OF A BURIED RESISTOR IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/09/2010
|
Application #:
|
12135237
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Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
APPARATUS AND METHOD FOR LOW POWER, SINGLE-ENDED SENSING IN A MULTI-PORT SRAM USING PRE-DISCHARGED BIT LINES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2012
|
Application #:
|
12135242
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Filing Dt:
|
06/09/2008
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Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
PROGRAMMABLE ELECTRICAL FUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
12135245
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
SELECTIVE DEPOSITION OF GERMANIUM SPACERS ON NITRIDE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/26/2010
|
Application #:
|
12135249
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Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
INTEGRATED CIRCUIT CONTAINING MULTI-STATE RESTORE CIRCUITRY FOR RESTORING STATE TO A POWER-MANAGED FUNCTIONAL BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
08/07/2012
|
Application #:
|
12135250
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
METHOD OF DESIGNING MULTI-STATE RESTORE CIRCUITRY FOR RESTORING STATE TO A POWER-MANAGED FUNCTIONAL BLOCK
|
|
|
Patent #:
|
|
Issue Dt:
|
06/07/2011
|
Application #:
|
12135315
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
GLASS MOLD POLISHING METHOD AND STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/27/2010
|
Application #:
|
12135498
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/2011
|
Application #:
|
12135522
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
MULTIDIMENSIONAL PROCESS WINDOW OPTIMIZATION IN SEMICONDUCTOR MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/23/2013
|
Application #:
|
12135551
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
01/08/2009
| | | | |
Title:
|
System and Method for Identification of MicroRNA Target Sites and Corresponding Targeting MicroRNA Sequences
|
|
|
Patent #:
|
|
Issue Dt:
|
05/04/2010
|
Application #:
|
12135552
|
Filing Dt:
|
06/09/2008
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
09/14/2010
|
Application #:
|
12136158
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
METHOD OF MAKING INTEGRATED CIRCUIT (IC) INCLUDING AT LEAST ONE STORAGE CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
12136163
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
POSITIVE PHOTORESIST COMPOSITION WITH A POLYMER INCLUDING A FLUOROSULFONAMIDE GROUP AND PROCESS FOR ITS USE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/14/2012
|
Application #:
|
12136187
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
METHOD AND APPARATUS FOR EFFICIENT GATHERING OF INFORMATION IN A MULTICORE SYSTEM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12136195
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
STRESS ENHANCED TRANSISTOR DEVICES AND METHODS OF MAKING
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
|
Application #:
|
12136205
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
09/25/2008
| | | | |
Title:
|
ALTERING POWER CONSUMPTION IN COMMUNICATION LINKS BASED ON MEASURED NOISE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
12136206
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
ISOLATING BACK GATES OF FULLY DEPLETED SOI DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2010
|
Application #:
|
12136213
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
STRUCTURE AND DESIGN STRUCTURE HAVING ISOLATED BACK GATES FOR FULLY DEPLETED SOI DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2011
|
Application #:
|
12136246
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
12/10/2009
| | | | |
Title:
|
STRUCTURE AND METHOD TO FORM DUAL SILICIDE E-FUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2011
|
Application #:
|
12136359
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
SYSTEM AND METHOD FOR BALANCING DELAY OF SIGNAL COMMUNICATION PATHS THROUGH WELL VOLTAGE ADJUSTMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/31/2012
|
Application #:
|
12136478
|
Filing Dt:
|
06/10/2008
|
Publication #:
|
|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
FAULT TOLERANT MUTUAL EXCLUSION LOCKS FOR SHARED MEMORY SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2012
|
Application #:
|
12136885
|
Filing Dt:
|
06/11/2008
|
Publication #:
|
|
Pub Dt:
|
11/06/2008
| | | | |
Title:
|
METHOD AND PROCESS FOR FORMING A SELF-ALIGNED SILICIDE CONTACT
|
|
|
Patent #:
|
|
Issue Dt:
|
02/07/2012
|
Application #:
|
12137628
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
METHOD AND SYSTEM PRODUCT FOR IMPLEMENTING UNCERTAINTY IN INTEGRATED CIRCUIT DESIGNS WITH PROGRAMMABLE LOGIC
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
12137640
|
Filing Dt:
|
06/12/2008
|
Publication #:
|
|
Pub Dt:
|
12/17/2009
| | | | |
Title:
|
STRUCTURE AND METHOD TO FORM E-FUSE WITH ENHANCED CURRENT CROWDING
|
|